[flang-commits] [flang] 5c36ee8 - [mlir] Drop the leading space when printing regions
via flang-commits
flang-commits at lists.llvm.org
Tue Jan 18 08:52:42 PST 2022
Author: Mogball
Date: 2022-01-18T16:52:34Z
New Revision: 5c36ee8d57fa702d8dc4ee9349978bff575a9465
URL: https://github.com/llvm/llvm-project/commit/5c36ee8d57fa702d8dc4ee9349978bff575a9465
DIFF: https://github.com/llvm/llvm-project/commit/5c36ee8d57fa702d8dc4ee9349978bff575a9465.diff
LOG: [mlir] Drop the leading space when printing regions
The leading space that is always printed at the beginning of regions is not consistent with other parts of the printing API. Moreover, this leading space can lead to undesirable assembly formats:
```
attr-dict-with-keyword $region
```
Prints as:
```
// Two spaces between `}` and `{`
attributes {foo} { ... }
```
Moreover, the leading space results in the odd generic op format:
```
"test.op"() ( {...}) : () -> ()
```
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D117411
Added:
Modified:
flang/lib/Optimizer/Dialect/FIROps.cpp
mlir/lib/Dialect/Affine/IR/AffineOps.cpp
mlir/lib/Dialect/Async/IR/Async.cpp
mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
mlir/lib/Dialect/SCF/SCF.cpp
mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
mlir/lib/Dialect/Shape/IR/Shape.cpp
mlir/lib/Dialect/StandardOps/IR/Ops.cpp
mlir/lib/IR/AsmPrinter.cpp
mlir/lib/IR/FunctionImplementation.cpp
mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
mlir/test/Dialect/Affine/ops.mlir
mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
mlir/test/Dialect/GPU/invalid.mlir
mlir/test/Dialect/GPU/ops.mlir
mlir/test/Dialect/Linalg/invalid.mlir
mlir/test/Dialect/Linalg/named-ops.mlir
mlir/test/Dialect/MemRef/invalid.mlir
mlir/test/Dialect/Tosa/inlining.mlir
mlir/test/Dialect/Tosa/ops.mlir
mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
mlir/test/IR/invalid-ops.mlir
mlir/test/IR/parser.mlir
mlir/test/IR/pretty-region-args.mlir
mlir/test/IR/pretty_printed_region_op.mlir
mlir/test/IR/region.mlir
mlir/test/IR/wrapping_op.mlir
mlir/test/Target/LLVMIR/openmp-llvm.mlir
mlir/test/Transforms/test-merge-blocks.mlir
mlir/test/lib/Dialect/Test/TestDialect.cpp
mlir/test/mlir-lsp-server/hover.test
mlir/test/mlir-tblgen/op-format.mlir
mlir/test/python/ir/operation.py
Removed:
################################################################################
diff --git a/flang/lib/Optimizer/Dialect/FIROps.cpp b/flang/lib/Optimizer/Dialect/FIROps.cpp
index e16f16fa94176..852abefcd1d11 100644
--- a/flang/lib/Optimizer/Dialect/FIROps.cpp
+++ b/flang/lib/Optimizer/Dialect/FIROps.cpp
@@ -994,9 +994,11 @@ static void print(mlir::OpAsmPrinter &p, fir::DispatchTableOp &op) {
p << " @" << tableName;
Region &body = op.getOperation()->getRegion(0);
- if (!body.empty())
+ if (!body.empty()) {
+ p << ' ';
p.printRegion(body, /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/false);
+ }
}
static mlir::LogicalResult verify(fir::DispatchTableOp &op) {
@@ -1220,10 +1222,12 @@ static void print(mlir::OpAsmPrinter &p, fir::GlobalOp &op) {
p << " constant";
p << " : ";
p.printType(op.getType());
- if (op.hasInitializationBody())
+ if (op.hasInitializationBody()) {
+ p << ' ';
p.printRegion(op.getOperation()->getRegion(0),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
+ }
}
void fir::GlobalOp::appendInitialValue(mlir::Operation *op) {
@@ -1709,6 +1713,7 @@ static void print(mlir::OpAsmPrinter &p, fir::IterWhileOp op) {
}
p.printOptionalAttrDictWithKeyword(op->getAttrs(),
{op.getFinalValueAttrNameStr()});
+ p << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
}
@@ -2003,6 +2008,7 @@ static void print(mlir::OpAsmPrinter &p, fir::DoLoopOp op) {
}
p.printOptionalAttrDictWithKeyword(op->getAttrs(),
{"unordered", "finalValue"});
+ p << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false,
printBlockTerminators);
}
@@ -3122,13 +3128,14 @@ static void print(mlir::OpAsmPrinter &p, fir::IfOp op) {
p << " -> (" << op.getResultTypes() << ')';
printBlockTerminators = true;
}
+ p << ' ';
p.printRegion(op.thenRegion(), /*printEntryBlockArgs=*/false,
printBlockTerminators);
// Print the 'else' regions if it exists and has a block.
auto &otherReg = op.elseRegion();
if (!otherReg.empty()) {
- p << " else";
+ p << " else ";
p.printRegion(otherReg, /*printEntryBlockArgs=*/false,
printBlockTerminators);
}
diff --git a/mlir/lib/Dialect/Affine/IR/AffineOps.cpp b/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
index c89588e0b87bc..a6beca824d698 100644
--- a/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+++ b/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
@@ -1578,6 +1578,7 @@ static void print(OpAsmPrinter &p, AffineForOp op) {
printBlockTerminators = true;
}
+ p << ' ';
p.printRegion(op.region(),
/*printEntryBlockArgs=*/false, printBlockTerminators);
p.printOptionalAttrDict(op->getAttrs(),
@@ -2142,6 +2143,7 @@ static void print(OpAsmPrinter &p, AffineIfOp op) {
printDimAndSymbolList(op.operand_begin(), op.operand_end(),
conditionAttr.getValue().getNumDims(), p);
p.printOptionalArrowTypeList(op.getResultTypes());
+ p << ' ';
p.printRegion(op.thenRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/op.getNumResults());
@@ -2149,7 +2151,7 @@ static void print(OpAsmPrinter &p, AffineIfOp op) {
// Print the 'else' regions if it has any blocks.
auto &elseRegion = op.elseRegion();
if (!elseRegion.empty()) {
- p << " else";
+ p << " else ";
p.printRegion(elseRegion,
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/op.getNumResults());
@@ -3157,6 +3159,7 @@ static void print(OpAsmPrinter &p, AffineParallelOp op) {
p << ") -> (" << op.getResultTypes() << ")";
}
+ p << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/op.getNumResults());
p.printOptionalAttrDict(
diff --git a/mlir/lib/Dialect/Async/IR/Async.cpp b/mlir/lib/Dialect/Async/IR/Async.cpp
index a3b9da1fccbb9..c6c83ca0a21cb 100644
--- a/mlir/lib/Dialect/Async/IR/Async.cpp
+++ b/mlir/lib/Dialect/Async/IR/Async.cpp
@@ -144,6 +144,7 @@ static void print(OpAsmPrinter &p, ExecuteOp op) {
p.printOptionalArrowTypeList(llvm::drop_begin(op.getResultTypes()));
p.printOptionalAttrDictWithKeyword(op->getAttrs(),
{kOperandSegmentSizesAttr});
+ p << ' ';
p.printRegion(op.body(), /*printEntryBlockArgs=*/false);
}
diff --git a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
index 75249e7427f31..3062d89b672d1 100644
--- a/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
+++ b/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
@@ -475,6 +475,7 @@ static void printLaunchOp(OpAsmPrinter &p, LaunchOp op) {
p << ' ' << op.getDynamicSharedMemorySizeKeyword() << ' '
<< op.dynamicSharedMemorySize();
+ p << ' ';
p.printRegion(op.body(), /*printEntryBlockArgs=*/false);
p.printOptionalAttrDict(op->getAttrs());
}
@@ -881,6 +882,7 @@ static void printGPUFuncOp(OpAsmPrinter &p, GPUFuncOp op) {
p, op.getOperation(), type.getNumInputs(), type.getNumResults(),
{op.getNumWorkgroupAttributionsAttrName(),
GPUDialect::getKernelFuncAttrName()});
+ p << ' ';
p.printRegion(op.getBody(), /*printEntryBlockArgs=*/false);
}
@@ -1005,6 +1007,7 @@ static void print(OpAsmPrinter &p, GPUModuleOp op) {
p.printSymbolName(op.getName());
p.printOptionalAttrDictWithKeyword(op->getAttrs(),
{SymbolTable::getSymbolAttrName()});
+ p << ' ';
p.printRegion(op->getRegion(0), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/false);
}
diff --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index 4448c3ac77491..ebcb5d2dbed0c 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -1661,8 +1661,10 @@ static void printGlobalOp(OpAsmPrinter &p, GlobalOp op) {
p << " : " << op.getType();
Region &initializer = op.getInitializerRegion();
- if (!initializer.empty())
+ if (!initializer.empty()) {
+ p << ' ';
p.printRegion(initializer, /*printEntryBlockArgs=*/false);
+ }
}
// Parses one of the keywords provided in the list `keywords` and returns the
@@ -2092,9 +2094,11 @@ static void printLLVMFuncOp(OpAsmPrinter &p, LLVMFuncOp op) {
// Print the body if this is not an external function.
Region &body = op.getBody();
- if (!body.empty())
+ if (!body.empty()) {
+ p << ' ';
p.printRegion(body, /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
+ }
}
// Hook for OpTrait::FunctionLike, called after verifying that the 'type'
diff --git a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
index 2de5e23829b4d..a74ee5a9c4598 100644
--- a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
+++ b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
@@ -650,8 +650,10 @@ static void print(OpAsmPrinter &p, GenericOp op) {
}
// Print region.
- if (!op.region().empty())
+ if (!op.region().empty()) {
+ p << ' ';
p.printRegion(op.region());
+ }
// Print results.
printNamedStructuredOpResults(p, op.result_tensors().getTypes());
@@ -1805,11 +1807,12 @@ static void print(OpAsmPrinter &p, TiledLoopOp op) {
return attr.cast<StringAttr>().getValue() !=
getParallelIteratorTypeName();
}))
- p << " iterators" << op.iterator_types() << "";
+ p << " iterators" << op.iterator_types();
if (op.distribution_types().hasValue())
- p << " distribution" << op.distribution_types().getValue() << "";
+ p << " distribution" << op.distribution_types().getValue();
+ p << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false);
p.printOptionalAttrDict(
op->getAttrs(), /*elidedAttrs=*/{TiledLoopOp::getOperandSegmentSizeAttr(),
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 5d3ec36983d1f..55499f63295f0 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -211,11 +211,12 @@ void AllocaOp::getCanonicalizationPatterns(RewritePatternSet &results,
static void print(OpAsmPrinter &p, AllocaScopeOp &op) {
bool printBlockTerminators = false;
- p << " ";
+ p << ' ';
if (!op.results().empty()) {
p << " -> (" << op.getResultTypes() << ")";
printBlockTerminators = true;
}
+ p << ' ';
p.printRegion(op.bodyRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/printBlockTerminators);
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index 6bf4d7eb364c2..ec2ed912a9552 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -469,6 +469,7 @@ static void print(OpAsmPrinter &printer, ParallelOp &op) {
printOperandList(op.gangFirstPrivateOperands(),
ParallelOp::getFirstPrivateKeyword(), printer);
+ printer << ' ';
printer.printRegion(op.region(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
@@ -649,6 +650,7 @@ static void print(OpAsmPrinter &printer, LoopOp &op) {
if (op.getNumResults() > 0)
printer << " -> (" << op.getResultTypes() << ")";
+ printer << ' ';
printer.printRegion(op.region(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
diff --git a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
index 03c464f939010..85d5f845dcf25 100644
--- a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+++ b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
@@ -189,6 +189,7 @@ static void printParallelOp(OpAsmPrinter &p, ParallelOp op) {
if (auto bind = op.proc_bind_val())
p << "proc_bind(" << bind << ") ";
+ p << ' ';
p.printRegion(op.getRegion());
}
@@ -960,8 +961,9 @@ static void printSectionsOp(OpAsmPrinter &p, SectionsOp op) {
printAllocateAndAllocator(p, op.allocate_vars(), op.allocators_vars());
if (op.nowait())
- p << "nowait ";
+ p << "nowait";
+ p << ' ';
p.printRegion(op.region());
}
@@ -1094,6 +1096,7 @@ static void printWsLoopOp(OpAsmPrinter &p, WsLoopOp op) {
if (!op.reduction_vars().empty())
printReductionVarList(p, op.reductions(), op.reduction_vars());
+ p << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false);
}
diff --git a/mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp b/mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
index 9bb3b6232dccd..c7b67e859c8ac 100644
--- a/mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
+++ b/mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
@@ -122,7 +122,7 @@ static ParseResult parseForEachOp(OpAsmParser &parser, OperationState &result) {
static void print(OpAsmPrinter &p, ForEachOp op) {
BlockArgument arg = op.getLoopVariable();
- p << ' ' << arg << " : " << arg.getType() << " in " << op.values();
+ p << ' ' << arg << " : " << arg.getType() << " in " << op.values() << ' ';
p.printRegion(op.region(), /*printEntryBlockArgs=*/false);
p.printOptionalAttrDict(op->getAttrs());
p << " -> ";
diff --git a/mlir/lib/Dialect/SCF/SCF.cpp b/mlir/lib/Dialect/SCF/SCF.cpp
index 7c6d13aad73b2..ac70c57fea5e6 100644
--- a/mlir/lib/Dialect/SCF/SCF.cpp
+++ b/mlir/lib/Dialect/SCF/SCF.cpp
@@ -118,6 +118,7 @@ static ParseResult parseExecuteRegionOp(OpAsmParser &parser,
static void print(OpAsmPrinter &p, ExecuteRegionOp op) {
p.printOptionalArrowTypeList(op.getResultTypes());
+ p << ' ';
p.printRegion(op.getRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
@@ -347,6 +348,7 @@ static void print(OpAsmPrinter &p, ForOp op) {
" iter_args");
if (!op.getIterOperands().empty())
p << " -> (" << op.getIterOperands().getTypes() << ')';
+ p << ' ';
p.printRegion(op.getRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/op.hasIterOperands());
@@ -1110,6 +1112,7 @@ static void print(OpAsmPrinter &p, IfOp op) {
// Print yield explicitly if the op defines values.
printBlockTerminators = true;
}
+ p << ' ';
p.printRegion(op.getThenRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/printBlockTerminators);
@@ -1117,7 +1120,7 @@ static void print(OpAsmPrinter &p, IfOp op) {
// Print the 'else' regions if it exists and has a block.
auto &elseRegion = op.getElseRegion();
if (!elseRegion.empty()) {
- p << " else";
+ p << " else ";
p.printRegion(elseRegion,
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/printBlockTerminators);
@@ -1844,6 +1847,7 @@ static void print(OpAsmPrinter &p, ParallelOp op) {
if (!op.getInitVals().empty())
p << " init (" << op.getInitVals() << ")";
p.printOptionalArrowTypeList(op.getResultTypes());
+ p << ' ';
p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false);
p.printOptionalAttrDict(
op->getAttrs(), /*elidedAttrs=*/ParallelOp::getOperandSegmentSizeAttr());
@@ -2100,7 +2104,7 @@ static ParseResult parseReduceOp(OpAsmParser &parser, OperationState &result) {
static void print(OpAsmPrinter &p, ReduceOp op) {
p << "(" << op.getOperand() << ") ";
- p << " : " << op.getOperand().getType();
+ p << " : " << op.getOperand().getType() << ' ';
p.printRegion(op.getReductionOperator());
}
@@ -2215,8 +2219,9 @@ static void print(OpAsmPrinter &p, scf::WhileOp op) {
op.getInits(), " ");
p << " : ";
p.printFunctionalType(op.getInits().getTypes(), op.getResults().getTypes());
+ p << ' ';
p.printRegion(op.getBefore(), /*printEntryBlockArgs=*/false);
- p << " do";
+ p << " do ";
p.printRegion(op.getAfter());
p.printOptionalAttrDictWithKeyword(op->getAttrs());
}
diff --git a/mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp b/mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
index f85cc03b104ee..f403676721213 100644
--- a/mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
+++ b/mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
@@ -2004,9 +2004,11 @@ static void print(spirv::FuncOp fnOp, OpAsmPrinter &printer) {
// Print the body if this is not an external function.
Region &body = fnOp.body();
- if (!body.empty())
+ if (!body.empty()) {
+ printer << ' ';
printer.printRegion(body, /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
+ }
}
LogicalResult spirv::FuncOp::verifyType() {
@@ -2485,6 +2487,7 @@ static void print(spirv::LoopOp loopOp, OpAsmPrinter &printer) {
auto control = loopOp.loop_control();
if (control != spirv::LoopControl::None)
printer << " control(" << spirv::stringifyLoopControl(control) << ")";
+ printer << ' ';
printer.printRegion(op->getRegion(0), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
}
@@ -2726,6 +2729,7 @@ static void print(spirv::ModuleOp moduleOp, OpAsmPrinter &printer) {
}
printer.printOptionalAttrDictWithKeyword(moduleOp->getAttrs(), elidedAttrs);
+ printer << ' ';
printer.printRegion(moduleOp.getRegion());
}
@@ -2875,6 +2879,7 @@ static void print(spirv::SelectionOp selectionOp, OpAsmPrinter &printer) {
auto control = selectionOp.selection_control();
if (control != spirv::SelectionControl::None)
printer << " control(" << spirv::stringifySelectionControl(control) << ")";
+ printer << ' ';
printer.printRegion(op->getRegion(0), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
}
diff --git a/mlir/lib/Dialect/Shape/IR/Shape.cpp b/mlir/lib/Dialect/Shape/IR/Shape.cpp
index 481e191e9df4a..d1263a1586af0 100644
--- a/mlir/lib/Dialect/Shape/IR/Shape.cpp
+++ b/mlir/lib/Dialect/Shape/IR/Shape.cpp
@@ -287,9 +287,9 @@ static void print(OpAsmPrinter &p, AssumingOp op) {
bool yieldsResults = !op.getResults().empty();
p << " " << op.getWitness();
- if (yieldsResults) {
+ if (yieldsResults)
p << " -> (" << op.getResultTypes() << ")";
- }
+ p << ' ';
p.printRegion(op.getDoRegion(),
/*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/yieldsResults);
@@ -1114,6 +1114,7 @@ void print(OpAsmPrinter &p, FunctionLibraryOp op) {
p.printSymbolName(op.getName());
p.printOptionalAttrDictWithKeyword(
op->getAttrs(), {SymbolTable::getSymbolAttrName(), "mapping"});
+ p << ' ';
p.printRegion(op.getOperation()->getRegion(0), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/false);
p << " mapping ";
@@ -1711,6 +1712,7 @@ static void print(OpAsmPrinter &p, ReduceOp op) {
p << '(' << op.getShape() << ", " << op.getInitVals()
<< ") : " << op.getShape().getType();
p.printOptionalArrowTypeList(op.getResultTypes());
+ p << ' ';
p.printRegion(op.getRegion());
p.printOptionalAttrDict(op->getAttrs());
}
diff --git a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
index ed6698ba281c7..656394009cbc4 100644
--- a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
+++ b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
@@ -195,7 +195,7 @@ static ParseResult parseGenericAtomicRMWOp(OpAsmParser &parser,
static void print(OpAsmPrinter &p, GenericAtomicRMWOp op) {
p << ' ' << op.getMemref() << "[" << op.getIndices()
- << "] : " << op.getMemref().getType();
+ << "] : " << op.getMemref().getType() << ' ';
p.printRegion(op.getRegion());
p.printOptionalAttrDict(op->getAttrs());
}
diff --git a/mlir/lib/IR/AsmPrinter.cpp b/mlir/lib/IR/AsmPrinter.cpp
index 7be787f51f8fa..6c9977df101fb 100644
--- a/mlir/lib/IR/AsmPrinter.cpp
+++ b/mlir/lib/IR/AsmPrinter.cpp
@@ -2716,7 +2716,7 @@ void OperationPrinter::printSuccessorAndUseList(Block *successor,
void OperationPrinter::printRegion(Region ®ion, bool printEntryBlockArgs,
bool printBlockTerminators,
bool printEmptyBlock) {
- os << " {" << newLine;
+ os << "{" << newLine;
if (!region.empty()) {
auto restoreDefaultDialect =
llvm::make_scope_exit([&]() { defaultDialectStack.pop_back(); });
diff --git a/mlir/lib/IR/FunctionImplementation.cpp b/mlir/lib/IR/FunctionImplementation.cpp
index b53df44fa85d2..d0dedc4d6cbf9 100644
--- a/mlir/lib/IR/FunctionImplementation.cpp
+++ b/mlir/lib/IR/FunctionImplementation.cpp
@@ -371,7 +371,9 @@ void mlir::function_like_impl::printFunctionLikeOp(OpAsmPrinter &p,
{visibilityAttrName});
// Print the body if this is not an external function.
Region &body = op->getRegion(0);
- if (!body.empty())
+ if (!body.empty()) {
+ p << ' ';
p.printRegion(body, /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/true);
+ }
}
diff --git a/mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir b/mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
index d38c7dcf85449..b31baa8422989 100644
--- a/mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
+++ b/mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
@@ -50,7 +50,7 @@ func @wsloop(%arg0: index, %arg1: index, %arg2: index, %arg3: index, %arg4: inde
// CHECK: omp.parallel
omp.parallel {
// CHECK: omp.wsloop (%[[ARG6:.*]], %[[ARG7:.*]]) : i64 = (%[[ARG0]], %[[ARG1]]) to (%[[ARG2]], %[[ARG3]]) step (%[[ARG4]], %[[ARG5]]) {
- "omp.wsloop"(%arg0, %arg1, %arg2, %arg3, %arg4, %arg5) ( {
+ "omp.wsloop"(%arg0, %arg1, %arg2, %arg3, %arg4, %arg5) ({
^bb0(%arg6: index, %arg7: index): // no predecessors
// CHECK-DAG: %[[CAST_ARG6:.*]] = builtin.unrealized_conversion_cast %[[ARG6]] : i64 to index
// CHECK-DAG: %[[CAST_ARG7:.*]] = builtin.unrealized_conversion_cast %[[ARG7]] : i64 to index
diff --git a/mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir b/mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
index d02e7cd8a4db2..59a252918d877 100644
--- a/mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
+++ b/mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
@@ -4,7 +4,7 @@
// CHECK-SAME: ([[ARG0:%.+]]: tensor<i32>)
func @while_test(%arg0 : tensor<i32>) -> (tensor<i32>) {
// CHECK: [[WHILE:%.+]] = scf.while ([[ARG1:%.+]] = [[ARG0]])
- %1 = "tosa.while_loop"(%arg0) ( {
+ %1 = "tosa.while_loop"(%arg0) ({
^bb0(%arg2: tensor<i32>):
// CHECK: "tosa.const"
%2 = "tosa.const"() {value = dense<3> : tensor<i32>} : () -> tensor<i32>
diff --git a/mlir/test/Dialect/Affine/ops.mlir b/mlir/test/Dialect/Affine/ops.mlir
index cb2126f3bae0a..afef5c908cd3e 100644
--- a/mlir/test/Dialect/Affine/ops.mlir
+++ b/mlir/test/Dialect/Affine/ops.mlir
@@ -49,7 +49,7 @@ func @affine.yield() {
// CHECK: affine.for
// CHECK-NEXT: }
//
- // GENERIC: "affine.for"() ( {
+ // GENERIC: "affine.for"() ({
// GENERIC-NEXT: ^bb0(%{{.*}}: index): // no predecessors
// GENERIC-NEXT: "affine.yield"() : () -> ()
// GENERIC-NEXT: }) {lower_bound = #map0, step = 1 : index, upper_bound = #map1} : () -> ()
diff --git a/mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir b/mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
index e5bd237f3d0b4..9c21efba6998b 100644
--- a/mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
+++ b/mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
@@ -1198,9 +1198,9 @@ func @assumingOp(
func @noRegionBranchOpInterface() {
// expected-error at +1 {{All operations with attached regions need to implement the RegionBranchOpInterface.}}
- %0 = "test.bar"() ( {
+ %0 = "test.bar"() ({
// expected-error at +1 {{All operations with attached regions need to implement the RegionBranchOpInterface.}}
- %1 = "test.bar"() ( {
+ %1 = "test.bar"() ({
"test.yield"() : () -> ()
}) : () -> (i32)
"test.yield"() : () -> ()
diff --git a/mlir/test/Dialect/GPU/invalid.mlir b/mlir/test/Dialect/GPU/invalid.mlir
index faa74a1f449ee..a1060d39631a4 100644
--- a/mlir/test/Dialect/GPU/invalid.mlir
+++ b/mlir/test/Dialect/GPU/invalid.mlir
@@ -430,7 +430,7 @@ module {
module {
gpu.module @gpu_funcs {
// expected-error @+1 {{'gpu.func' op expected at least 5 arguments to body region}}
- "gpu.func"() ( {
+ "gpu.func"() ({
^bb0(%arg0: f32, %arg1: memref<?xf32>, %arg2: memref<5xf32, 3>, %arg3: memref<5xf32, 5>):
"gpu.return"() : () -> ()
} ) {gpu.kernel, sym_name = "kernel_1", type = (f32, memref<?xf32>) -> (), workgroup_attributions = 3: i64} : () -> ()
diff --git a/mlir/test/Dialect/GPU/ops.mlir b/mlir/test/Dialect/GPU/ops.mlir
index fe4015ecb2142..3115fcd4f69fe 100644
--- a/mlir/test/Dialect/GPU/ops.mlir
+++ b/mlir/test/Dialect/GPU/ops.mlir
@@ -155,7 +155,7 @@ module attributes {gpu.container_module} {
gpu.module @explicit_attributions {
// CHECK-LABEL: gpu.func @kernel_1({{.*}}: f32, {{.*}}: memref<?xf32>) workgroup({{.*}}: memref<5xf32, 3>) private({{.*}}: memref<5xf32, 5>)
- "gpu.func"() ( {
+ "gpu.func"() ({
^bb0(%arg0: f32, %arg1: memref<?xf32>, %arg2: memref<5xf32, 3>, %arg3: memref<5xf32, 5>):
"gpu.return"() : () -> ()
} ) {gpu.kernel, sym_name = "kernel_1", type = (f32, memref<?xf32>) -> (), workgroup_attributions = 1: i64} : () -> ()
diff --git a/mlir/test/Dialect/Linalg/invalid.mlir b/mlir/test/Dialect/Linalg/invalid.mlir
index ab51fe5445b51..3d6b0dcb45d3d 100644
--- a/mlir/test/Dialect/Linalg/invalid.mlir
+++ b/mlir/test/Dialect/Linalg/invalid.mlir
@@ -542,7 +542,7 @@ func @tiled_loop_incorrent_iterator_types_count(%A: memref<192x192xf32>,
%c0 = arith.constant 0 : index
%c192 = arith.constant 192 : index
// expected-error @+1 {{expected iterator types array attribute size = 1 to match the number of loops = 2}}
- %0 = "linalg.tiled_loop"(%c0, %c0, %c192, %c192, %c24, %c24, %A, %B, %C_tensor, %C) ( {
+ %0 = "linalg.tiled_loop"(%c0, %c0, %c192, %c192, %c24, %c24, %A, %B, %C_tensor, %C) ({
^bb0(%arg4: index, %arg5: index, %A_: memref<192x192xf32>,
%B_: memref<192x192xf32>, %CT_: tensor<192x192xf32>,
%C_: memref<192x192xf32>):
@@ -567,7 +567,7 @@ func @tiled_loop_incorrent_block_arg_type(%A: memref<192xf32>) {
%c192 = arith.constant 192 : index
%c24 = arith.constant 24 : index
// expected-error @+1 {{expected output arg 0 with type = 'memref<192xf32>' to match region arg 1 type = 'memref<100xf32>'}}
- "linalg.tiled_loop"(%c0, %c192, %c24, %A) ( {
+ "linalg.tiled_loop"(%c0, %c192, %c24, %A) ({
^bb0(%arg4: index, %A_: memref<100xf32>):
call @foo(%A_) : (memref<100xf32>)-> ()
linalg.yield
diff --git a/mlir/test/Dialect/Linalg/named-ops.mlir b/mlir/test/Dialect/Linalg/named-ops.mlir
index 7d574980d63a6..99ecba4208958 100644
--- a/mlir/test/Dialect/Linalg/named-ops.mlir
+++ b/mlir/test/Dialect/Linalg/named-ops.mlir
@@ -565,7 +565,7 @@ func @pooling_ndhwc_min(%input: memref<1x4x4x4x1xf32>, %fake: memref<3x3x3xf32>,
func @conv_interface_wrong_input_indexing_map(
%arg0 : tensor<?x?x?x?xf32>, %arg2 : tensor<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>) -> tensor<?x?x?x?xf32> {
// expected-error @+1 {{unexpected input index map for convolutions}}
- %0 = "linalg.conv_2d_nhwc_hwcf"(%arg0, %arg1, %arg2) ( {
+ %0 = "linalg.conv_2d_nhwc_hwcf"(%arg0, %arg1, %arg2) ({
^bb0(%arg3: f32, %arg4: f32, %arg5 : f32): // no predecessors
%1 = "arith.mulf"(%arg3, %arg4) : (f32, f32) -> f32
%2 = "arith.addf"(%arg5, %1) : (f32, f32) -> f32
@@ -582,7 +582,7 @@ func @conv_interface_wrong_input_indexing_map(
func @conv_interface_wrong_num_operands(
%arg0 : tensor<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?x?xf32>, %arg2 : tensor<?x?x?x?xf32>) -> tensor<?x?x?x?xf32> {
// expected-error @+1 {{expected output/filter indexing maps to be projected permutations}}
- %0 = "linalg.conv_2d_nhwc_hwcf"(%arg0, %arg1, %arg2) ( {
+ %0 = "linalg.conv_2d_nhwc_hwcf"(%arg0, %arg1, %arg2) ({
^bb0(%arg3: f32, %arg4: f32, %arg5 : f32): // no predecessors
%1 = "arith.mulf"(%arg3, %arg4) : (f32, f32) -> f32
%2 = "arith.addf"(%arg5, %1) : (f32, f32) -> f32
diff --git a/mlir/test/Dialect/MemRef/invalid.mlir b/mlir/test/Dialect/MemRef/invalid.mlir
index 51dce9c8b20bb..6d0cef1efc7dd 100644
--- a/mlir/test/Dialect/MemRef/invalid.mlir
+++ b/mlir/test/Dialect/MemRef/invalid.mlir
@@ -814,7 +814,7 @@ func @assume_alignment(%0: memref<4x4xf16>) {
// -----
-"alloca_without_scoped_alloc_parent"() ( {
+"alloca_without_scoped_alloc_parent"() ({
memref.alloca() : memref<1xf32>
// expected-error at -1 {{requires an ancestor op with AutomaticAllocationScope trait}}
return
diff --git a/mlir/test/Dialect/Tosa/inlining.mlir b/mlir/test/Dialect/Tosa/inlining.mlir
index f6789fafe3ed6..6e208da74635d 100644
--- a/mlir/test/Dialect/Tosa/inlining.mlir
+++ b/mlir/test/Dialect/Tosa/inlining.mlir
@@ -8,7 +8,7 @@
// CHECK-NOT: @add
// CHECK-NOT: @sub
func @inlined_if_fn(%arg0: tensor<f32>, %arg1: tensor<f32>, %arg2: tensor<i1>) -> tensor<f32> {
- %0 = "tosa.cond_if"(%arg2, %arg0, %arg1) ( {
+ %0 = "tosa.cond_if"(%arg2, %arg0, %arg1) ({
^bb0(%arg3: tensor<f32>, %arg4: tensor<f32>): // no predecessors
%1 = call @add(%arg3, %arg4) : (tensor<f32>, tensor<f32>) -> tensor<f32>
"tosa.yield"(%1) : (tensor<f32>) -> ()
@@ -34,7 +34,7 @@ func private @sub(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> {
func @inlined_while_fn(%arg0: tensor<i32>, %arg1: tensor<i32>, %arg2: tensor<i32>, %arg3: tensor<10xi32>) -> tensor<10xi32> {
// Check that calls are inlined and functions eliminated:
// CHECK-NOT: @while
- %1:4 = "tosa.while_loop"(%arg0, %arg1, %arg2, %arg3) ( {
+ %1:4 = "tosa.while_loop"(%arg0, %arg1, %arg2, %arg3) ({
^bb0(%arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<i32>, %arg7: tensor<10xi32>): // no predecessors
%2 = call @while_cond_40(%arg4, %arg5, %arg6, %arg7) : (tensor<i32>, tensor<i32>, tensor<i32>, tensor<10xi32>) -> tensor<i1>
"tosa.yield"(%2) : (tensor<i1>) -> ()
diff --git a/mlir/test/Dialect/Tosa/ops.mlir b/mlir/test/Dialect/Tosa/ops.mlir
index a774c2303ff80..4529670e27949 100644
--- a/mlir/test/Dialect/Tosa/ops.mlir
+++ b/mlir/test/Dialect/Tosa/ops.mlir
@@ -505,7 +505,7 @@ func @test_identity(%arg0: tensor<13x21x3xi32>) -> tensor<13x21x3xi32> {
// -----
// CHECK-LABEL: cond_if
func @test_cond_if(%arg0: tensor<f32>, %arg1: tensor<f32>, %arg2: tensor<i1>) -> tensor<f32> {
- %0 = "tosa.cond_if"(%arg2, %arg0, %arg1) ( {
+ %0 = "tosa.cond_if"(%arg2, %arg0, %arg1) ({
^bb0(%arg3: tensor<f32>, %arg4: tensor<f32>): // no predecessors
%1 = "tosa.add"(%arg3, %arg4) : (tensor<f32>, tensor<f32>) -> tensor<f32>
"tosa.yield"(%1) : (tensor<f32>) -> ()
@@ -521,7 +521,7 @@ func @test_cond_if(%arg0: tensor<f32>, %arg1: tensor<f32>, %arg2: tensor<i1>) ->
// CHECK-LABEL: while_loop
func @test_while_loop(%arg0: tensor<10xi32>, %arg1: tensor<i32>) {
%0 = "tosa.const"() {value = dense<0> : tensor<i32>} : () -> tensor<i32>
- %1:3 = "tosa.while_loop"(%0, %0, %arg0) ( {
+ %1:3 = "tosa.while_loop"(%0, %0, %arg0) ({
^bb0(%arg2: tensor<i32>, %arg3: tensor<i32>, %arg4: tensor<10xi32>): // no predecessors
%2 = "tosa.greater_equal"(%arg3, %arg1) : (tensor<i32>, tensor<i32>) -> tensor<i1>
%3 = "tosa.logical_not"(%2) : (tensor<i1>) -> tensor<i1>
diff --git a/mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir b/mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
index fdf2528f76854..8b0d70f939969 100644
--- a/mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
+++ b/mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
@@ -1130,7 +1130,7 @@ func @while_test(%arg0 : tensor<i32>) -> (tensor<*xi32>) {
%0 = "tosa.add"(%arg0, %arg0) : (tensor<i32>, tensor<i32>) -> tensor<*xi32>
// CHECK: "tosa.while_loop"
- %1 = "tosa.while_loop"(%0) ( {
+ %1 = "tosa.while_loop"(%0) ({
// CHECK: ^bb0
// CHECK-SAME: tensor<i32>
@@ -1168,7 +1168,7 @@ func @while_test(%arg0 : tensor<i32>) -> (tensor<*xi32>) {
// CHECK-LABEL: @while_test
func @while_test(%arg0 : tensor<i32>, %arg1 : tensor<1xi32>) -> () {
// CHECK: "tosa.while_loop"
- %1:2 = "tosa.while_loop"(%arg0, %arg1) ( {
+ %1:2 = "tosa.while_loop"(%arg0, %arg1) ({
// CHECK: ^bb0
// CHECK-SAME: tensor<i32>
diff --git a/mlir/test/IR/invalid-ops.mlir b/mlir/test/IR/invalid-ops.mlir
index 09237ccf036de..9950262a481a0 100644
--- a/mlir/test/IR/invalid-ops.mlir
+++ b/mlir/test/IR/invalid-ops.mlir
@@ -156,7 +156,7 @@ func @generic_atomic_rmw_wrong_arg_type(%I: memref<10xf32>, %i : index) {
func @generic_atomic_rmw_result_type_mismatch(%I: memref<10xf32>, %i : index) {
// expected-error at +1 {{failed to verify that result type matches element type of memref}}
- %0 = "std.generic_atomic_rmw"(%I, %i) ( {
+ %0 = "std.generic_atomic_rmw"(%I, %i) ({
^bb0(%old_value: f32):
%c1 = arith.constant 1.0 : f32
atomic_yield %c1 : f32
diff --git a/mlir/test/IR/parser.mlir b/mlir/test/IR/parser.mlir
index 30c273fd45de3..636f4eea0c5ff 100644
--- a/mlir/test/IR/parser.mlir
+++ b/mlir/test/IR/parser.mlir
@@ -864,7 +864,7 @@ func @verbose_if(%N: index) {
// CHECK-LABEL: func @terminator_with_regions
func @terminator_with_regions() {
// Combine successors and regions in the same operation.
- // CHECK: "region"()[^bb1] ( {
+ // CHECK: "region"()[^bb1] ({
// CHECK: }) : () -> ()
"region"()[^bb2] ({}) : () -> ()
^bb2:
@@ -1132,7 +1132,7 @@ func @special_float_values_in_tensors() {
// CHECK-LABEL: func @op_with_region_args
func @op_with_region_args() {
- // CHECK: "test.polyfor"() ( {
+ // CHECK: "test.polyfor"() ({
// CHECK-NEXT: ^bb{{.*}}(%{{.*}}: index, %{{.*}}: index, %{{.*}}: index):
test.polyfor %i, %j, %k {
"foo"() : () -> ()
@@ -1399,7 +1399,7 @@ test.graph_region {
// CHECK: test.graph_region {
test.graph_region {
// CHECK: [[VAL1:%.*]] = "op1"([[VAL3:%.*]]) : (i32) -> i32
-// CHECK: [[VAL2:%.*]] = "test.ssacfg_region"([[VAL1]], [[VAL2]], [[VAL3]], [[VAL4:%.*]]) ( {
+// CHECK: [[VAL2:%.*]] = "test.ssacfg_region"([[VAL1]], [[VAL2]], [[VAL3]], [[VAL4:%.*]]) ({
// CHECK: [[VAL5:%.*]] = "op2"([[VAL1]], [[VAL2]], [[VAL3]], [[VAL4]]) : (i32, i32, i32, i32) -> i32
// CHECK: }) : (i32, i32, i32, i32) -> i32
// CHECK: [[VAL3]] = "op2"([[VAL1]], [[VAL4]]) : (i32, i32) -> i32
@@ -1413,10 +1413,10 @@ test.graph_region {
%4 = "op3"(%1) : (i32) -> (i32)
}
-// CHECK: "unregistered_func_might_have_graph_region"() ( {
+// CHECK: "unregistered_func_might_have_graph_region"() ({
// CHECK: [[VAL1:%.*]] = "foo"([[VAL1]], [[VAL2:%.*]]) : (i64, i64) -> i64
// CHECK: [[VAL2]] = "bar"([[VAL1]])
-"unregistered_func_might_have_graph_region"() ( {
+"unregistered_func_might_have_graph_region"() ({
%1 = "foo"(%1, %2) : (i64, i64) -> i64
%2 = "bar"(%1) : (i64) -> i64
"unregistered_terminator"() : () -> ()
diff --git a/mlir/test/IR/pretty-region-args.mlir b/mlir/test/IR/pretty-region-args.mlir
index caed3691fa955..675d26ef2bc16 100644
--- a/mlir/test/IR/pretty-region-args.mlir
+++ b/mlir/test/IR/pretty-region-args.mlir
@@ -2,7 +2,7 @@
// CHECK-LABEL: func @custom_region_names
func @custom_region_names() -> () {
- "test.polyfor"() ( {
+ "test.polyfor"() ({
^bb0(%arg0: index, %arg1: index, %arg2: index):
"foo"() : () -> ()
}) { arg_names = ["i", "j", "k"] } : () -> ()
@@ -14,7 +14,7 @@ func @custom_region_names() -> () {
// CHECK-LABEL: func @weird_names
// Make sure the asmprinter handles weird names correctly.
func @weird_names() -> () {
- "test.polyfor"() ( {
+ "test.polyfor"() ({
^bb0(%arg0: i32, %arg1: i32, %arg2: index):
"foo"() : () -> i32
}) { arg_names = ["a .^x", "0"] } : () -> ()
diff --git a/mlir/test/IR/pretty_printed_region_op.mlir b/mlir/test/IR/pretty_printed_region_op.mlir
index c12b26de4cc6b..3684acbe6eb48 100644
--- a/mlir/test/IR/pretty_printed_region_op.mlir
+++ b/mlir/test/IR/pretty_printed_region_op.mlir
@@ -25,7 +25,7 @@ func @pretty_printed_region_op(%arg0 : f32, %arg1 : f32) -> (f32) {
// CHECK: "test.return"(%[[RES]]) : (f32) -> ()
// CHECK: : (f32, f32) -> f32
- %0 = test.pretty_printed_region %arg1, %arg0 ( {
+ %0 = test.pretty_printed_region %arg1, %arg0 ({
^bb0(%arg2: f32, %arg3: f32):
%1 = "non.special.op"(%arg2, %arg3) : (f32, f32) -> f32
"test.return"(%1) : (f32) -> ()
diff --git a/mlir/test/IR/region.mlir b/mlir/test/IR/region.mlir
index a1370ac8e2445..351abbd748077 100644
--- a/mlir/test/IR/region.mlir
+++ b/mlir/test/IR/region.mlir
@@ -78,7 +78,7 @@ func @named_region_has_wrong_number_of_blocks() {
// Region with single block and not terminator.
// CHECK: unregistered_without_terminator
-"test.unregistered_without_terminator"() ( {
+"test.unregistered_without_terminator"() ({
^bb0: // no predecessors
}) : () -> ()
diff --git a/mlir/test/IR/wrapping_op.mlir b/mlir/test/IR/wrapping_op.mlir
index c5397b301572a..982faee182eb3 100644
--- a/mlir/test/IR/wrapping_op.mlir
+++ b/mlir/test/IR/wrapping_op.mlir
@@ -5,7 +5,7 @@
// CHECK-GENERIC: "builtin.func"
func @wrapping_op(%arg0 : i32, %arg1 : f32) -> (i3, i2, i1) {
// CHECK: %0:3 = test.wrapping_region wraps "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3)
-// CHECK-GENERIC: "test.wrapping_region"() ( {
+// CHECK-GENERIC: "test.wrapping_region"() ({
// CHECK-GENERIC: %[[NESTED_RES:.*]]:3 = "some.op"(%arg1, %arg0) {test.attr = "attr"} : (f32, i32) -> (i1, i2, i3) loc("some_NameLoc")
// CHECK-GENERIC: "test.return"(%[[NESTED_RES]]#0, %[[NESTED_RES]]#1, %[[NESTED_RES]]#2) : (i1, i2, i3) -> () loc("some_NameLoc")
// CHECK-GENERIC: }) : () -> (i1, i2, i3) loc("some_NameLoc")
diff --git a/mlir/test/Target/LLVMIR/openmp-llvm.mlir b/mlir/test/Target/LLVMIR/openmp-llvm.mlir
index 91493b7b9cdbd..bb879b31cc092 100644
--- a/mlir/test/Target/LLVMIR/openmp-llvm.mlir
+++ b/mlir/test/Target/LLVMIR/openmp-llvm.mlir
@@ -368,7 +368,7 @@ llvm.func @wsloop_simple(%arg0: !llvm.ptr<f32>) {
%1 = llvm.mlir.constant(10 : index) : i64
%2 = llvm.mlir.constant(1 : index) : i64
omp.parallel {
- "omp.wsloop"(%1, %0, %2) ( {
+ "omp.wsloop"(%1, %0, %2) ({
^bb0(%arg1: i64):
// The form of the emitted IR is controlled by OpenMPIRBuilder and
// tested there. Just check that the right functions are called.
@@ -393,7 +393,7 @@ llvm.func @wsloop_inclusive_1(%arg0: !llvm.ptr<f32>) {
%1 = llvm.mlir.constant(10 : index) : i64
%2 = llvm.mlir.constant(1 : index) : i64
// CHECK: store i64 31, i64* %{{.*}}upperbound
- "omp.wsloop"(%1, %0, %2) ( {
+ "omp.wsloop"(%1, %0, %2) ({
^bb0(%arg1: i64):
%3 = llvm.mlir.constant(2.000000e+00 : f32) : f32
%4 = llvm.getelementptr %arg0[%arg1] : (!llvm.ptr<f32>, i64) -> !llvm.ptr<f32>
@@ -411,7 +411,7 @@ llvm.func @wsloop_inclusive_2(%arg0: !llvm.ptr<f32>) {
%1 = llvm.mlir.constant(10 : index) : i64
%2 = llvm.mlir.constant(1 : index) : i64
// CHECK: store i64 32, i64* %{{.*}}upperbound
- "omp.wsloop"(%1, %0, %2) ( {
+ "omp.wsloop"(%1, %0, %2) ({
^bb0(%arg1: i64):
%3 = llvm.mlir.constant(2.000000e+00 : f32) : f32
%4 = llvm.getelementptr %arg0[%arg1] : (!llvm.ptr<f32>, i64) -> !llvm.ptr<f32>
diff --git a/mlir/test/Transforms/test-merge-blocks.mlir b/mlir/test/Transforms/test-merge-blocks.mlir
index 342c952b724e0..ed5f88b89acf5 100644
--- a/mlir/test/Transforms/test-merge-blocks.mlir
+++ b/mlir/test/Transforms/test-merge-blocks.mlir
@@ -2,7 +2,7 @@
// CHECK-LABEL: @merge_blocks
func @merge_blocks(%arg0: i32, %arg1 : i32) -> () {
- // CHECK: "test.merge_blocks"() ( {
+ // CHECK: "test.merge_blocks"() ({
// CHECK-NEXT: "test.return"
// CHECK-NEXT: })
// CHECK-NEXT: "test.return"
diff --git a/mlir/test/lib/Dialect/Test/TestDialect.cpp b/mlir/test/lib/Dialect/Test/TestDialect.cpp
index 441817803ef03..b1ce20237bd28 100644
--- a/mlir/test/lib/Dialect/Test/TestDialect.cpp
+++ b/mlir/test/lib/Dialect/Test/TestDialect.cpp
@@ -603,6 +603,7 @@ static void print(OpAsmPrinter &p, IsolatedRegionOp op) {
p << "test.isolated_region ";
p.printOperand(op.getOperand());
p.shadowRegionArgs(op.getRegion(), op.getOperand());
+ p << ' ';
p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false);
}
diff --git a/mlir/test/mlir-lsp-server/hover.test b/mlir/test/mlir-lsp-server/hover.test
index e5054c24bb44a..8467f24852f62 100644
--- a/mlir/test/mlir-lsp-server/hover.test
+++ b/mlir/test/mlir-lsp-server/hover.test
@@ -114,7 +114,7 @@
// CHECK-NEXT: "result": {
// CHECK-NEXT: "contents": {
// CHECK-NEXT: "kind": "markdown",
-// CHECK-NEXT: "value": "\"builtin.func\" : public @foo\n\nGeneric Form:\n\n```mlir\n\"builtin.func\"() ( {\n}) {sym_name = \"foo\", type = (i1) -> ()} : () -> ()\n```\n"
+// CHECK-NEXT: "value": "\"builtin.func\" : public @foo\n\nGeneric Form:\n\n```mlir\n\"builtin.func\"() ({\n}) {sym_name = \"foo\", type = (i1) -> ()} : () -> ()\n```\n"
// CHECK-NEXT: },
// CHECK-NEXT: "range": {
// CHECK-NEXT: "end": {
@@ -138,7 +138,7 @@
// CHECK-NEXT: "result": {
// CHECK-NEXT: "contents": {
// CHECK-NEXT: "kind": "markdown",
-// CHECK-NEXT: "value": "\"builtin.func\" : public @foo\n\nGeneric Form:\n\n```mlir\n\"builtin.func\"() ( {\n}) {sym_name = \"foo\", type = (i1) -> ()} : () -> ()\n```\n"
+// CHECK-NEXT: "value": "\"builtin.func\" : public @foo\n\nGeneric Form:\n\n```mlir\n\"builtin.func\"() ({\n}) {sym_name = \"foo\", type = (i1) -> ()} : () -> ()\n```\n"
// CHECK-NEXT: },
// CHECK-NEXT: "range": {
// CHECK-NEXT: "end": {
diff --git a/mlir/test/mlir-tblgen/op-format.mlir b/mlir/test/mlir-tblgen/op-format.mlir
index de174312d1c1c..2f8a2b0def0b1 100644
--- a/mlir/test/mlir-tblgen/op-format.mlir
+++ b/mlir/test/mlir-tblgen/op-format.mlir
@@ -161,7 +161,7 @@ test.format_multiple_variadic_operands (%i64, %i64, %i64), (%i64, %i32 : i64, i3
// Format successors
//===----------------------------------------------------------------------===//
-"foo.successor_test_region"() ( {
+"foo.successor_test_region"() ({
^bb0:
// CHECK: test.format_successor_a_op ^bb1 {attr}
test.format_successor_a_op ^bb1 {attr}
diff --git a/mlir/test/python/ir/operation.py b/mlir/test/python/ir/operation.py
index db8acc82ac3ab..12f08e9c2fda1 100644
--- a/mlir/test/python/ir/operation.py
+++ b/mlir/test/python/ir/operation.py
@@ -306,7 +306,7 @@ def testDetachedOperation():
"foo": StringAttr.get("foo_value"),
"bar": StringAttr.get("bar_value"),
})
- # CHECK: %0:2 = "custom.op1"() ( {
+ # CHECK: %0:2 = "custom.op1"() ({
# CHECK: }) {bar = "bar_value", foo = "foo_value"} : () -> (si32, si32)
print(op1)
@@ -360,7 +360,7 @@ def testOperationWithRegion():
i32 = IntegerType.get_signed(32)
op1 = Operation.create("custom.op1", regions=1)
block = op1.regions[0].blocks.append(i32, i32)
- # CHECK: "custom.op1"() ( {
+ # CHECK: "custom.op1"() ({
# CHECK: ^bb0(%arg0: si32, %arg1: si32): // no predecessors
# CHECK: "custom.terminator"() : () -> ()
# CHECK: }) : () -> ()
@@ -645,7 +645,7 @@ def testInvalidOperationStrSoftFails():
invalid_op = create_invalid_operation()
# Verify that we fallback to the generic printer for safety.
# CHECK: // Verification failed, printing generic form
- # CHECK: "builtin.module"() ( {
+ # CHECK: "builtin.module"() ({
# CHECK: }) : () -> ()
print(invalid_op)
# CHECK: .verify = False
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