[cfe-dev] [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64

[David Spickett via cfe-dev]

A patch for initial refactoring is now up for review:

https://reviews.llvm.org/D53980


It moves the ARM and AArch64 TargetParser namespaces into their own files. There's no change to the x86/AMDGPU side of things but those who work on that may be interested in the restructuring.


I'm not sure who that would be specifically but feel free to take a look and leave any comments you might have.


Thanks,

David Spickett.

________________________________
From: cfe-dev <cfe-dev-bounces at lists.llvm.org> on behalf of David Spickett via cfe-dev <cfe-dev at lists.llvm.org>
Sent: 12 October 2018 12:01:16
To: Bryan Chan; Renato Golin
Cc: nd; Clang Dev
Subject: Re: [cfe-dev] [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64


Hi Bryan,


Looks like arm will enable it, but AArch64 doesn't. I haven't been able to find a reason for this.


$ ./clang --target=aarch64-arm-none-eabi -march=armv8.4-a -dM -E -x c /dev/null | grep DOTPROD
$ ./clang --target=arm-arm-none-eabi -march=armv8.4-a -dM -E -x c /dev/null | grep DOTPROD
#define __ARM_FEATURE_DOTPROD 1


That define being the one that gates the intrinsics in the header.


This is certainly something we want to address with these proposed changes.


I have a feeling doing a fix now may require info we don't have. Since dot product is fairly straightforward but other 'default' extensions may have more complex dependencies. If you have ideas already we can discuss further, perhaps on a bug report?


Thanks,

David Spickett.


________________________________
From: Bryan Chan <bryan.chan at huawei.com>
Sent: 11 October 2018 23:48
To: David Spickett; Renato Golin
Cc: nd; Clang Dev
Subject: RE: [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64


Hi David,



Yes, the assembly example works for me on AArch64 as well. The problematic use case for me was this:



$ cat vdot-c.c

#include <arm_neon.h>



uint32x2_t foo (uint32x2_t r, uint8x8_t x, uint8x8_t y)

{

  return vdot_u32 (r, x, y);

}



$ ./bin/clang --target=aarch64-unknown-linux-gnu -march=armv8.4-a+dotprod -o /dev/null -c vdot-c.c



$ ./bin/clang --target=aarch64-unknown-linux-gnu -march=armv8.4-a -o /dev/null -c vdot-c.c

vdot-c.c:5:10: warning: implicit declaration of function 'vdot_u32' is invalid in C99 [-Wimplicit-function-declaration]

  return vdot_u32 (r, x, y);

         ^

vdot-c.c:5:10: error: returning 'int' from a function with incompatible result type 'uint32x2_t' (vector of 2 'uint32_t' values)

  return vdot_u32 (r, x, y);

         ^~~~~~~~~~~~~~~~~~

1 warning and 1 error generated.



It seems wrong to me that clang doesn't call llvm::AArch64::getDefaultExtensions when handling -march=, but there might be a good reason for not doing so.



Thanks,

--
Bryan Chan



From: David Spickett [mailto:David.Spickett at arm.com]
Sent: Thursday, October 11, 2018 9:40 AM
To: Bryan Chan <bryan.chan at huawei.com>; Renato Golin <renato.golin at linaro.org>
Cc: nd <nd at arm.com>; Clang Dev <cfe-dev at lists.llvm.org>
Subject: Re: [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64



Hi Bryan,



Can you give some more detail on what you're seeing? I tried an assembly example and that works:



$ cat /tmp/test.s
vudot.u8 d0, d1, d2
vsdot.s8 d0, d1, d2
$ ./clang --target=arm-arm-none-eabi -march=armv8.4-a -c /tmp/test.s -o /tmp/test.o



Maybe you're referring to something higher level than that, or a combination of mcpu/march?



Thanks,

David Spickett.



________________________________

From: Bryan Chan (Canada Research Centre) <bryan.chan at huawei.com<mailto:bryan.chan at huawei.com>>
Sent: 09 October 2018 18:41
To: David Spickett; Renato Golin
Cc: nd; Clang Dev
Subject: RE: [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64



Hi David et al.,



Great job on the proposal. I have recently run into the problem of mandatory features, and was actually contemplating a possible fix. It seems that currently mandatory features in the various ARMv8.x architectures are not enabled in cfe by default, which is surprising and inconsistent with GCC's behavior. For example, -march=armv8.4-a does not turn on the dot-product extension. The cause is that we are ignoring the ArchBaseExtensions bits in TargetParser.cpp unless -mcpu is specified. Was there a reason for handling -march like this?



--
Bryan



From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of David Spickett via llvm-dev
Sent: Tuesday, September 25, 2018 10:54 AM
To: Renato Golin <renato.golin at linaro.org<mailto:renato.golin at linaro.org>>
Cc: LLVM Dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>>; nd <nd at arm.com<mailto:nd at arm.com>>; Clang Dev <cfe-dev at lists.llvm.org<mailto:cfe-dev at lists.llvm.org>>
Subject: Re: [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64



Hi Eli, Renato,

Thanks for your feedback, there's a lot more to some of these things than I knew. I've addressed your points below.

The overall summary is:
- Start with converting the TargetParser to tableGen, with no user facing changes
- Add warnings based on that, behind -Wall. Starting with command lines, since directives have
larger implications that need investigation

Thanks,
David Spickett.


mandatory features
==================

>> Could you go into a bit more detail about mandatory features?  I'm pretty sure people are using the extension functionality to turn off features which are technically mandatory according to the reference manual, like floating-point in armv8a.

>> I'd be more comfortable if these weren't enabled by default, but were
present in -Wall.

It seems like a large portion of the architecturally invalid combinations have a technical reasoning. So I'd amend that point from:

"- Emit a warning when a mandatory feature of the base architecture is enabled with '+extension', or disabled with '+noextension'. (and ignore the option)"

to

" - Emit a warning when a mandatory feature of the base architecture is enabled with '+extension', or disabled with '+noextension'."

So the option doesn't change behaviour and as Renato suggested we don't make them errors by default. So it's visible if you want to check these things but it's not going to break existing code. Anyone who wants an error can always upgrade it if required.

Use of Tablegen
===============

>> Maybe you could put it into some existing library, like libLLVMTarget.

This would be a little easier but with what Renato said...

>> Option 1 makes everyone pay the cost and can be a lot harder to make
it flexible and "zero-cost".

I think we want to stick with the second way. This (from what I understand) also helps with the goal of reusing existing tablegen.

>> One additional goal we had in the past, when we first wrote the
TargetParser was to use the *existing* target description table-gen
files to generate the parser tables.

I should have been more clear, "unify the list of extensions that command lines and asm directives use" is sort of the same thing just muddled. As discussed above I think we can achieve this, I'm sure I'll hit the same issues you did Renato but hopefully they aren't showstoppers.

"target" attribute (Eli)
==================

>> One thing this doesn't mention is clang's "target" attribute for functions; have you considered that at all?

I hadn't, thanks for pointing that out.

As far as I can tell, we only support cpu names via the target attribute:
__attribute__((target("arch=cortex-a75")))
Whereas this doesn't work:
__attribute__((target("arch=armv8-a+crc")))

We don't plan to add this as part of this work, but of course you could specify invalid combinations with a CPU and some combination of other directives and options. These would be warnings following the ones already mentioned.

I need to do some more investigation to work out exactly what invalid combinations you could produce. So this will be a latter part of the work if at all.

"Negative" backend features (Eli)
===========================

>> This seems mostly orthogonal?  At least I mean, I guess it might make the translation from TargetParser features to LLVM features slightly easier, but it seems like there could be some unexpected implications, so I don't want to tie it to this change.

Agreed, it would certainly be a separate patch. It might not be needed so I will work on the tablegen conversion without changing any of this and see how it goes.

>> they're the only negative features that are relevant for TargetParser?

Yes, the rest are for internal use aka not enabled by a specific option. For a particular CPU for example.

'auto' FPU value (Renato)
================

>> I'd have assumed -mfpu is already "auto" by default. Or is this to
>> just override a previous option?
>>
>> ex: clang -mcpu cortex-a8 -mfpu vfp4 -mfpu auto -> defaults back to VFP3.

I don't see any reference to this in the code or the docs, and clang something similair:
./clang --target=arm-arm-none-eabi -mcpu=cortex-a8 -mfpu=vfp4 -mfpu=auto -c /tmp/test.c
clang-8: error: the clang compiler does not support '-mfpu=auto'

Maybe I'm missing something.

ACLE macros (Renato)
===========

>> The base arch is armv8.4-a, the crypto extension turns on AES/SHA2/SHA3/SM4. The nosha2 disables SHA2/>SHA3 (since SHA3 is dependant on SHA2). Each of these features has an ACLE feature test macro, so Clang >needs to know that nosha2 also disables SHA3.

>Is this complex logic done by GCC's front-end as well?

I don't think so, you might be right there. We will look into exactly what GCC has implemented before making any moves here.

Errors (Renato)
======

>> Errors:
>> - unknown extension in an assembly directive (currently fails silently)
>>    IIRC, this is by design.

If that's the case then we'll keep the behaviour. Again with warnings under -Wall.

My impression of it came more from me trying to work out what was a valid option at all. However if we can improve the documentation and consistency between directives and command line options that won't be an issue.

>> Define "incompatible". Older Arm cores could have new features that
wasn't even define in its own standard because manufacturers upgraded
the extra but not the core.

Good point, I suppose "incompatible" in the way I wrote it means "not listed as an off the shelf config". Which you're right, doesn't cover everything. So yes, agreed on defaulting to warnings behind -Wall.

>> - mandatory feature of the base arch is enabled with '+' (option is redundant so is ignored)

Agreed, also as discussed above it should not ignore the option. (unless it is actually a nop in that situation or completely impossible)

>> .arch_extension was implemented because GCC does it. I'm not sure what
you mean by that, but I'm not happy with removing it, as it will break
scores of assembly files out there.

I put it there to put the choice between being GCC compatible and being consistent within Clang itself. I've quickly realised that the former is more important.

>> This makes sense, but will likely require changes in a lot of existing
low-level assembly files, which choose a generic .cpu and vary
.fpu/.arch_extension to implement independent functionality (like
unwinders).

Again I didn't know about that use case. It's definitely a later goal and I think there needs to be more investigation before we could make any changes.

>> I strongly recommend that you do not change *any* user-facing
behaviour until the underlying parser changes are done and released
upstream.

After what I've read here I'm fully on board with that.



________________________________

From: Renato Golin <renato.golin at linaro.org<mailto:renato.golin at linaro.org>>
Sent: 24 September 2018 21:51:01
To: David Spickett
Cc: Clang Dev; LLVM Dev; nd
Subject: Re: [llvm-dev] [RFC] New Clang target selection options for ARM/AArch64



On Fri, 21 Sep 2018 at 11:06, David Spickett via llvm-dev
<llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
> Below is a document detailing changes we'd like to make to Clang/LLVM to improve the usability of the target options for ARM and AArch64.

Hi David,

This is *awesome*. Thanks for such a detailed analysis!


> In this RFC we propose changes to ARM and AArch64 target selection. With the top level goals to:
> - validate that given options make sense within architectural restrictions
> - make option discovery and documentation easier
> - unify the list of extensions that command lines and asm directives use
> - bring the options closer to GCC's where appropriate

One additional goal we had in the past, when we first wrote the
TargetParser was to use the *existing* target description table-gen
files to generate the parser tables.

This means new changes to cores, sub-arches, and fixes to existing
ones will *automatically* be translated to command line and assembly
parsing.



> Proposed solution
> ------------------
>
> ARM and AArch64:
> - Make the TargetParser the single source for extension names, removing the AsmParser tables.
> - Reject unknown extension names with a diagnostic that includes a list of valid extensions for that architecture/CPU.
> - Reject invalid combinations of architecture/CPU and extensions with an error diagnostic.
> - Add independent subtarget features for each extension so that v8.x+1-a extensions can be used individually with earlier v8.x-a architectures where allowed.

SGTM.

> - Emit a warning when a mandatory feature of the base architecture is enabled with '+extension', or disabled with '+noextension'. (and ignore the option)
> - Errors caused by the solution above should be able to be downgraded to warnings with the usual -W* options. This applies only to cases where there is a reasonable interpretation of the options chosen.

I'd be more comfortable if these weren't enabled by default, but were
present in -Wall.

Writing generic and precise build systems is a nightmare, which is the
biggest reason why compilers generally ignore nonsense options
silently.


> ARM:
> - Allow all possible ARM extensions in the '.arch_extension' directive, without the '+' syntax
> (allow them to be recognised, they could still be rejected for compatibility).
> - Reject invalid mfpu and march/mcpu combinations with an error diagnostic.
> - Reject invalid arch/cpu and extension combinations with an error diagnostic.

SGTM.

> - Add an 'auto' value for -mfpu and make it the default. Meaning that the FPU is implied by mcpu/march. If mfpu is not auto, it should override other options and a warning should be emitted.

I'd have assumed -mfpu is already "auto" by default. Or is this to
just override a previous option?

ex: clang -mcpu cortex-a8 -mfpu vfp4 -mfpu auto -> defaults back to VFP3.



> Optional features
> -----------------
>
> AArch64:
> - add the '.arch_extension' directive, with the same behaviour as ARM (no '+', one extension per directive). This brings Clang in line with GCC which has this directive for both architectures. Clang does however allow you to achieve the same thing by using '+' with '.arch'.
>
> ARM:
> - Allow '+' in '.arch' and '.cpu'. GCC does not allow this, but it would make ARM/AArch64 more consistent within Clang.

I see no reason to be inconsistent with GNU tools here. We can have
more, but we should not have less or different behaviour.


> Use of Table-gen
> ================
>
> We think the benefits outweigh the disadvantages in this case.

Agreed!


> To do this, we would need to move TargetParser to break the cyclic dependency of LLVMSupport -> llvm-tblgen -> LLVMSupport. There are 2 options for this:
> 1. create a new LLVMTargetParser library that contains all parsers for architectures that use it.
> 2. put the TargetParser for each backend in the library group for that backend. This requires one of:
>     * Relaxing the requirement that target parsers must be built even if the backend is not.
>     * Modifying the CMake scripts to build the target parsers even if the backend is not being built.
>
> Option 1 is simpler but option 2 would allow us to make use of the existing tablegen files in the backends so it is preferred.

Option 1 makes everyone pay the cost and can be a lot harder to make
it flexible and "zero-cost". This is the reason why it was changed
from a class-based model to a static function / table model.

I had a go at option 2 years ago and it works. You need to fiddle a
bit with the CMake file in lib/Targets (to prepare the inc files even
if targets aren't being built, because Clang needs to use it for all
supported targets regardless).

It wasn't upstreamed because the hard part is to re-use the existing
table-gen files for a new back-end, which would generate the tables.
Not so much writing the new back-end, but making sure the data we need
isn't redundant or contradictory (which it was both) across all
table-gen files. We also had to add new options to the targets (define
new classes, etc) which were solely used by the parser, so were harder
to justify on its own and needed a much more extensive validation than
we had bandwidth for.


> Consider this AArch64 march:
> -march=armv8.4-a+crypto+nosha2
>
> The base arch is armv8.4-a, the crypto extension turns on AES/SHA2/SHA3/SM4. The nosha2 disables SHA2/SHA3 (since SHA3 is dependant on SHA2). Each of these features has an ACLE feature test macro, so Clang needs to know that nosha2 also disables SHA3.

Is this complex logic done by GCC's front-end as well?

It would be pretty cool to have it smart like that, but we also have
to be careful to have a rock solid model before improving on GCC's
(potentially broken) functionality, and hopefully someone talking to
them on the side.

The amount of noise that comes every time we change the command line
options interpretation is non-trivial. :)


> Errors:
> - unknown extension in an assembly directive (currently fails silently)

IIRC, this is by design.

Imagine a macro that defines .cpu in an asm file to multiple things,
and the rest of the file has .fpu all over the place, with support for
all .cpu options, but with the guarantee that those functions will
only be compiled/executed if the .cpu is correct.

This may sound weird, but some libraries (ex. unwind) actually depend
on weird behaviour like that.


> - extension incompatible with base arch, message shows the base arch it requires.
> - extension requires another which is disabled later, message shows which one is required.
> - extension requires another which is not enabled, message shows requirements.
> - ARM mfpu option is not 'auto' and is incompatible with the base arch, message shows list of valid FPUs.

Define "incompatible". Older Arm cores could have new features that
wasn't even define in its own standard because manufacturers upgraded
the extra but not the core.

I'm happy to have errors for things that are impossible, like "ARMv5
AArch64" or enabling and disabling intersecting groups that cannot be
represented in the compiler.

I'm happy to have warnings, possibly only under -Wall, for nonsense
options like "ARMv5 VFP4" or "ARMv8A IWMMX".


> Warnings:
> - ARM mfpu option is not auto and another option implies a different FPU than the mfpu value. The mfpu value will be used, and the message will show what was overridden.

This is nice.

> - mandatory feature of the base arch is enabled with '+' (option is redundant so is ignored)

Maybe under -Wall?

> - mandatory feature of a base arch is disabled with '+no<feature>' (option makes no sense so the extension remains enabled)

Arm is a flexible architecture, and build systems are crazy. This will
likely confuse a lot of builds in the wild.

I'd avoid it unless in -Wall.


> .arch_extension Directive
> =========================
>
> We can handle this in a few of ways:
> - Remove .arch_extension in favour of .arch. This conflicts with the option above to add it to AArch64 to bring us in line with GCC, and will break a lot of code written for older versions of Clang.

.arch_extension was implemented because GCC does it. I'm not sure what
you mean by that, but I'm not happy with removing it, as it will break
scores of assembly files out there.

> - Track the current base target, as implied by the command line or the last .arch/.cpu directive. This makes the directives as similar to the command lines as they can be without breaking backwards compatibility.

This makes sense, but will likely require changes in a lot of existing
low-level assembly files, which choose a generic .cpu and vary
.fpu/.arch_extension to implement independent functionality (like
unwinders).

If you read the GNU manuals, the assembly directives is more to allow
the assembler to relax checks than enforce them more.

I personally like strong checks, but the problems we have with inline
assembly will come crashing in assembly files if we start tightening
the checks there, too.

It's a worthy long goal, but it's a loooong goal and you don't want
your current TargetParser work to depend on that.


> $ ./clang --target=arm-arm-none-eabi -march=armv7-m -mfpu=neon-fp16 -c /tmp/test.c -o /tmp/test.o
> (should be invalid but is allowed)
>
> $ ./arm-eabi-gcc -march=armv7-m -mfpu=neon-fp16 -c /tmp/test.c -o /tmp/test.o
> (same example given for Clang above, should be invalid)

If both are allowed, I'd recommend you not to change it in this
current pass. Let's get the parser fixed before changing overall
behaviour.


> Dependencies within extensions are not checked. For example crypto requires simd, but it can be disabled in the same march option.
>
> $ ./clang --target=aarch64-arm-none-eabi -march=armv8-a+crypto+nosimd -c /tmp/test.c -o /tmp/test.o
>
> Extensions are rejected if not recognised but not checked for compatibility. Hence the Clang crypto/simd example above is allowed with GCC too.
>
> $ ./aarch64-elf-gcc -march=armv8-a+crypto+nosimd -c /tmp/test.c -o /tmp/test.o
> (should not be allowed)

This is unlikely to change, let alone in the time frame of your work.

I strongly recommend that you do not change *any* user-facing
behaviour until the underlying parser changes are done and released
upstream.

--
cheers,
--renato
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/cfe-dev/attachments/20181105/ed50fc3d/attachment.html>