[cfe-dev] [RFC] Allocatable Global Register Variables for ARM
Carey Williams via cfe-dev
cfe-dev at lists.llvm.org
Fri Dec 21 08:08:50 PST 2018
Hi all,
This is a RFC on support for Global Register Variables in the Arm backend.
Whilst there has been some prior discussion about whether or not LLVM should (or even needs to) support global register variables,
today there seems to be a good measure of support for this in both Clang+LLVM (although it is currently limited to SP).
When most of this support landed there was some concern expressed around the difficulty of extending it to cover allocatable registers.
We have been looking at building atop of this current support to provide that ability to reserve allocatable registers.
Our primary (bare-metal) use-cases for such support are:
1. Holding pointers for frequently-accessed data.
2. Placement of secure values (e.g. checksums) in specific registers to prevent them from being written out to main memory.
This proposal aims to provide support for using r4-r11 as global register variables. This involves adding them to the reserved register set
and preventing them from being callee-saved. We have deliberately tried to avoid registers that have a distinct ABI/AAPCS use,
such as call-clobbered registers, LR and PC etc. Naturally the current support for the stack-pointer remains.
r7, r11 and r9 at least are special cases, and are mentioned in more detail below.
Clang Changes
----------------------
The main proposed functional change to Clang is the tracking of global register variable declarations via module flags.
Each declaration in a translation unit such as "register unsigned int foo __asm("r4");", will be mapped by the front-end to a module flag.
e.g.
---
!{i32 1, !"fixed_reg.foo", !"r4"}
---
This is achieved via a modification to CodeGenModule::EmitGlobal. In addition, there are some changes relating
to specifying valid global registers (by adding an Arm override for isValidGlobalRegister),
Draft Patch: https://reviews.llvm.org/D56003
LLVM Changes
----------------------
In the LLVM backend we can then use the module flags to add any (valid) specified global registers to the
reserved reg list (getReservedRegs). In addition, to satisfy the second use-case*, we use the flags to remove
any (valid) global registers from the list of callee registers to be saved (determineCalleeSaves).
This shouldn't have any negative impact on a register that is already reserved for use.
GCC seems to exhibit similar behaviour:
"If the register is a call-saved register, call ABI is affected: the register will not be restored in function epilogue sequences after the variable has been assigned."
See: https://gcc.gnu.org/onlinedocs/gcc/Global-Register-Variables.html#Global-Register-Variables
Draft Patch: https://reviews.llvm.org/D56005
A Note on r7, r11 and r9
----------------------------------
Whilst generally considered allocatable, these registers can on occasion be reserved for other purposes.
As frame pointers, in the case of r7, and r11, and via -ffixed-r9 (or -frwpi), in the case of r9.
The attached patches do not currently provide any mitigations against these cases.
Options could range from disallowing these registers entirely, to throwing warnings or
trying to catch and error in the correct scenarios (e.g. usage -ffixed-r9 when r9 is declared as a global reg variable).
GCC's behaviour for many registers (at least notably, the call-clobbered registers, e.g. r0-r3), is to throw a warning, rather than an error.
Other Notes
----------------------
- It's worth noting that we may also look into extending this to cover AArch64 as well, in the near future.
- Extending this proposal to work with a -ffixed-reg option should be feasible (if desired).
- GCC warns when two global variables refer to the same register - this implementation silently accepts it.
Previous Patches/Discussion
------------------------------------------
- https://reviews.llvm.org/D3261
- https://reviews.llvm.org/D3797
- http://lists.llvm.org/pipermail/llvm-dev/2014-March/071472.html
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