[cfe-dev] Cortex-M4F Assembly Code Generation Incorrect for float casting, causing HardFaults

[Dan Walmsley via cfe-dev]

If have filed a bug here:


https://bugs.llvm.org/show_bug.cgi?id=34143

________________________________
From: cfe-dev <cfe-dev-bounces at lists.llvm.org> on behalf of Dan Walmsley via cfe-dev <cfe-dev at lists.llvm.org>
Sent: 10 August 2017 13:41:39
To: cfe-dev at lists.llvm.org; Hans Wennborg
Subject: [cfe-dev] Cortex-M4F Assembly Code Generation Incorrect for float casting, causing HardFaults


Basically the following code can repro the issue:


Compile flags are:

Wall -c -fshort-enums -ggdb3 -std=c++14 -fno-rtti -fno-exceptions -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -O1 -target arm-none-eabi -mcpu=cortex-m4 -mthumb


code to reproduce is:


```

template <typename T> inline T Read (uint8_t* data)
{
    auto valuePtr = reinterpret_cast<T*> (data);

    auto value = *valuePtr;

    return value;
}

static float test = 180.0f;

int main (void)
{
    uint8_t* data = new uint8_t[8];

    memcpy (data, &test, sizeof (float));

    auto value = Read<float> (data);


    memcpy (data + 1, &test, sizeof (float));

    value = Read<float> (data + 1); // hard fault here!

    return value;
}

```


My diagnosis is that when it dereferences the float pointer it uses the VLDR instruction, https://developer.arm.com/docs/100069/0607/advanced-simd-instructions-32-bit/vldr


This instruction can only be used on word aligned boundaries.


So It works for first call to my Read method, but the second call which is not aligned, it crashes.


Not sure who is the right person to fix this.


I will reply with  a bug, once I manage to login to the bug database.

Thanks

Dan

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