[cfe-dev] RFC: Support x86 interrupt and exception handlers

[Joerg Sonnenberger via cfe-dev]

On Wed, Sep 16, 2015 at 06:11:49AM -0700, H.J. Lu via cfe-dev wrote:
> On Wed, Sep 16, 2015 at 1:28 AM, David Chisnall
> <David.Chisnall at cl.cam.ac.uk> wrote:
> > On 15 Sep 2015, at 23:17, H.J. Lu via cfe-dev <cfe-dev at lists.llvm.org> wrote:
> >>
> >> In my proposal, there are only 2 handlers: interrupt and exception.
> >> __builtin_interrupt_data is provided to programmers to implement
> >> different variants of those handlers.
> >
> > The thing that is still missing here is a use case.  Interrupt handlers in existing operating systems all contain some assembly code because they need to do complicated things, like mask interrupts long enough to get a consistent state, store things in OS-specific context switch structures, and so on.  I can’t imagine any OS using this feature in the compiler.
> >
> > Existing compilers provide similar functionality for embedded targets, where you are not running an OS, but these often rely on some assembly code shipped with the compiler to allow the C versions to work (do you intend to contribute this code to compiler-rt for x86?).  Are enough (any?) people doing bare-metal x86 embedded work for this to be a useful feature?
> >
> 
> Yes, this feature is intended for IA MCU, which runs bare-metal/embedded
> OS.  I don't know how compiler-rt will be used for this purpose.  Do you
> have an example?

See my earlier question on the same topic. For amd64, the entry code of
an interrupt handler is quite non-trivial and non-portable. The logic
for getting %gs correctly working is quite specific. Very short
interrupt handlers that can benefit from not spilling all registers is
by far the exception from the code I have seen.

Joerg