[cfe-dev] Alignment of bitfield structs

[Bradley Smith]

> On 20 April 2015 at 14:57, Bradley Smith <bradley.smith at arm.com> wrote:
> > From what I can tell there are only 2 ways to fix this, either have
> clang
> > not combine the bitfield into an i40, or somehow pass the bitfield
> layout
> > down to LLVM. Neither of these seem particularly easy to do, what are
> others
> > thoughts on this, have I missed something? Thanks.
> 
> Hi Bradley,
> 
> We had similar issues when we did te EDG bridge and IIRC, the issue
> depends on how you lower the bitfield access logic.
> 
> Your two proposals are similar in that they suggest keeping the
> information down the pipeline. Either way, keeping that information
> valid for too long is going to be a pain, mainly because the current
> passes don't account for anything special from bitfields. In theory,
> bitfields are just a blob with complicated accessors, and no pass
> should break that, unless the pass itself is broken.

Perhaps an alternative is to somehow mark the load as 'this is really only align 4, please don't increase it', although that could just cause cases where things can't be optimized as well as they could be..

> Can you give an example of a piece of IR that breaks and maybe finding
> if there is an optimisation pass that, if omitted, produces good code?

Attached is the IR I am using (produced from the C code in my original mail), when run through opt -instcombine the behavior I noted is observed.

Regards,
Bradley Smith
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