[cfe-dev] ARM assembler regression?

[Oliver Stannard]

This was caused by using “-mfpu=vfpv3-d16”, which only has 16 D registers. Switching to –mfpu=vfpv3 (with 32 D registers) is safe for Cortex-A targets, as all Cortex-A CPUs have 32 D registers (or no FPU).

 

Oliver

 

From: İsmail Dönmez [mailto:ismail at donmez.ws] 
Sent: 07 November 2014 13:58
To: Oliver Stannard
Cc: cfe-dev at cs.uiuc.edu; Renato Golin
Subject: Re: [cfe-dev] ARM assembler regression?

 

Hi,

 

On Fri, Nov 7, 2014 at 3:51 PM, Oliver Stannard <oliver.stannard at arm.com> wrote:

Hi İsmail,

 

I committed a patch (r221341) a few days ago to prevent the assembler and disassembler form accepting D16-D31 for the FPUs of Cortex-M cores, which only have 16 D registers. I’m assuming you were originally compiling for v7M? It looks like that file will need some additional conditionalization before it can be used for Cortex-M targets.

 

Actually no. My compile flags are:

 

-mfloat-abi=hard -march=armv7-a -mtune=cortex-a8 -mfpu=vfpv3-d16

 
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