[cfe-dev] [libcxx]: std::atomic for cortex-m3 - ARMv7-M

Eli Friedman eli.friedman at gmail.com
Sat Sep 22 12:20:38 PDT 2012

On Sat, Sep 22, 2012 at 7:20 AM, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> On Sat, Sep 22, 2012 at 2:24 PM, salvatore benedetto
> <salvatore.benedetto at gmail.com> wrote:
>> Hi there,
>> I'm trying to use std::atomic<> for a cortex-m3 target (ARMv7-M Thumb-2),
>> but it seems not to be supported (It compiles OK on my x86_64 host).
>>  error: cannot compile this atomic library call yet
>>         {return __c11_atomic_fetch_sub(&this->__a_, __op, __m);}
>>                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> I wonder where I can find more information about this subject.
>> Is anyone working on adding support for this? Or is it even possible
>> since, from what I know, ARMv7-M provide special instruction that only
>> works on special memory area (bit-band)?
> After a bit of investigation I figured that the ARMv7-M also provide the
> LDREX/STREX for exclusive memory access.
> I've also noticed that by generating the intermediate assembly code
> by using as target my host architecture (x86_64), and then compiling
> the intermediate
> assembly code with llc with -mcpu=cortex-m3 (thumb2) as target, it compiles
> fine to assembly code, and it uses the LDREX/STREX instructions,
> I'm not that familiar with neither LLVM IR assembly, nor the ARMv7-M instruction
> set, so if some expert could jump in I'd really appreciate it. :-)

There's a FIXME in lib/Basic/Targets.cpp "// FIXME: Set
MaxAtomicInlineWidth if we have the feature v6e".


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