[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

[Lewis Revill via Phabricator via cfe-commits]

lewis-revill updated this revision to Diff 174360.
lewis-revill edited the summary of this revision.
lewis-revill added a comment.

Updated to reflect desired changes (and fix an incorrect boundary). I didn't add r & m to riscv-inline-asm.c as I wasn't clear what exactly was desired.


Repository:
  rC Clang

https://reviews.llvm.org/D54091

Files:
  lib/Basic/Targets/RISCV.cpp
  lib/Basic/Targets/RISCV.h
  test/CodeGen/riscv-inline-asm.c
  test/Sema/inline-asm-validate-riscv.c

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D54091.174360.patch
Type: text/x-patch
Size: 4049 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20181116/65b12965/attachment-0001.bin>