[PATCH] D52807: [COFF, ARM64] Add _InterlockedCompareExchangePointer_nf intrinsic
Mandeep Singh Grang via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Oct 4 14:01:52 PDT 2018
mgrang added a comment.
MSVC seems to generate ldaxr/stlxr (as well as dmb) for InterlockedCompareExchangePointer and ldxr/stxr for InterlockedCompareExchangePointer_nf.
void *test_InterlockedCompareExchangePointer(void * volatile *Destination,
void *Exchange, void *Comparand) {
return _InterlockedCompareExchangePointer(Destination, Exchange, Comparand);
}
test_InterlockedCompareExchangePointer:
58: ff 83 00 d1 sub sp, sp, #32
5c: e0 0b 00 f9 str x0, [sp, #16]
60: e1 07 00 f9 str x1, [sp, #8]
64: e2 03 00 f9 str x2, [sp]
68: ec 03 40 f9 ldr x12, [sp]
6c: ec 03 0c aa mov x12, x12
70: eb 07 40 f9 ldr x11, [sp, #8]
74: eb 03 0b aa mov x11, x11
78: ea 0b 40 f9 ldr x10, [sp, #16]
7c: ea 03 0a aa mov x10, x10
$LN3:
80: 49 fd 5f c8 ldaxr x9, [x10]
84: e9 03 09 aa mov x9, x9
88: 3f 01 0c eb cmp x9, x12
8c: 81 00 00 54 b.ne #16 <$LN4>
90: 4b fd 08 c8 stlxr w8, x11, [x10]
94: 1f 01 00 71 cmp w8, #0
98: 41 ff ff 54 b.ne #-24 <$LN3>
$LN4:
9c: bf 3b 03 d5 dmb ish
a0: e9 0f 00 f9 str x9, [sp, #24]
a4: e0 0f 40 f9 ldr x0, [sp, #24]
a8: ff 83 00 91 add sp, sp, #32
ac: c0 03 5f d6 ret
void *test_InterlockedCompareExchangePointer_nf(void * volatile *Destination,
void *Exchange, void *Comparand) {
return _InterlockedCompareExchangePointer_nf(Destination, Exchange, Comparand);
}
test_InterlockedCompareExchangePointer_nf:
0: ff 83 00 d1 sub sp, sp, #32
4: e0 0b 00 f9 str x0, [sp, #16]
8: e1 07 00 f9 str x1, [sp, #8]
c: e2 03 00 f9 str x2, [sp]
10: ec 03 40 f9 ldr x12, [sp]
14: ec 03 0c aa mov x12, x12
18: eb 07 40 f9 ldr x11, [sp, #8]
1c: eb 03 0b aa mov x11, x11
20: ea 0b 40 f9 ldr x10, [sp, #16]
24: ea 03 0a aa mov x10, x10
$LN3:
28: 49 7d 5f c8 ldxr x9, [x10]
2c: e9 03 09 aa mov x9, x9
30: 3f 01 0c eb cmp x9, x12
34: 81 00 00 54 b.ne #16 <$LN4>
38: 4b 7d 08 c8 stxr w8, x11, [x10]
3c: 1f 01 00 71 cmp w8, #0
40: 41 ff ff 54 b.ne #-24 <$LN3>
$LN4:
44: e9 0f 00 f9 str x9, [sp, #24]
48: e0 0f 40 f9 ldr x0, [sp, #24]
4c: ff 83 00 91 add sp, sp, #32
50: c0 03 5f d6 ret
54: 00 00 00 00 <unknown>
Repository:
rC Clang
https://reviews.llvm.org/D52807
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