r340911 - [ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
Sam Parker via cfe-commits
cfe-commits at lists.llvm.org
Wed Aug 29 03:39:03 PDT 2018
Author: sam_parker
Date: Wed Aug 29 03:39:03 2018
New Revision: 340911
URL: http://llvm.org/viewvc/llvm-project?rev=340911&view=rev
Log:
[ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
ARM_FEATURE_DSP is already set for targets with the +dsp feature. In
the backend, this target feature is also used to represent the
availability of the of the instructions that the ACLE guard through
the __ARM_FEATURE_SIMD32 macro. We don't have any cores that
implement one and not the other, so set this macro for cores later
than V6 or for Cortex-M cores that the target parser, or user, reports
that the 'dsp' instructions are supported.
Differential Revision: https://reviews.llvm.org/D51093
Modified:
cfe/trunk/lib/Basic/Targets/ARM.cpp
cfe/trunk/test/Preprocessor/arm-acle-6.4.c
Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=340911&r1=340910&r2=340911&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/ARM.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp Wed Aug 29 03:39:03 2018
@@ -661,7 +661,7 @@ void ARMTargetInfo::getTargetDefines(con
}
// ACLE 6.4.9 32-bit SIMD instructions
- if (ArchVersion >= 6 && (CPUProfile != "M" || CPUAttr == "7EM"))
+ if (ArchVersion >= 6 || (CPUProfile == "M" && DSP))
Builder.defineMacro("__ARM_FEATURE_SIMD32", "1");
// ACLE 6.4.10 Hardware Integer Divide
Modified: cfe/trunk/test/Preprocessor/arm-acle-6.4.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/arm-acle-6.4.c?rev=340911&r1=340910&r2=340911&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/arm-acle-6.4.c (original)
+++ cfe/trunk/test/Preprocessor/arm-acle-6.4.c Wed Aug 29 03:39:03 2018
@@ -174,10 +174,14 @@
// CHECK-V7M: __ARM_FEATURE_SAT 1
// CHECK-V7M: __ARM_FEATURE_UNALIGNED 1
-// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V7EM
+// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
+// RUN: %clang --target=arm-arm-none-eabi -march=armv8m.main+dsp -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
-// CHECK-V7EM: __ARM_FEATURE_DSP 1
-// CHECK-V7EM: __ARM_FEATURE_SIMD32 1
+// CHECK-M-DSP: __ARM_FEATURE_DSP 1
+// CHECK-M-DSP: __ARM_FEATURE_SIMD32 1
// RUN: %clang -target arm-none-linux-eabi -march=armv8-a -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8A
More information about the cfe-commits
mailing list