[PATCH] D49376: [NEON] Define half-precision vrnd intrinsics only when available
Sjoerd Meijer via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 23 01:43:40 PDT 2018
SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: include/clang/Basic/arm_neon.td:1419
// Vector rounding
- def FRINTZH : SInst<"vrnd", "dd", "hQh">;
- def FRINTNH : SInst<"vrndn", "dd", "hQh">;
- def FRINTAH : SInst<"vrnda", "dd", "hQh">;
- def FRINTPH : SInst<"vrndp", "dd", "hQh">;
- def FRINTMH : SInst<"vrndm", "dd", "hQh">;
- def FRINTXH : SInst<"vrndx", "dd", "hQh">;
+ let ArchGuard = "__ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)" in {
+ def FRINTZH : SInst<"vrnd", "dd", "hQh">;
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nit: is the indentation a bit off here?
https://reviews.llvm.org/D49376
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