r336488 - [X86] Change _mm512_shuffle_pd and _mm512_shuffle_ps to use target specific shuffle builtins instead of generic __builtin_shufflevector.
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Sat Jul 7 10:03:34 PDT 2018
Author: ctopper
Date: Sat Jul 7 10:03:34 2018
New Revision: 336488
URL: http://llvm.org/viewvc/llvm-project?rev=336488&view=rev
Log:
[X86] Change _mm512_shuffle_pd and _mm512_shuffle_ps to use target specific shuffle builtins instead of generic __builtin_shufflevector.
I added the builtins for 128, 256, and 512 bits recently but looks like I failed to convert to using the 512 bit one.
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=336488&r1=336487&r2=336488&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Sat Jul 7 10:03:34 2018
@@ -6699,16 +6699,8 @@ _mm512_maskz_srai_epi64(__mmask8 __U, __
(__v8di)_mm512_setzero_si512())
#define _mm512_shuffle_pd(A, B, M) \
- (__m512d)__builtin_shufflevector((__v8df)(__m512d)(A), \
- (__v8df)(__m512d)(B), \
- 0 + (((M) >> 0) & 0x1), \
- 8 + (((M) >> 1) & 0x1), \
- 2 + (((M) >> 2) & 0x1), \
- 10 + (((M) >> 3) & 0x1), \
- 4 + (((M) >> 4) & 0x1), \
- 12 + (((M) >> 5) & 0x1), \
- 6 + (((M) >> 6) & 0x1), \
- 14 + (((M) >> 7) & 0x1))
+ (__m512d)__builtin_ia32_shufpd512((__v8df)(__m512d)(A), \
+ (__v8df)(__m512d)(B), (int)(M))
#define _mm512_mask_shuffle_pd(W, U, A, B, M) \
(__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \
@@ -6721,24 +6713,8 @@ _mm512_maskz_srai_epi64(__mmask8 __U, __
(__v8df)_mm512_setzero_pd())
#define _mm512_shuffle_ps(A, B, M) \
- (__m512)__builtin_shufflevector((__v16sf)(__m512)(A), \
- (__v16sf)(__m512)(B), \
- 0 + (((M) >> 0) & 0x3), \
- 0 + (((M) >> 2) & 0x3), \
- 16 + (((M) >> 4) & 0x3), \
- 16 + (((M) >> 6) & 0x3), \
- 4 + (((M) >> 0) & 0x3), \
- 4 + (((M) >> 2) & 0x3), \
- 20 + (((M) >> 4) & 0x3), \
- 20 + (((M) >> 6) & 0x3), \
- 8 + (((M) >> 0) & 0x3), \
- 8 + (((M) >> 2) & 0x3), \
- 24 + (((M) >> 4) & 0x3), \
- 24 + (((M) >> 6) & 0x3), \
- 12 + (((M) >> 0) & 0x3), \
- 12 + (((M) >> 2) & 0x3), \
- 28 + (((M) >> 4) & 0x3), \
- 28 + (((M) >> 6) & 0x3))
+ (__m512)__builtin_ia32_shufps512((__v16sf)(__m512)(A), \
+ (__v16sf)(__m512)(B), (int)(M))
#define _mm512_mask_shuffle_ps(W, U, A, B, M) \
(__m512)__builtin_ia32_selectps_512((__mmask16)(U), \
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