r335745 - [X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.

Craig Topper via cfe-commits cfe-commits at lists.llvm.org
Wed Jun 27 08:57:58 PDT 2018


Author: ctopper
Date: Wed Jun 27 08:57:57 2018
New Revision: 335745

URL: http://llvm.org/viewvc/llvm-project?rev=335745&view=rev
Log:
[X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.

Modified:
    cfe/trunk/lib/CodeGen/CGBuiltin.cpp
    cfe/trunk/test/CodeGen/avx512dq-builtins.c
    cfe/trunk/test/CodeGen/avx512vldq-builtins.c

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=335745&r1=335744&r2=335745&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Wed Jun 27 08:57:57 2018
@@ -10087,22 +10087,22 @@ Value *CodeGenFunction::EmitX86BuiltinEx
     switch (BuiltinID) {
     default: llvm_unreachable("Unsupported intrinsic!");
     case X86::BI__builtin_ia32_fpclassps128_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_ps_128;
+      ID = Intrinsic::x86_avx512_fpclass_ps_128;
       break;
     case X86::BI__builtin_ia32_fpclassps256_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_ps_256;
+      ID = Intrinsic::x86_avx512_fpclass_ps_256;
       break;
     case X86::BI__builtin_ia32_fpclassps512_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_ps_512;
+      ID = Intrinsic::x86_avx512_fpclass_ps_512;
       break;
     case X86::BI__builtin_ia32_fpclasspd128_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_pd_128;
+      ID = Intrinsic::x86_avx512_fpclass_pd_128;
       break;
     case X86::BI__builtin_ia32_fpclasspd256_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_pd_256;
+      ID = Intrinsic::x86_avx512_fpclass_pd_256;
       break;
     case X86::BI__builtin_ia32_fpclasspd512_mask:
-      ID = Intrinsic::x86_avx512_mask_fpclass_pd_512;
+      ID = Intrinsic::x86_avx512_fpclass_pd_512;
       break;
     }
 

Modified: cfe/trunk/test/CodeGen/avx512dq-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512dq-builtins.c?rev=335745&r1=335744&r2=335745&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512dq-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512dq-builtins.c Wed Jun 27 08:57:57 2018
@@ -1234,25 +1234,25 @@ __m512i test_mm512_maskz_inserti64x2(__m
 }
 __mmask8 test_mm512_mask_fpclass_pd_mask(__mmask8 __U, __m512d __A) {
   // CHECK-LABEL: @test_mm512_mask_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.512
+  // CHECK: @llvm.x86.avx512.fpclass.pd.512
   return _mm512_mask_fpclass_pd_mask(__U, __A, 4); 
 }
 
 __mmask8 test_mm512_fpclass_pd_mask(__m512d __A) {
   // CHECK-LABEL: @test_mm512_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.512
+  // CHECK: @llvm.x86.avx512.fpclass.pd.512
   return _mm512_fpclass_pd_mask(__A, 4); 
 }
 
 __mmask16 test_mm512_mask_fpclass_ps_mask(__mmask16 __U, __m512 __A) {
   // CHECK-LABEL: @test_mm512_mask_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.512
+  // CHECK: @llvm.x86.avx512.fpclass.ps.512
   return _mm512_mask_fpclass_ps_mask(__U, __A, 4); 
 }
 
 __mmask16 test_mm512_fpclass_ps_mask(__m512 __A) {
   // CHECK-LABEL: @test_mm512_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.512
+  // CHECK: @llvm.x86.avx512.fpclass.ps.512
   return _mm512_fpclass_ps_mask(__A, 4); 
 }
 

Modified: cfe/trunk/test/CodeGen/avx512vldq-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vldq-builtins.c?rev=335745&r1=335744&r2=335745&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vldq-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vldq-builtins.c Wed Jun 27 08:57:57 2018
@@ -1104,48 +1104,48 @@ __m256i test_mm256_maskz_inserti64x2(__m
 
 __mmask8 test_mm_mask_fpclass_pd_mask(__mmask8 __U, __m128d __A) {
   // CHECK-LABEL: @test_mm_mask_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.128
+  // CHECK: @llvm.x86.avx512.fpclass.pd.128
   return _mm_mask_fpclass_pd_mask(__U, __A, 2); 
 }
 
 __mmask8 test_mm_fpclass_pd_mask(__m128d __A) {
   // CHECK-LABEL: @test_mm_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.128
+  // CHECK: @llvm.x86.avx512.fpclass.pd.128
   return _mm_fpclass_pd_mask(__A, 2); 
 }
 
 __mmask8 test_mm256_mask_fpclass_pd_mask(__mmask8 __U, __m256d __A) {
   // CHECK-LABEL: @test_mm256_mask_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.256
+  // CHECK: @llvm.x86.avx512.fpclass.pd.256
   return _mm256_mask_fpclass_pd_mask(__U, __A, 2); 
 }
 
 __mmask8 test_mm256_fpclass_pd_mask(__m256d __A) {
   // CHECK-LABEL: @test_mm256_fpclass_pd_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.pd.256
+  // CHECK: @llvm.x86.avx512.fpclass.pd.256
   return _mm256_fpclass_pd_mask(__A, 2); 
 }
 
 __mmask8 test_mm_mask_fpclass_ps_mask(__mmask8 __U, __m128 __A) {
   // CHECK-LABEL: @test_mm_mask_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.128
+  // CHECK: @llvm.x86.avx512.fpclass.ps.128
   return _mm_mask_fpclass_ps_mask(__U, __A, 2); 
 }
 
 __mmask8 test_mm_fpclass_ps_mask(__m128 __A) {
   // CHECK-LABEL: @test_mm_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.128
+  // CHECK: @llvm.x86.avx512.fpclass.ps.128
   return _mm_fpclass_ps_mask(__A, 2); 
 }
 
 __mmask8 test_mm256_mask_fpclass_ps_mask(__mmask8 __U, __m256 __A) {
   // CHECK-LABEL: @test_mm256_mask_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.256
+  // CHECK: @llvm.x86.avx512.fpclass.ps.256
   return _mm256_mask_fpclass_ps_mask(__U, __A, 2); 
 }
 
 __mmask8 test_mm256_fpclass_ps_mask(__m256 __A) {
   // CHECK-LABEL: @test_mm256_fpclass_ps_mask
-  // CHECK: @llvm.x86.avx512.mask.fpclass.ps.256
+  // CHECK: @llvm.x86.avx512.fpclass.ps.256
   return _mm256_fpclass_ps_mask(__A, 2); 
 }




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