[PATCH] D48487: [X86][AVX512] Lowering _mm512_[max|min]_p[s|d] to native IR

[Simon Pilgrim via Phabricator via cfe-commits]

RKSimon added a comment.

I haven't used the AVX512 versions, but I do know plenty of cases that rely on the 'use the second op if there is a NAN or both zeros' special cases in the SSE version of these FMIN/FMAX intrinsics.

The Intel docs state:

> If the values being compared are both 0.0s (of either sign), the value in the second operand (source operand) is returned. If a value in the second operand is an SNaN, then SNaN is forwarded unchanged to the destination (that is, a QNaN version of the SNaN is not returned).



> If only one value is a NaN (SNaN or QNaN) for this instruction, the second operand (source operand), either a NaN or a valid floating-point value, is written to the result. If instead of this behavior, it is required that the NaN source operand (from either the first or second operand) be returned, the action of MAXPS can be emulated using a sequence of instructions, such as, a comparison followed by AND, ANDN and OR.




Repository:
  rC Clang

https://reviews.llvm.org/D48487