[PATCH] D47401: [X86] Rewrite the max and min reduction intrinsics to make better use of other functions and to reduce width to 256 and 128 bits were possible.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added a comment.

Fast-isel tests were added for previous codegen in r335068 and updated for new codegen in r335071.

One addtiional observation I didn't catch before. The epi32 and epu32 min/max intrinsics were doing a 64-bit element extract as the final step previously because they just did a [0] on _m128i which is really __v2di. It didn't functionally matter because it would be truncated after the extract. The new code uses [0] on a __v4si type so we get a 32-bit extract.


Repository:
  rL LLVM

https://reviews.llvm.org/D47401