[PATCH] D46540: [X86] ptwrite intrinsic
Gabor Buella via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed May 9 01:25:22 PDT 2018
GBuella added a comment.
In https://reviews.llvm.org/D46540#1091625, @Hahnfeld wrote:
> Could you maybe add some short summaries to your patches? It's hard for non-Intel employees to guess what all these instructions do...
Well, I was thinking I could copy-paste this from https://software.intel.com/en-us/articles/intel-sdm :
"This instruction reads data in the source operand and sends it to the Intel Processor Trace hardware to be encoded
in a PTW packet if TriggerEn, ContextEn, FilterEn, and PTWEn are all set to 1. For more details on these values, see
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3C, Section 35.2.2, “Software Trace
Instrumentation with PTWRITE”."
Do you think this would really help anyone? It appears to be just meaningless without larger context.
Those who ever need this, need to read a lot of these manuals anyways, I think noone in practice is going to be enlightened by such a short description.
That of course makes a lot more sense with simpler instructions, e.g. movdir64b - I can just describe that as something like "atomically moving 64 bytes".
https://reviews.llvm.org/D46540
More information about the cfe-commits
mailing list