r330195 - [NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode only

[Ivan A. Kosarev via cfe-commits]

Author: kosarev
Date: Tue Apr 17 09:43:07 2018
New Revision: 330195

URL: http://llvm.org/viewvc/llvm-project?rev=330195&view=rev
Log:
[NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode only

Differential Revision: https://reviews.llvm.org/D45668

Modified:
    cfe/trunk/include/clang/Basic/arm_neon.td
    cfe/trunk/test/CodeGen/arm_neon_intrinsics.c

Modified: cfe/trunk/include/clang/Basic/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/arm_neon.td?rev=330195&r1=330194&r2=330195&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/arm_neon.td (original)
+++ cfe/trunk/include/clang/Basic/arm_neon.td Tue Apr 17 09:43:07 2018
@@ -398,8 +398,14 @@ def VCOMBINE : NoTestOpInst<"vcombine",
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.21 Splitting vectors
 let InstName = "vmov" in {
-def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilhfUcUsUiUlPcPs", OP_HI>;
-def VGET_LOW  : NoTestOpInst<"vget_low", "dk", "csilhfUcUsUiUlPcPs", OP_LO>;
+def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilfUcUsUiUlPcPs", OP_HI>;
+def VGET_LOW  : NoTestOpInst<"vget_low", "dk", "csilfUcUsUiUlPcPs", OP_LO>;
+}
+let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in {
+  let InstName = "vmov" in {
+  def VGET_HIGH_F16 : NoTestOpInst<"vget_high", "dk", "h", OP_HI>;
+  def VGET_LOW_F16  : NoTestOpInst<"vget_low", "dk", "h", OP_LO>;
+  }
 }
 
 ////////////////////////////////////////////////////////////////////////////////

Modified: cfe/trunk/test/CodeGen/arm_neon_intrinsics.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm_neon_intrinsics.c?rev=330195&r1=330194&r2=330195&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/arm_neon_intrinsics.c (original)
+++ cfe/trunk/test/CodeGen/arm_neon_intrinsics.c Tue Apr 17 09:43:07 2018
@@ -3254,13 +3254,6 @@ int64x1_t test_vget_high_s64(int64x2_t a
   return vget_high_s64(a);
 }
 
-// CHECK-LABEL: @test_vget_high_f16(
-// CHECK:   [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
-// CHECK:   ret <4 x half> [[SHUFFLE_I]]
-float16x4_t test_vget_high_f16(float16x8_t a) {
-  return vget_high_f16(a);
-}
-
 // CHECK-LABEL: @test_vget_high_f32(
 // CHECK:   [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3>
 // CHECK:   ret <2 x float> [[SHUFFLE_I]]
@@ -3560,13 +3553,6 @@ int64x1_t test_vget_low_s64(int64x2_t a)
   return vget_low_s64(a);
 }
 
-// CHECK-LABEL: @test_vget_low_f16(
-// CHECK:   [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
-// CHECK:   ret <4 x half> [[SHUFFLE_I]]
-float16x4_t test_vget_low_f16(float16x8_t a) {
-  return vget_low_f16(a);
-}
-
 // CHECK-LABEL: @test_vget_low_f32(
 // CHECK:   [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
 // CHECK:   ret <2 x float> [[SHUFFLE_I]]