[PATCH] D43459: [X86] Disable CLWB in Cannon Lake
Gabor Buella via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 19 06:03:35 PST 2018
GBuella created this revision.
GBuella added reviewers: craig.topper, zvi, echristo.
Herald added a subscriber: cfe-commits.
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.
Repository:
rC Clang
https://reviews.llvm.org/D43459
Files:
lib/Basic/Targets/X86.cpp
test/Preprocessor/predefined-arch-macros.c
Index: test/Preprocessor/predefined-arch-macros.c
===================================================================
--- test/Preprocessor/predefined-arch-macros.c
+++ test/Preprocessor/predefined-arch-macros.c
@@ -974,7 +974,7 @@
// CHECK_CNL_M32: #define __BMI2__ 1
// CHECK_CNL_M32: #define __BMI__ 1
// CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M32: #define __CLWB__ 1
+// CHECK_CNL_M32-NOT: #define __CLWB__ 1
// CHECK_CNL_M32: #define __F16C__ 1
// CHECK_CNL_M32: #define __FMA__ 1
// CHECK_CNL_M32: #define __LZCNT__ 1
@@ -1022,7 +1022,7 @@
// CHECK_CNL_M64: #define __BMI2__ 1
// CHECK_CNL_M64: #define __BMI__ 1
// CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
-// CHECK_CNL_M64: #define __CLWB__ 1
+// CHECK_CNL_M64-NOT: #define __CLWB__ 1
// CHECK_CNL_M64: #define __F16C__ 1
// CHECK_CNL_M64: #define __FMA__ 1
// CHECK_CNL_M64: #define __LZCNT__ 1
Index: lib/Basic/Targets/X86.cpp
===================================================================
--- lib/Basic/Targets/X86.cpp
+++ lib/Basic/Targets/X86.cpp
@@ -175,7 +175,8 @@
setFeatureEnabledImpl(Features, "avx512bw", true);
setFeatureEnabledImpl(Features, "avx512vl", true);
setFeatureEnabledImpl(Features, "pku", true);
- setFeatureEnabledImpl(Features, "clwb", true);
+ if (Kind != CK_Cannonlake) // CNL inherits all SKX features, except CLWB
+ setFeatureEnabledImpl(Features, "clwb", true);
LLVM_FALLTHROUGH;
case CK_SkylakeClient:
setFeatureEnabledImpl(Features, "xsavec", true);
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