r321526 - Avoid int to string conversion in Twine or raw_ostream contexts.

Benjamin Kramer via cfe-commits cfe-commits at lists.llvm.org
Thu Dec 28 08:58:54 PST 2017


Author: d0k
Date: Thu Dec 28 08:58:54 2017
New Revision: 321526

URL: http://llvm.org/viewvc/llvm-project?rev=321526&view=rev
Log:
Avoid int to string conversion in Twine or raw_ostream contexts.

Some output changes from uppercase hex to lowercase hex, no other functionality change intended.

Modified:
    cfe/trunk/lib/Basic/Targets/AArch64.cpp
    cfe/trunk/lib/Basic/Targets/ARM.cpp
    cfe/trunk/lib/Driver/SanitizerArgs.cpp
    cfe/trunk/lib/Driver/ToolChains/Clang.cpp
    cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
    cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
    cfe/trunk/lib/Driver/ToolChains/Hexagon.cpp
    cfe/trunk/test/Preprocessor/arm-acle-6.4.c
    cfe/trunk/test/Preprocessor/arm-acle-6.5.c
    cfe/trunk/test/Preprocessor/arm-target-features.c
    cfe/trunk/utils/TableGen/NeonEmitter.cpp

Modified: cfe/trunk/lib/Basic/Targets/AArch64.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/AArch64.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/AArch64.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/AArch64.cpp Thu Dec 28 08:58:54 2017
@@ -159,7 +159,7 @@ void AArch64TargetInfo::getTargetDefines
     Builder.defineMacro("__ARM_FP_FAST", "1");
 
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
-                      llvm::utostr(Opts.WCharSize ? Opts.WCharSize : 4));
+                      Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
   Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM", Opts.ShortEnums ? "1" : "4");
 

Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/ARM.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp Thu Dec 28 08:58:54 2017
@@ -582,7 +582,7 @@ void ARMTargetInfo::getTargetDefines(con
 
   // ACLE 6.4.4 LDREX/STREX
   if (LDREX)
-    Builder.defineMacro("__ARM_FEATURE_LDREX", "0x" + llvm::utohexstr(LDREX));
+    Builder.defineMacro("__ARM_FEATURE_LDREX", "0x" + Twine::utohexstr(LDREX));
 
   // ACLE 6.4.5 CLZ
   if (ArchVersion == 5 || (ArchVersion == 6 && CPUProfile != "M") ||
@@ -591,7 +591,7 @@ void ARMTargetInfo::getTargetDefines(con
 
   // ACLE 6.5.1 Hardware Floating Point
   if (HW_FP)
-    Builder.defineMacro("__ARM_FP", "0x" + llvm::utohexstr(HW_FP));
+    Builder.defineMacro("__ARM_FP", "0x" + Twine::utohexstr(HW_FP));
 
   // ACLE predefines.
   Builder.defineMacro("__ARM_ACLE", "200");
@@ -672,11 +672,11 @@ void ARMTargetInfo::getTargetDefines(con
     // current AArch32 NEON implementations do not support double-precision
     // floating-point even when it is present in VFP.
     Builder.defineMacro("__ARM_NEON_FP",
-                        "0x" + llvm::utohexstr(HW_FP & ~HW_FP_DP));
+                        "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
-                      llvm::utostr(Opts.WCharSize ? Opts.WCharSize : 4));
+                      Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
   Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM", Opts.ShortEnums ? "1" : "4");
 

Modified: cfe/trunk/lib/Driver/SanitizerArgs.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/SanitizerArgs.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Driver/SanitizerArgs.cpp (original)
+++ cfe/trunk/lib/Driver/SanitizerArgs.cpp Thu Dec 28 08:58:54 2017
@@ -794,7 +794,7 @@ void SanitizerArgs::addArgs(const ToolCh
 
   if (MsanTrackOrigins)
     CmdArgs.push_back(Args.MakeArgString("-fsanitize-memory-track-origins=" +
-                                         llvm::utostr(MsanTrackOrigins)));
+                                         Twine(MsanTrackOrigins)));
 
   if (MsanUseAfterDtor)
     CmdArgs.push_back("-fsanitize-memory-use-after-dtor");
@@ -829,7 +829,7 @@ void SanitizerArgs::addArgs(const ToolCh
 
   if (AsanFieldPadding)
     CmdArgs.push_back(Args.MakeArgString("-fsanitize-address-field-padding=" +
-                                         llvm::utostr(AsanFieldPadding)));
+                                         Twine(AsanFieldPadding)));
 
   if (AsanUseAfterScope)
     CmdArgs.push_back("-fsanitize-address-use-after-scope");

Modified: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Clang.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp Thu Dec 28 08:58:54 2017
@@ -1738,10 +1738,9 @@ void Clang::AddHexagonTargetArgs(const A
   CmdArgs.push_back("-Wreturn-type");
 
   if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) {
-    std::string N = llvm::utostr(G.getValue());
-    std::string Opt = std::string("-hexagon-small-data-threshold=") + N;
     CmdArgs.push_back("-mllvm");
-    CmdArgs.push_back(Args.MakeArgString(Opt));
+    CmdArgs.push_back(Args.MakeArgString("-hexagon-small-data-threshold=" +
+                                         Twine(G.getValue())));
   }
 
   if (!Args.hasArg(options::OPT_fno_short_enums))

Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Thu Dec 28 08:58:54 2017
@@ -419,8 +419,8 @@ void tools::AddGoldPlugin(const ToolChai
     CmdArgs.push_back("-plugin-opt=thinlto");
 
   if (unsigned Parallelism = getLTOParallelism(Args, D))
-    CmdArgs.push_back(Args.MakeArgString(Twine("-plugin-opt=jobs=") +
-                                         llvm::to_string(Parallelism)));
+    CmdArgs.push_back(
+        Args.MakeArgString("-plugin-opt=jobs=" + Twine(Parallelism)));
 
   // If an explicit debugger tuning argument appeared, pass it along.
   if (Arg *A = Args.getLastArg(options::OPT_gTune_Group,

Modified: cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Darwin.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Driver/ToolChains/Darwin.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Darwin.cpp Thu Dec 28 08:58:54 2017
@@ -545,8 +545,7 @@ void darwin::Linker::ConstructJob(Compil
   if (unsigned Parallelism =
           getLTOParallelism(Args, getToolChain().getDriver())) {
     CmdArgs.push_back("-mllvm");
-    CmdArgs.push_back(
-        Args.MakeArgString(Twine("-threads=") + llvm::to_string(Parallelism)));
+    CmdArgs.push_back(Args.MakeArgString("-threads=" + Twine(Parallelism)));
   }
 
   if (getToolChain().ShouldLinkCXXStdlib(Args))

Modified: cfe/trunk/lib/Driver/ToolChains/Hexagon.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Hexagon.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/lib/Driver/ToolChains/Hexagon.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Hexagon.cpp Thu Dec 28 08:58:54 2017
@@ -138,16 +138,15 @@ void hexagon::Assembler::ConstructJob(Co
   const Driver &D = HTC.getDriver();
   ArgStringList CmdArgs;
 
-  std::string MArchString = "-march=hexagon";
-  CmdArgs.push_back(Args.MakeArgString(MArchString));
+  CmdArgs.push_back("-march=hexagon");
 
   RenderExtraToolArgs(JA, CmdArgs);
 
-  std::string AsName = "hexagon-llvm-mc";
-  std::string MCpuString = "-mcpu=hexagon" +
-        toolchains::HexagonToolChain::GetTargetCPUVersion(Args).str();
+  const char *AsName = "hexagon-llvm-mc";
   CmdArgs.push_back("-filetype=obj");
-  CmdArgs.push_back(Args.MakeArgString(MCpuString));
+  CmdArgs.push_back(Args.MakeArgString(
+      "-mcpu=hexagon" +
+      toolchains::HexagonToolChain::GetTargetCPUVersion(Args)));
 
   if (Output.isFilename()) {
     CmdArgs.push_back("-o");
@@ -158,8 +157,7 @@ void hexagon::Assembler::ConstructJob(Co
   }
 
   if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) {
-    std::string N = llvm::utostr(G.getValue());
-    CmdArgs.push_back(Args.MakeArgString(std::string("-gpsize=") + N));
+    CmdArgs.push_back(Args.MakeArgString("-gpsize=" + Twine(G.getValue())));
   }
 
   Args.AddAllArgValues(CmdArgs, options::OPT_Wa_COMMA, options::OPT_Xassembler);
@@ -192,7 +190,7 @@ void hexagon::Assembler::ConstructJob(Co
       II.getInputArg().render(Args, CmdArgs);
   }
 
-  auto *Exec = Args.MakeArgString(HTC.GetProgramPath(AsName.c_str()));
+  auto *Exec = Args.MakeArgString(HTC.GetProgramPath(AsName));
   C.addCommand(llvm::make_unique<Command>(JA, *this, Exec, CmdArgs, Inputs));
 }
 
@@ -243,10 +241,8 @@ constructHexagonLinkArgs(Compilation &C,
     CmdArgs.push_back(Opt.c_str());
 
   CmdArgs.push_back("-march=hexagon");
-  std::string CpuVer =
-        toolchains::HexagonToolChain::GetTargetCPUVersion(Args).str();
-  std::string MCpuString = "-mcpu=hexagon" + CpuVer;
-  CmdArgs.push_back(Args.MakeArgString(MCpuString));
+  StringRef CpuVer = toolchains::HexagonToolChain::GetTargetCPUVersion(Args);
+  CmdArgs.push_back(Args.MakeArgString("-mcpu=hexagon" + CpuVer));
 
   if (IsShared) {
     CmdArgs.push_back("-shared");
@@ -261,8 +257,7 @@ constructHexagonLinkArgs(Compilation &C,
     CmdArgs.push_back("-pie");
 
   if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) {
-    std::string N = llvm::utostr(G.getValue());
-    CmdArgs.push_back(Args.MakeArgString(std::string("-G") + N));
+    CmdArgs.push_back(Args.MakeArgString("-G" + Twine(G.getValue())));
     UseG0 = G.getValue() == 0;
   }
 
@@ -291,7 +286,7 @@ constructHexagonLinkArgs(Compilation &C,
   //----------------------------------------------------------------------------
   // Start Files
   //----------------------------------------------------------------------------
-  const std::string MCpuSuffix = "/" + CpuVer;
+  const std::string MCpuSuffix = "/" + CpuVer.str();
   const std::string MCpuG0Suffix = MCpuSuffix + "/G0";
   const std::string RootDir =
       HTC.getHexagonTargetDir(D.InstalledDir, D.PrefixDirs) + "/";
@@ -351,7 +346,7 @@ constructHexagonLinkArgs(Compilation &C,
     CmdArgs.push_back("--start-group");
 
     if (!IsShared) {
-      for (const std::string &Lib : OsLibs)
+      for (StringRef Lib : OsLibs)
         CmdArgs.push_back(Args.MakeArgString("-l" + Lib));
       CmdArgs.push_back("-lc");
     }

Modified: cfe/trunk/test/Preprocessor/arm-acle-6.4.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/arm-acle-6.4.c?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/arm-acle-6.4.c (original)
+++ cfe/trunk/test/Preprocessor/arm-acle-6.4.c Thu Dec 28 08:58:54 2017
@@ -91,7 +91,7 @@
 
 // RUN: %clang -target arm-none-linux-eabi -march=armv6k -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V6K
  
-// CHECK-V6K: __ARM_FEATURE_LDREX 0xF
+// CHECK-V6K: __ARM_FEATURE_LDREX 0xf
 
 // RUN: %clang -target arm-none-linux-eabi -march=armv7-a -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V7A
 
@@ -101,7 +101,7 @@
 // CHECK-V7A: __ARM_ARCH_PROFILE 'A'
 // CHECK-V7A: __ARM_FEATURE_CLZ 1
 // CHECK-V7A: __ARM_FEATURE_DSP 1
-// CHECK-V7A: __ARM_FEATURE_LDREX 0xF
+// CHECK-V7A: __ARM_FEATURE_LDREX 0xf
 // CHECK-V7A: __ARM_FEATURE_QBIT 1
 // CHECK-V7A: __ARM_FEATURE_SAT 1
 // CHECK-V7A: __ARM_FEATURE_SIMD32 1
@@ -129,7 +129,7 @@
 // CHECK-V7VE: __ARM_FEATURE_CLZ 1
 // CHECK-V7VE: __ARM_FEATURE_DSP 1
 // CHECK-V7VE: __ARM_FEATURE_IDIV 1
-// CHECK-V7VE: __ARM_FEATURE_LDREX 0xF
+// CHECK-V7VE: __ARM_FEATURE_LDREX 0xf
 // CHECK-V7VE: __ARM_FEATURE_QBIT 1
 // CHECK-V7VE: __ARM_FEATURE_SAT 1
 // CHECK-V7VE: __ARM_FEATURE_SIMD32 1
@@ -143,7 +143,7 @@
 // CHECK-V7R: __ARM_ARCH_PROFILE 'R'
 // CHECK-V7R: __ARM_FEATURE_CLZ 1
 // CHECK-V7R: __ARM_FEATURE_DSP 1
-// CHECK-V7R: __ARM_FEATURE_LDREX 0xF
+// CHECK-V7R: __ARM_FEATURE_LDREX 0xf
 // CHECK-V7R: __ARM_FEATURE_QBIT 1
 // CHECK-V7R: __ARM_FEATURE_SAT 1
 // CHECK-V7R: __ARM_FEATURE_SIMD32 1
@@ -188,7 +188,7 @@
 // CHECK-V8A: __ARM_FEATURE_CLZ 1
 // CHECK-V8A: __ARM_FEATURE_DSP 1
 // CHECK-V8A: __ARM_FEATURE_IDIV 1
-// CHECK-V8A: __ARM_FEATURE_LDREX 0xF
+// CHECK-V8A: __ARM_FEATURE_LDREX 0xf
 // CHECK-V8A: __ARM_FEATURE_QBIT 1
 // CHECK-V8A: __ARM_FEATURE_SAT 1
 // CHECK-V8A: __ARM_FEATURE_SIMD32 1

Modified: cfe/trunk/test/Preprocessor/arm-acle-6.5.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/arm-acle-6.5.c?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/arm-acle-6.5.c (original)
+++ cfe/trunk/test/Preprocessor/arm-acle-6.5.c Thu Dec 28 08:58:54 2017
@@ -26,7 +26,7 @@
 // RUN: %clang -target armv7a-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
 // RUN: %clang -target armv7ve-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP
 
-// CHECK-SP-DP: __ARM_FP 0xC
+// CHECK-SP-DP: __ARM_FP 0xc
 
 // RUN: %clang -target arm-eabi -mfpu=vfpv3-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
 // RUN: %clang -target arm-eabi -mfpu=vfpv3-d16-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
@@ -40,7 +40,7 @@
 // RUN: %clang -target arm-eabi -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
 // RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP
 
-// CHECK-SP-DP-HP: __ARM_FP 0xE
+// CHECK-SP-DP-HP: __ARM_FP 0xe
 
 // RUN: %clang -target armv4-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA
 // RUN: %clang -target armv5-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA

Modified: cfe/trunk/test/Preprocessor/arm-target-features.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/arm-target-features.c?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/arm-target-features.c (original)
+++ cfe/trunk/test/Preprocessor/arm-target-features.c Thu Dec 28 08:58:54 2017
@@ -5,7 +5,7 @@
 // CHECK-V8A: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8A: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8A: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8A: #define __ARM_FP 0xE
+// CHECK-V8A: #define __ARM_FP 0xe
 // CHECK-V8A: #define __ARM_FP16_ARGS 1
 // CHECK-V8A: #define __ARM_FP16_FORMAT_IEEE 1
 
@@ -16,7 +16,7 @@
 // CHECK-V8R: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R: #define __ARM_FP 0xE
+// CHECK-V8R: #define __ARM_FP 0xe
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
@@ -25,14 +25,14 @@
 // CHECK-V7-NOT: __ARM_FEATURE_CRC32
 // CHECK-V7-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
 // CHECK-V7-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
-// CHECK-V7: #define __ARM_FP 0xC
+// CHECK-V7: #define __ARM_FP 0xc
 
 // RUN: %clang -target armv7ve-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7VE %s
 // CHECK-V7VE: #define __ARMEL__ 1
 // CHECK-V7VE: #define __ARM_ARCH 7
 // CHECK-V7VE: #define __ARM_ARCH_7VE__ 1
 // CHECK-V7VE: #define __ARM_ARCH_EXT_IDIV__ 1
-// CHECK-V7VE: #define __ARM_FP 0xC
+// CHECK-V7VE: #define __ARM_FP 0xc
 
 // RUN: %clang -target x86_64-apple-macosx10.10 -arch armv7s -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7S %s
 // CHECK-V7S: #define __ARMEL__ 1
@@ -41,7 +41,7 @@
 // CHECK-V7S-NOT: __ARM_FEATURE_CRC32
 // CHECK-V7S-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
 // CHECK-V7S-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
-// CHECK-V7S: #define __ARM_FP 0xE
+// CHECK-V7S: #define __ARM_FP 0xe
 
 // RUN: %clang -target armv8a -mfloat-abi=hard -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF %s
 // CHECK-V8-BAREHF: #define __ARMEL__ 1
@@ -50,19 +50,19 @@
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8-BAREHP: #define __ARM_FP 0xE
+// CHECK-V8-BAREHP: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF: #define __ARM_NEON__ 1
 // CHECK-V8-BAREHF: #define __ARM_PCS_VFP 1
 // CHECK-V8-BAREHF: #define __VFP_FP__ 1
 
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-FP %s
 // CHECK-V8-BAREHF-FP-NOT: __ARM_NEON__ 1
-// CHECK-V8-BAREHP-FP: #define __ARM_FP 0xE
+// CHECK-V8-BAREHP-FP: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF-FP: #define __VFP_FP__ 1
 
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s
-// CHECK-V8-BAREHP-NEON-FP: #define __ARM_FP 0xE
+// CHECK-V8-BAREHP-NEON-FP: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF-NEON-FP: #define __ARM_NEON__ 1
 // CHECK-V8-BAREHF-NEON-FP: #define __VFP_FP__ 1
 
@@ -88,7 +88,7 @@
 // RUN: %clang -target armv8a-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8A %s
 // RUN: %clang -target armv8a-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8A %s
 // V8A:#define __ARM_ARCH_EXT_IDIV__ 1
-// V8A:#define __ARM_FP 0xE
+// V8A:#define __ARM_FP 0xe
 
 // RUN: %clang -target armv8m.base-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_BASELINE %s
 // V8M_BASELINE: #define __ARM_ARCH 8
@@ -111,7 +111,7 @@
 // V8M_MAINLINE: #define __ARM_ARCH_PROFILE 'M'
 // V8M_MAINLINE-NOT: __ARM_FEATURE_CRC32
 // V8M_MAINLINE-NOT: __ARM_FEATURE_DSP
-// V8M_MAINLINE: #define __ARM_FP 0xE
+// V8M_MAINLINE: #define __ARM_FP 0xe
 // V8M_MAINLINE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
 
 // RUN: %clang -target arm-none-linux-gnu -march=armv8-m.main+dsp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_MAINLINE_DSP %s
@@ -123,7 +123,7 @@
 // V8M_MAINLINE_DSP: #define __ARM_ARCH_PROFILE 'M'
 // V8M_MAINLINE_DSP-NOT: __ARM_FEATURE_CRC32
 // V8M_MAINLINE_DSP: #define __ARM_FEATURE_DSP 1
-// V8M_MAINLINE_DSP: #define __ARM_FP 0xE
+// V8M_MAINLINE_DSP: #define __ARM_FP 0xe
 // V8M_MAINLINE_DSP: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
 
 // RUN: %clang -target arm-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-DEFS %s
@@ -161,7 +161,7 @@
 // Check that -mfpu works properly for Cortex-A7 (enabled by default).
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A7 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A7 %s
-// DEFAULTFPU-A7:#define __ARM_FP 0xE
+// DEFAULTFPU-A7:#define __ARM_FP 0xe
 // DEFAULTFPU-A7:#define __ARM_NEON__ 1
 // DEFAULTFPU-A7:#define __ARM_VFPV4__ 1
 
@@ -173,14 +173,14 @@
 
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a7 -mfpu=vfp4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A7 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a7 -mfpu=vfp4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A7 %s
-// NONEON-A7:#define __ARM_FP 0xE
+// NONEON-A7:#define __ARM_FP 0xe
 // NONEON-A7-NOT:#define __ARM_NEON__ 1
 // NONEON-A7:#define __ARM_VFPV4__ 1
 
 // Check that -mfpu works properly for Cortex-A5 (enabled by default).
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A5 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A5 %s
-// DEFAULTFPU-A5:#define __ARM_FP 0xE
+// DEFAULTFPU-A5:#define __ARM_FP 0xe
 // DEFAULTFPU-A5:#define __ARM_NEON__ 1
 // DEFAULTFPU-A5:#define __ARM_VFPV4__ 1
 
@@ -192,7 +192,7 @@
 
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a5 -mfpu=vfp4-d16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A5 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a5 -mfpu=vfp4-d16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A5 %s
-// NONEON-A5:#define __ARM_FP 0xE
+// NONEON-A5:#define __ARM_FP 0xe
 // NONEON-A5-NOT:#define __ARM_NEON__ 1
 // NONEON-A5:#define __ARM_VFPV4__ 1
 
@@ -218,7 +218,7 @@
 // A5-NOT: #define __ARM_FEATURE_DIRECTED_ROUNDING
 // A5:#define __ARM_FEATURE_DSP 1
 // A5-NOT: #define __ARM_FEATURE_NUMERIC_MAXMIN
-// A5:#define __ARM_FP 0xE
+// A5:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting cortex-a7.
 // RUN: %clang -target armv7k -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7 %s
@@ -228,7 +228,7 @@
 // A7:#define __ARM_ARCH_PROFILE 'A'
 // A7-NOT:#define __ARM_DWARF_EH__ 1
 // A7:#define __ARM_FEATURE_DSP 1
-// A7:#define __ARM_FP 0xE
+// A7:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting cortex-a7.
 // RUN: %clang -target x86_64-apple-darwin -arch armv7k -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV7K %s
@@ -237,7 +237,7 @@
 // ARMV7K:#define __ARM_ARCH_PROFILE 'A'
 // ARMV7K:#define __ARM_DWARF_EH__ 1
 // ARMV7K:#define __ARM_FEATURE_DSP 1
-// ARMV7K:#define __ARM_FP 0xE
+// ARMV7K:#define __ARM_FP 0xe
 // ARMV7K:#define __ARM_PCS_VFP 1
 
 
@@ -246,20 +246,20 @@
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8 %s
 // A8-NOT:#define __ARM_ARCH_EXT_IDIV__
 // A8:#define __ARM_FEATURE_DSP 1
-// A8:#define __ARM_FP 0xC
+// A8:#define __ARM_FP 0xc
 
 // Test whether predefines are as expected when targeting cortex-a9.
 // RUN: %clang -target armv7 -mcpu=cortex-a9 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A9 %s
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a9 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A9 %s
 // A9-NOT:#define __ARM_ARCH_EXT_IDIV__
 // A9:#define __ARM_FEATURE_DSP 1
-// A9:#define __ARM_FP 0xE
+// A9:#define __ARM_FP 0xe
 
 
 // Check that -mfpu works properly for Cortex-A12 (enabled by default).
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A12 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A12 %s
-// DEFAULTFPU-A12:#define __ARM_FP 0xE
+// DEFAULTFPU-A12:#define __ARM_FP 0xe
 // DEFAULTFPU-A12:#define __ARM_NEON__ 1
 // DEFAULTFPU-A12:#define __ARM_VFPV4__ 1
 
@@ -277,19 +277,19 @@
 // A12:#define __ARM_ARCH_EXT_IDIV__ 1
 // A12:#define __ARM_ARCH_PROFILE 'A'
 // A12:#define __ARM_FEATURE_DSP 1
-// A12:#define __ARM_FP 0xE
+// A12:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting cortex-a15.
 // RUN: %clang -target armv7 -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s
 // A15:#define __ARM_ARCH_EXT_IDIV__ 1
 // A15:#define __ARM_FEATURE_DSP 1
-// A15:#define __ARM_FP 0xE
+// A15:#define __ARM_FP 0xe
 
 // Check that -mfpu works properly for Cortex-A17 (enabled by default).
 // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A17 %s
 // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A17 %s
-// DEFAULTFPU-A17:#define __ARM_FP 0xE
+// DEFAULTFPU-A17:#define __ARM_FP 0xe
 // DEFAULTFPU-A17:#define __ARM_NEON__ 1
 // DEFAULTFPU-A17:#define __ARM_VFPV4__ 1
 
@@ -307,14 +307,14 @@
 // A17:#define __ARM_ARCH_EXT_IDIV__ 1
 // A17:#define __ARM_ARCH_PROFILE 'A'
 // A17:#define __ARM_FEATURE_DSP 1
-// A17:#define __ARM_FP 0xE
+// A17:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting swift.
 // RUN: %clang -target armv7s -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s
 // RUN: %clang -target armv7s -mthumb -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s
 // SWIFT:#define __ARM_ARCH_EXT_IDIV__ 1
 // SWIFT:#define __ARM_FEATURE_DSP 1
-// SWIFT:#define __ARM_FP 0xE
+// SWIFT:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting ARMv8-A Cortex implementations
 // RUN: %clang -target armv8 -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s
@@ -331,7 +331,7 @@
 // RUN: %clang -target armv8 -mthumb -mcpu=cortex-a73 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s
 // ARMV8:#define __ARM_ARCH_EXT_IDIV__ 1
 // ARMV8:#define __ARM_FEATURE_DSP 1
-// ARMV8:#define __ARM_FP 0xE
+// ARMV8:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting cortex-r4.
 // RUN: %clang -target armv7 -mcpu=cortex-r4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4-ARM %s
@@ -348,19 +348,19 @@
 // RUN: %clang -target armv7 -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-ARM %s
 // R4F-ARM-NOT:#define __ARM_ARCH_EXT_IDIV__
 // R4F-ARM:#define __ARM_FEATURE_DSP 1
-// R4F-ARM:#define __ARM_FP 0xC
+// R4F-ARM:#define __ARM_FP 0xc
 
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-THUMB %s
 // R4F-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
 // R4F-THUMB:#define __ARM_FEATURE_DSP 1
-// R4F-THUMB:#define __ARM_FP 0xC
+// R4F-THUMB:#define __ARM_FP 0xc
 
 // Test whether predefines are as expected when targeting cortex-r5.
 // RUN: %clang -target armv7 -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s
 // R5:#define __ARM_ARCH_EXT_IDIV__ 1
 // R5:#define __ARM_FEATURE_DSP 1
-// R5:#define __ARM_FP 0xC
+// R5:#define __ARM_FP 0xc
 
 // Test whether predefines are as expected when targeting cortex-r7 and cortex-r8.
 // RUN: %clang -target armv7 -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s
@@ -369,7 +369,7 @@
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s
 // R7-R8:#define __ARM_ARCH_EXT_IDIV__ 1
 // R7-R8:#define __ARM_FEATURE_DSP 1
-// R7-R8:#define __ARM_FP 0xE
+// R7-R8:#define __ARM_FP 0xe
 
 // Test whether predefines are as expected when targeting cortex-m0.
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m0 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M0-THUMB %s
@@ -397,7 +397,7 @@
 // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M7-THUMB %s
 // M7-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
 // M7-THUMB:#define __ARM_FEATURE_DSP 1
-// M7-THUMB:#define __ARM_FP 0xE
+// M7-THUMB:#define __ARM_FP 0xe
 // M7-THUMB:#define __ARM_FPV5__ 1
 
 // Test whether predefines are as expected when targeting v8m cores
@@ -437,11 +437,11 @@
 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
 // CHECK-V81A: #define __ARM_ARCH_PROFILE 'A'
 // CHECK-V81A: #define __ARM_FEATURE_QRDMX 1
-// CHECK-V81A: #define __ARM_FP 0xE
+// CHECK-V81A: #define __ARM_FP 0xe
 
 // RUN: %clang -target armv8.2a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V82A %s
 // CHECK-V82A: #define __ARM_ARCH 8
 // CHECK-V82A: #define __ARM_ARCH_8_2A__ 1
 // CHECK-V82A: #define __ARM_ARCH_PROFILE 'A'
 // CHECK-V82A: #define __ARM_FEATURE_QRDMX 1
-// CHECK-V82A: #define __ARM_FP 0xE
+// CHECK-V82A: #define __ARM_FP 0xe

Modified: cfe/trunk/utils/TableGen/NeonEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/utils/TableGen/NeonEmitter.cpp?rev=321526&r1=321525&r2=321526&view=diff
==============================================================================
--- cfe/trunk/utils/TableGen/NeonEmitter.cpp (original)
+++ cfe/trunk/utils/TableGen/NeonEmitter.cpp Thu Dec 28 08:58:54 2017
@@ -2106,7 +2106,7 @@ void NeonEmitter::genOverloadTypeCheckCo
     OverloadInfo &OI = I.second;
 
     OS << "case NEON::BI__builtin_neon_" << I.first << ": ";
-    OS << "mask = 0x" << utohexstr(OI.Mask) << "ULL";
+    OS << "mask = 0x" << Twine::utohexstr(OI.Mask) << "ULL";
     if (OI.PtrArgNum >= 0)
       OS << "; PtrArgNum = " << OI.PtrArgNum;
     if (OI.HasConstPtr)
@@ -2320,7 +2320,7 @@ void NeonEmitter::run(raw_ostream &OS) {
 
     Type T2 = T;
     T2.makeScalar();
-    OS << utostr(T.getNumElements()) << "))) ";
+    OS << T.getNumElements() << "))) ";
     OS << T2.str();
     OS << " " << T.str() << ";\n";
   }
@@ -2350,7 +2350,7 @@ void NeonEmitter::run(raw_ostream &OS) {
       Type VT(TS, M);
       OS << "typedef struct " << VT.str() << " {\n";
       OS << "  " << T.str() << " val";
-      OS << "[" << utostr(NumMembers) << "]";
+      OS << "[" << NumMembers << "]";
       OS << ";\n} ";
       OS << VT.str() << ";\n";
       OS << "\n";




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