[PATCH] D38479: Make -mgeneral-regs-only more like GCC's

[Eli Friedman via Phabricator via cfe-commits]

efriedma added a comment.

As far as I can see, there are three significant issues with the current -mgeneral-regs-only:

1. We don't correctly ignore inline asm clobbers for registers which aren't allocatable (https://bugs.llvm.org/show_bug.cgi?id=30792)
2. We don't diagnose calls which need vector registers according to the C calling convention.
3. We don't diagnose operations which have to be lowered to libcalls which need vector registers according to the C calling convention (fptosi, @llvm.sin.*, etc.).

All three of these could be addressesed in the AArch64 backend in a straightforward manner.

Diagnosing floating-point operations in Sema in addition to whatever backend fixes we might want is fine, I guess, but I don't really like making "-mgeneral-regs-only" into "-mno-implicit-float" plus some diagnostics; other frontends don't benefit from this checking, and using no-implicit-float is asking for an obscure miscompile if IR generation or an optimization accidentally produces a floating-point value.


https://reviews.llvm.org/D38479