[PATCH] D38147: [CUDA] Fixed order of words in the names of shfl builtins.
Artem Belevich via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Sep 21 11:48:18 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL313899: [CUDA] Fixed order of words in the names of shfl builtins. (authored by tra).
Changed prior to commit:
https://reviews.llvm.org/D38147?vs=116228&id=116238#toc
Repository:
rL LLVM
https://reviews.llvm.org/D38147
Files:
cfe/trunk/lib/Headers/__clang_cuda_intrinsics.h
Index: cfe/trunk/lib/Headers/__clang_cuda_intrinsics.h
===================================================================
--- cfe/trunk/lib/Headers/__clang_cuda_intrinsics.h
+++ cfe/trunk/lib/Headers/__clang_cuda_intrinsics.h
@@ -148,13 +148,12 @@
__nvvm_shfl_sync_idx_f32, 0x1f);
// We use 0 rather than 31 as our mask, because shfl.up applies to lanes >=
// maxLane.
-__MAKE_SYNC_SHUFFLES(__shfl_sync_up, __nvvm_shfl_sync_up_i32,
+__MAKE_SYNC_SHUFFLES(__shfl_up_sync, __nvvm_shfl_sync_up_i32,
__nvvm_shfl_sync_up_f32, 0);
-__MAKE_SYNC_SHUFFLES(__shfl_sync_down, __nvvm_shfl_sync_down_i32,
+__MAKE_SYNC_SHUFFLES(__shfl_down_sync, __nvvm_shfl_sync_down_i32,
__nvvm_shfl_sync_down_f32, 0x1f);
-__MAKE_SYNC_SHUFFLES(__shfl_sync_xor, __nvvm_shfl_sync_bfly_i32,
+__MAKE_SYNC_SHUFFLES(__shfl_xor_sync, __nvvm_shfl_sync_bfly_i32,
__nvvm_shfl_sync_bfly_f32, 0x1f);
-
#pragma pop_macro("__MAKE_SYNC_SHUFFLES")
inline __device__ void __syncwarp(unsigned int mask = 0xffffffff) {
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38147.116238.patch
Type: text/x-patch
Size: 1065 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20170921/2c3696b0/attachment.bin>
More information about the cfe-commits
mailing list