[PATCH] D37568: [AMDGPU] Allow flexible register names in inline asm constraints

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl created this revision.
Herald added subscribers: eraman, t-tye, tpr, dstuttard, nhaehnle, wdng, kzhuravl.

Currently AMDGPU inline asm only allow "v" and "s" as register names in constraints.

This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)

v

s

{vn}

{sn}

{S} , wheere S is a special register name

{vn:m}

{sn:m}


https://reviews.llvm.org/D37568

Files:
  lib/Basic/Targets/AMDGPU.h
  test/CodeGenOpenCL/amdgcn-inline-asm.cl
  test/Sema/inline-asm-validate-amdgpu.cl

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