[PATCH] D37448: Fix cast assertion on MS inline assembly with vector spills (PR34021)
Reid Kleckner via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Sep 5 10:08:54 PDT 2017
rnk added a comment.
I think this is a reasonable stop-gap fix since the code isn't trying to return EAX:EDX or XMM0 from the inline asm blob. This affects any function that contains inline asm and returns a vector, which is potentially a lot of stuff.
================
Comment at: test/CodeGen/pr34021.c:2
+// RUN: %clang_cc1 -fms-extensions %s -triple=i686-unknown-unknown -emit-llvm -o -
+// RUN: %clang_cc1 -fms-extensions %s -triple=x86_64-unknown-unknown -emit-llvm -o -
+// REQUIRES: asserts
----------------
Please FileCheck the IR. We should see a pattern like this:
```
define <4 x float> @rep()
%retval = alloca <4 x float>
call i64 inlineasm sideeffect {{.*}}
store {{.*}}, <4 x float>* %retval
%v = load {{.*}}, <4 x float>* %res
store <4 x float> %v, <4 x float>* %retval
%rv = load <4 x float>* %retval
ret <4 x float> %rv
```
That IR pattern makes it clear that the store of the asm output is immediately killed by the store of `res` to `retval`.
Repository:
rL LLVM
https://reviews.llvm.org/D37448
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