r304889 - [ARM] Fix Neon vector type alignment to 64-bit

Javed Absar via cfe-commits cfe-commits at lists.llvm.org
Wed Jun 7 03:02:02 PDT 2017


Author: javed.absar
Date: Wed Jun  7 05:02:02 2017
New Revision: 304889

URL: http://llvm.org/viewvc/llvm-project?rev=304889&view=rev
Log:
[ARM] Fix Neon vector type alignment to 64-bit

This is restricted version of patch - https://reviews.llvm.org/D33205
that I reverted as it was leading to ABI breaks on darwin etc.
This patch restricts the fix to AAPCS (Android remains 128-bit).
Reviewed by: Renato Golin, Stephen Hines
Differential Revision: https://reviews.llvm.org/D33786


Added:
    cfe/trunk/test/CodeGen/neon-aapcs-align.c
Modified:
    cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=304889&r1=304888&r2=304889&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jun  7 05:02:02 2017
@@ -5385,6 +5385,10 @@ public:
     // ARM has atomics up to 8 bytes
     setAtomic();
 
+    // Maximum alignment for ARM NEON data types should be 64-bits (AAPCS)
+    if (IsAAPCS && (Triple.getEnvironment() != llvm::Triple::Android))
+       MaxVectorAlign = 64;
+
     // Do force alignment of members that follow zero length bitfields.  If
     // the alignment of the zero-length bitfield is greater than the member
     // that follows it, `bar', `bar' will be aligned as the  type of the

Added: cfe/trunk/test/CodeGen/neon-aapcs-align.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/neon-aapcs-align.c?rev=304889&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/neon-aapcs-align.c (added)
+++ cfe/trunk/test/CodeGen/neon-aapcs-align.c Wed Jun  7 05:02:02 2017
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1 -triple armv7a-none-eabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+// RUN: %clang_cc1 -triple armv7a-none-gnueabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+// RUN: %clang_cc1 -triple armv7a-none-freebsd -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=AAPCS
+
+// RUN: %clang_cc1 -triple armv7a-apple-ios -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+// RUN: %clang_cc1 -triple armv7a-none-android -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+// RUN: %clang_cc1 -triple armv7a-none-androideabi -target-feature +neon -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=DEFAULT
+
+#include <arm_neon.h>
+// Neon types have 64-bit alignment
+int32x4_t gl_b;
+void t3(int32x4_t *src) {
+// CHECK: @t3
+  gl_b = *src;
+// AAPCS: store <4 x i32> {{%.*}}, <4 x i32>* @gl_b, align 8
+// DEFAULT: store <4 x i32> {{%.*}}, <4 x i32>* @gl_b, align 16
+}




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