r304127 - IRGen: Add optnone attribute on function during O0

David Blaikie via cfe-commits cfe-commits at lists.llvm.org
Mon May 29 15:50:17 PDT 2017


On Mon, May 29, 2017 at 12:00 PM Mehdi AMINI <joker.eph at gmail.com> wrote:

> 2017-05-29 11:53 GMT-07:00 David Blaikie <dblaikie at gmail.com>:
>
>> Actually I was thinking of more like static-init-wasm.cpp - which seemed
>> to have the attribute list numbers hardcoded & presumably isn't
>> checking/caring about them.
>>
>
> Oh I see, I actually don't remember about this test in particular (I wrote
> this patch months ago). But since the attribute changes only for a subset
> of these functions, there might have been value into checking that these
> function in particular get a new set of attributes but not the others, not
> sure.
>

Doesn't look like the test is trying to test much about the attributes that
I can tell (according to the description of what the test is trying to do,
and the fact that it's not verifying the contents of the attribute lists at
all, etc)- seems to me to have hardcoded the whole function declaration.


>
>
>
>>
>> But also, looking closer - I'm guessing a bunch of other tests that got
>> the -disable-O0-optnone treatment were because of similar
>> overly-constrained tests? I assume they don't actually need this feature
>> disabled, do they?
>>
>
> If you look at the RUN line, they are frequently piping through opt, for
> example:
>
>  %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57
> -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg |
> FileCheck %s
>

oh yeah, /those/ tests. totally fair


> We could also use an optimization flag and add disable-llvm-passes to the
> clang invocation, but I wasn't sure which way to go.
>

*nod* Not sure it matters too much to me. All good.


> (is there much need in general for a flag to disable this functionality?)
>>
>
> I think we usually add CC1 flag in such cases? I mimic it based on the
> life-time markers flag, and other CC1 flags in general.
>

Seemed a bit odd/esoteric to add a flag for it, but if there's some good
precedent, sure thing.

- Dave


>
>
> --
> Mehdi
>
>
>
>>
>> On Mon, May 29, 2017 at 11:48 AM Mehdi AMINI <joker.eph at gmail.com> wrote:
>>
>>> You mean things like cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl ?
>>> Right it seems that using .* would be fine before matching the amdgpu
>>> specific attributes.
>>>
>>> CC: Matt.
>>>
>>> --
>>> Mehdi
>>>
>>> 2017-05-29 11:14 GMT-07:00 David Blaikie <dblaikie at gmail.com>:
>>>
>>>> I'm assuming  most of these tests aren't actually testing for
>>>> attributes - perhaps it'd be better to remove their dependence on a
>>>> particular attribute list number so future changes to attributes don't
>>>> require so many touches?
>>>>
>>>> On Sun, May 28, 2017 at 10:38 PM Mehdi Amini via cfe-commits <
>>>> cfe-commits at lists.llvm.org> wrote:
>>>>
>>>>> Author: mehdi_amini
>>>>> Date: Mon May 29 00:38:20 2017
>>>>> New Revision: 304127
>>>>>
>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=304127&view=rev
>>>>> Log:
>>>>> IRGen: Add optnone attribute on function during O0
>>>>>
>>>>> Amongst other, this will help LTO to correctly handle/honor files
>>>>> compiled with O0, helping debugging failures.
>>>>> It also seems in line with how we handle other options, like how
>>>>> -fnoinline adds the appropriate attribute as well.
>>>>>
>>>>> Differential Revision: https://reviews.llvm.org/D28404
>>>>>
>>>>> Modified:
>>>>>     cfe/trunk/include/clang/Driver/CC1Options.td
>>>>>     cfe/trunk/include/clang/Frontend/CodeGenOptions.def
>>>>>     cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp
>>>>>     cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
>>>>>     cfe/trunk/lib/CodeGen/CodeGenModule.cpp
>>>>>     cfe/trunk/lib/Frontend/CompilerInvocation.cpp
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-2velem.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-3v.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-across.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-extract.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-fma.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-misc.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-perm.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-shifts.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-tbl.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-neon-vget.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-poly128.c
>>>>>     cfe/trunk/test/CodeGen/aarch64-poly64.c
>>>>>     cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp
>>>>>     cfe/trunk/test/CodeGen/address-safety-attr.cpp
>>>>>     cfe/trunk/test/CodeGen/arm-crc32.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-fma.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-shifts.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-vcvtX.c
>>>>>     cfe/trunk/test/CodeGen/arm-neon-vget.c
>>>>>     cfe/trunk/test/CodeGen/arm64-crc32.c
>>>>>     cfe/trunk/test/CodeGen/arm64-lanes.c
>>>>>     cfe/trunk/test/CodeGen/arm64_vcopy.c
>>>>>     cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c
>>>>>     cfe/trunk/test/CodeGen/attr-coldhot.c
>>>>>     cfe/trunk/test/CodeGen/attr-naked.c
>>>>>     cfe/trunk/test/CodeGen/builtins-arm-exclusive.c
>>>>>     cfe/trunk/test/CodeGen/builtins-arm.c
>>>>>     cfe/trunk/test/CodeGen/builtins-arm64.c
>>>>>     cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp
>>>>>     cfe/trunk/test/CodeGen/pragma-weak.c
>>>>>     cfe/trunk/test/CodeGen/unwind-attr.c
>>>>>     cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp
>>>>>     cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp
>>>>>     cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp
>>>>>     cfe/trunk/test/CodeGenCXX/optnone-templates.cpp
>>>>>     cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp
>>>>>     cfe/trunk/test/CodeGenCXX/thunks.cpp
>>>>>     cfe/trunk/test/CodeGenObjC/gnu-exceptions.m
>>>>>     cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl
>>>>>     cfe/trunk/test/Driver/darwin-iphone-defaults.m
>>>>>
>>>>> Modified: cfe/trunk/include/clang/Driver/CC1Options.td
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/CC1Options.td?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/include/clang/Driver/CC1Options.td (original)
>>>>> +++ cfe/trunk/include/clang/Driver/CC1Options.td Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -172,6 +172,8 @@ def disable_llvm_optzns : Flag<["-"], "d
>>>>>  def disable_lifetimemarkers : Flag<["-"], "disable-lifetime-markers">,
>>>>>    HelpText<"Disable lifetime-markers emission even when optimizations
>>>>> are "
>>>>>             "enabled">;
>>>>> +def disable_O0_optnone : Flag<["-"], "disable-O0-optnone">,
>>>>> +  HelpText<"Disable adding the optnone attribute to functions at O0">;
>>>>>  def disable_red_zone : Flag<["-"], "disable-red-zone">,
>>>>>    HelpText<"Do not emit code that uses the red zone.">;
>>>>>  def dwarf_column_info : Flag<["-"], "dwarf-column-info">,
>>>>>
>>>>> Modified: cfe/trunk/include/clang/Frontend/CodeGenOptions.def
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/include/clang/Frontend/CodeGenOptions.def (original)
>>>>> +++ cfe/trunk/include/clang/Frontend/CodeGenOptions.def Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -53,6 +53,7 @@ CODEGENOPT(DisableLLVMPasses , 1, 0) ///
>>>>>                                       ///< the pristine IR generated
>>>>> by the
>>>>>                                       ///< frontend.
>>>>>  CODEGENOPT(DisableLifetimeMarkers, 1, 0) ///< Don't emit any lifetime
>>>>> markers
>>>>> +CODEGENOPT(DisableO0ImplyOptNone , 1, 0) ///< Don't annonate function
>>>>> with optnone at O0
>>>>>  CODEGENOPT(ExperimentalNewPassManager, 1, 0) ///< Enables the new,
>>>>> experimental
>>>>>                                               ///< pass manager.
>>>>>  CODEGENOPT(DisableRedZone    , 1, 0) ///< Set when -mno-red-zone is
>>>>> enabled.
>>>>>
>>>>> Modified: cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp (original)
>>>>> +++ cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp Mon May 29 00:38:20 2017
>>>>> @@ -760,6 +760,7 @@ emitCombinerOrInitializer(CodeGenModule
>>>>>        IsCombiner ? ".omp_combiner." : ".omp_initializer.",
>>>>> &CGM.getModule());
>>>>>    CGM.SetInternalFunctionAttributes(/*D=*/nullptr, Fn, FnInfo);
>>>>>    Fn->removeFnAttr(llvm::Attribute::NoInline);
>>>>> +  Fn->removeFnAttr(llvm::Attribute::OptimizeNone);
>>>>>    Fn->addFnAttr(llvm::Attribute::AlwaysInline);
>>>>>    CodeGenFunction CGF(CGM);
>>>>>    // Map "T omp_in;" variable to "*omp_in_parm" value in all
>>>>> expressions.
>>>>> @@ -3515,6 +3516,7 @@ emitTaskPrivateMappingFunction(CodeGenMo
>>>>>    CGM.SetInternalFunctionAttributes(/*D=*/nullptr, TaskPrivatesMap,
>>>>>                                      TaskPrivatesMapFnInfo);
>>>>>    TaskPrivatesMap->removeFnAttr(llvm::Attribute::NoInline);
>>>>> +  TaskPrivatesMap->removeFnAttr(llvm::Attribute::OptimizeNone);
>>>>>    TaskPrivatesMap->addFnAttr(llvm::Attribute::AlwaysInline);
>>>>>    CodeGenFunction CGF(CGM);
>>>>>    CGF.disableDebugInfo();
>>>>>
>>>>> Modified: cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp (original)
>>>>> +++ cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -861,6 +861,7 @@ llvm::Value *CGOpenMPRuntimeNVPTX::emitT
>>>>>        D, ThreadIDVar, InnermostKind, CodeGen);
>>>>>    llvm::Function *OutlinedFun = cast<llvm::Function>(OutlinedFunVal);
>>>>>    OutlinedFun->removeFnAttr(llvm::Attribute::NoInline);
>>>>> +  OutlinedFun->removeFnAttr(llvm::Attribute::OptimizeNone);
>>>>>    OutlinedFun->addFnAttr(llvm::Attribute::AlwaysInline);
>>>>>
>>>>>    return OutlinedFun;
>>>>>
>>>>> Modified: cfe/trunk/lib/CodeGen/CodeGenModule.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/lib/CodeGen/CodeGenModule.cpp (original)
>>>>> +++ cfe/trunk/lib/CodeGen/CodeGenModule.cpp Mon May 29 00:38:20 2017
>>>>> @@ -907,7 +907,16 @@ void CodeGenModule::SetLLVMFunctionAttri
>>>>>      return;
>>>>>    }
>>>>>
>>>>> -  if (D->hasAttr<OptimizeNoneAttr>()) {
>>>>> +  // Track whether we need to add the optnone LLVM attribute,
>>>>> +  // starting with the default for this optimization level.
>>>>> +  bool ShouldAddOptNone =
>>>>> +      !CodeGenOpts.DisableO0ImplyOptNone &&
>>>>> CodeGenOpts.OptimizationLevel == 0;
>>>>> +  // We can't add optnone in the following cases, it won't pass the
>>>>> verifier.
>>>>> +  ShouldAddOptNone &= !D->hasAttr<MinSizeAttr>();
>>>>> +  ShouldAddOptNone &=
>>>>> !F->hasFnAttribute(llvm::Attribute::AlwaysInline);
>>>>> +  ShouldAddOptNone &= !D->hasAttr<AlwaysInlineAttr>();
>>>>> +
>>>>> +  if (ShouldAddOptNone || D->hasAttr<OptimizeNoneAttr>()) {
>>>>>      B.addAttribute(llvm::Attribute::OptimizeNone);
>>>>>
>>>>>      // OptimizeNone implies noinline; we should not be inlining such
>>>>> functions.
>>>>> @@ -961,7 +970,8 @@ void CodeGenModule::SetLLVMFunctionAttri
>>>>>    // function.
>>>>>    if (!D->hasAttr<OptimizeNoneAttr>()) {
>>>>>      if (D->hasAttr<ColdAttr>()) {
>>>>> -      B.addAttribute(llvm::Attribute::OptimizeForSize);
>>>>> +      if (!ShouldAddOptNone)
>>>>> +        B.addAttribute(llvm::Attribute::OptimizeForSize);
>>>>>        B.addAttribute(llvm::Attribute::Cold);
>>>>>      }
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/lib/Frontend/CompilerInvocation.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Frontend/CompilerInvocation.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/lib/Frontend/CompilerInvocation.cpp (original)
>>>>> +++ cfe/trunk/lib/Frontend/CompilerInvocation.cpp Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -534,6 +534,7 @@ static bool ParseCodeGenArgs(CodeGenOpti
>>>>>
>>>>>    Opts.DisableLLVMPasses = Args.hasArg(OPT_disable_llvm_passes);
>>>>>    Opts.DisableLifetimeMarkers =
>>>>> Args.hasArg(OPT_disable_lifetimemarkers);
>>>>> +  Opts.DisableO0ImplyOptNone = Args.hasArg(OPT_disable_O0_optnone);
>>>>>    Opts.DisableRedZone = Args.hasArg(OPT_disable_red_zone);
>>>>>    Opts.ForbidGuardVariables =
>>>>> Args.hasArg(OPT_fforbid_guard_variables);
>>>>>    Opts.UseRegisterSizedBitfieldAccess = Args.hasArg(
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-2velem.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-2velem.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-2velem.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-2velem.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-3v.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-3v.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-3v.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-3v.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature
>>>>> +neon  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck
>>>>> %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-across.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-across.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-across.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-across.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-extract.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-extract.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-extract.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-extract.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,6 +1,6 @@
>>>>>  // REQUIRES: aarch64-registered-target
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-fma.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-fma.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-fma.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -S -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:     -fallow-half-arguments-and-returns -S -emit-llvm -o - %s \
>>>>> +// RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone
>>>>> -emit-llvm -o - %s \
>>>>>  // RUN: | opt -S -mem2reg \
>>>>>  // RUN: | FileCheck %s
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -fallow-half-arguments-and-returns -emit-llvm -o - %s \
>>>>> +// RUN:  -disable-O0-optnone -fallow-half-arguments-and-returns
>>>>> -emit-llvm -o - %s \
>>>>>  // RUN: | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-misc.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-misc.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-misc.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-misc.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -fallow-half-arguments-and-returns -emit-llvm -o - %s \
>>>>> +// RUN:  -disable-O0-optnone -fallow-half-arguments-and-returns
>>>>> -emit-llvm -o - %s \
>>>>>  // RUN: | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-perm.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-perm.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-perm.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-perm.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>  #include <arm_neon.h>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,6 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> -
>>>>> +// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
>>>>> (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c Mon
>>>>> May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -target-cpu cyclone \
>>>>> -// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-shifts.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-shifts.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-shifts.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -ffp-contract=fast -S -emit-llvm -o - %s | opt -S -mem2reg
>>>>> | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -ffp-contract=fast -S -emit-llvm -o - %s
>>>>> | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-tbl.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-tbl.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-tbl.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-tbl.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: -disable-O0-optnone  -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -fallow-half-arguments-and-returns -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> -fallow-half-arguments-and-returns -disable-O0-optnone -emit-llvm -o - %s |
>>>>> opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -fallow-half-arguments-and-returns -emit-llvm -o - %s \
>>>>> +// RUN:  -fallow-half-arguments-and-returns -disable-O0-optnone
>>>>> -emit-llvm -o - %s \
>>>>>  // RUN: | opt -S -mem2reg | FileCheck %s
>>>>>  // Test new aarch64 intrinsics and types
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-neon-vget.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-neon-vget.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-neon-vget.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-apple-darwin -target-feature +neon \
>>>>> -// RUN:   -fallow-half-arguments-and-returns -emit-llvm -o - %s \
>>>>> +// RUN:   -fallow-half-arguments-and-returns -disable-O0-optnone
>>>>> -emit-llvm -o - %s \
>>>>>  // RUN: | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-poly128.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly128.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-poly128.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-poly128.c Mon May 29 00:38:20 2017
>>>>> @@ -1,6 +1,6 @@
>>>>>  // REQUIRES: aarch64-registered-target
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -ffp-contract=fast -emit-llvm -o - %s | opt -S -mem2reg \
>>>>> +// RUN: -disable-O0-optnone -ffp-contract=fast -emit-llvm -o - %s |
>>>>> opt -S -mem2reg \
>>>>>  // RUN:  | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics with poly128
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/aarch64-poly64.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly64.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/aarch64-poly64.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/aarch64-poly64.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon
>>>>> \
>>>>> -// RUN:  -ffp-contract=fast -emit-llvm -o - %s | opt -S -mem2reg \
>>>>> +// RUN:  -ffp-contract=fast -disable-O0-optnone -emit-llvm -o - %s |
>>>>> opt -S -mem2reg \
>>>>>  // RUN:  | FileCheck %s
>>>>>
>>>>>  // Test new aarch64 intrinsics with poly64
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,9 +1,9 @@
>>>>>  // Make sure the sanitize_address attribute is emitted when using
>>>>> both ASan and KASan.
>>>>>  // Also document that __attribute__((no_sanitize_address)) doesn't
>>>>> disable KASan instrumentation.
>>>>>
>>>>> -/// RUN: %clang_cc1 -triple i386-unknown-linux -emit-llvm -o - %s |
>>>>> FileCheck -check-prefix=CHECK-NOASAN %s
>>>>> -/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=address
>>>>> -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ASAN %s
>>>>> -/// RUN: %clang_cc1 -triple i386-unknown-linux
>>>>> -fsanitize=kernel-address -emit-llvm -o - %s | FileCheck
>>>>> -check-prefix=CHECK-KASAN %s
>>>>> +/// RUN: %clang_cc1 -triple i386-unknown-linux -disable-O0-optnone
>>>>> -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-NOASAN %s
>>>>> +/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=address
>>>>> -disable-O0-optnone -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ASAN
>>>>> %s
>>>>> +/// RUN: %clang_cc1 -triple i386-unknown-linux
>>>>> -fsanitize=kernel-address -disable-O0-optnone -emit-llvm -o - %s |
>>>>> FileCheck -check-prefix=CHECK-KASAN %s
>>>>>
>>>>>  int HasSanitizeAddress() {
>>>>>    return 1;
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/address-safety-attr.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/address-safety-attr.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGen/address-safety-attr.cpp Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -3,16 +3,16 @@ int DefinedInDifferentFile(int *a);
>>>>>  // RUN: echo "struct S { S(){} ~S(){} };" >> %t.extra-source.cpp
>>>>>  // RUN: echo "S glob_array[5];" >> %t.extra-source.cpp
>>>>>
>>>>> -// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm
>>>>> -o - %s -include %t.extra-source.cpp | FileCheck -check-prefix=WITHOUT %s
>>>>> -// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm
>>>>> -o - %s -include %t.extra-source.cpp -fsanitize=address | FileCheck
>>>>> -check-prefix=ASAN %s
>>>>> +// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin
>>>>> -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp |
>>>>> FileCheck -check-prefix=WITHOUT %s
>>>>> +// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin
>>>>> -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp
>>>>> -fsanitize=address | FileCheck -check-prefix=ASAN %s
>>>>>
>>>>>  // RUN: echo "fun:*BlacklistedFunction*" > %t.func.blacklist
>>>>> -// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm
>>>>> -o - %s -include %t.extra-source.cpp -fsanitize=address
>>>>> -fsanitize-blacklist=%t.func.blacklist | FileCheck -check-prefix=BLFUNC %s
>>>>> +// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin
>>>>> -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp
>>>>> -fsanitize=address -fsanitize-blacklist=%t.func.blacklist | FileCheck
>>>>> -check-prefix=BLFUNC %s
>>>>>
>>>>>  // The blacklist file uses regexps, so escape backslashes, which are
>>>>> common in
>>>>>  // Windows paths.
>>>>>  // RUN: echo "src:%s" | sed -e 's/\\/\\\\/g' > %t.file.blacklist
>>>>> -// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm
>>>>> -o - %s -include %t.extra-source.cpp -fsanitize=address
>>>>> -fsanitize-blacklist=%t.file.blacklist | FileCheck -check-prefix=BLFILE %s
>>>>> +// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin
>>>>> -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp
>>>>> -fsanitize=address -fsanitize-blacklist=%t.file.blacklist | FileCheck
>>>>> -check-prefix=BLFILE %s
>>>>>
>>>>>  // The sanitize_address attribute should be attached to functions
>>>>>  // when AddressSanitizer is enabled, unless no_sanitize_address
>>>>> attribute
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-crc32.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-crc32.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-crc32.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-crc32.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>>  // RUN: %clang_cc1 -triple armv8-none-linux-gnueabi \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  int crc32b(int a, char b)
>>>>>  {
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck
>>>>> %s
>>>>> +// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S
>>>>> -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-fma.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-fma.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-fma.c Mon May 29 00:38:20 2017
>>>>> @@ -3,7 +3,7 @@
>>>>>  // RUN:   -target-cpu cortex-a7 \
>>>>>  // RUN:   -mfloat-abi hard \
>>>>>  // RUN:   -ffreestanding \
>>>>> -// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:   -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck
>>>>> %s
>>>>> +// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S
>>>>> -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-shifts.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-shifts.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-shifts.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,6 @@
>>>>>  // REQUIRES: arm-registered-target
>>>>>  // RUN: %clang_cc1 -triple thumbv7-apple-darwin \
>>>>> +// RUN:   -disable-O0-optnone \
>>>>>  // RUN:   -target-cpu cortex-a8 \
>>>>>  // RUN:   -ffreestanding \
>>>>>  // RUN:   -emit-llvm -w -o - %s | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-vcvtX.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vcvtX.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-vcvtX.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-vcvtX.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck
>>>>> %s
>>>>> +// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
>>>>> cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S
>>>>> -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm-neon-vget.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm-neon-vget.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm-neon-vget.c Mon May 29 00:38:20 2017
>>>>> @@ -4,7 +4,7 @@
>>>>>  // RUN:   -mfloat-abi soft \
>>>>>  // RUN:   -target-feature +soft-float-abi \
>>>>>  // RUN:   -ffreestanding \
>>>>> -// RUN:   -emit-llvm -w -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:   -disable-O0-optnone -emit-llvm -w -o - %s | opt -S -mem2reg
>>>>> | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm64-crc32.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-crc32.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm64-crc32.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm64-crc32.c Mon May 29 00:38:20 2017
>>>>> @@ -1,6 +1,6 @@
>>>>>  // REQUIRES: aarch64-registered-target
>>>>>  // RUN: %clang_cc1 -triple arm64-none-linux-gnu \
>>>>> -// RUN:   -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN:  -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg
>>>>> | FileCheck %s
>>>>>
>>>>>  int crc32b(int a, char b)
>>>>>  {
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm64-lanes.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-lanes.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm64-lanes.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm64-lanes.c Mon May 29 00:38:20 2017
>>>>> @@ -1,5 +1,5 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> -// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -target-feature +neon
>>>>> -ffreestanding -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> --check-prefix CHECK-BE
>>>>> +// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -target-feature +neon
>>>>> -ffreestanding -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s --check-prefix CHECK-BE
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm64_vcopy.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vcopy.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm64_vcopy.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm64_vcopy.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -S -o - -emit-llvm %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -S -o - -disable-O0-optnone -emit-llvm %s | opt -S -mem2reg
>>>>> | FileCheck %s
>>>>>
>>>>>  // Test ARM64 SIMD copy vector element to vector element: vcopyq_lane*
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -fallow-half-arguments-and-returns -S -o - -emit-llvm %s |
>>>>> opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon
>>>>> -ffreestanding -fallow-half-arguments-and-returns -S -o -
>>>>> -disable-O0-optnone -emit-llvm %s | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  #include <arm_neon.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/attr-coldhot.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-coldhot.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/attr-coldhot.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/attr-coldhot.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,5 @@
>>>>> -// RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s
>>>>> +// RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s
>>>>> -check-prefixes=CHECK,O0
>>>>> +// RUN: %clang_cc1 -emit-llvm %s -o - -O1 -disable-llvm-passes |
>>>>> FileCheck %s -check-prefixes=CHECK,O1
>>>>>
>>>>>  int test1() __attribute__((__cold__)) {
>>>>>    return 42;
>>>>> @@ -8,4 +9,5 @@ int test1() __attribute__((__cold__)) {
>>>>>  // CHECK: ret
>>>>>  }
>>>>>
>>>>> -// CHECK: attributes [[ATTR]] = { {{.*}}cold{{.*}}optsize{{.*}} }
>>>>> +// O0: attributes [[ATTR]] = { {{.*}}cold{{.*}}optnone{{.*}} }
>>>>> +// O1: attributes [[ATTR]] = { {{.*}}cold{{.*}}optsize{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/attr-naked.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-naked.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/attr-naked.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/attr-naked.c Mon May 29 00:38:20 2017
>>>>> @@ -4,14 +4,14 @@ void t1() __attribute__((naked));
>>>>>
>>>>>  // Basic functionality check
>>>>>  // (Note that naked needs to imply noinline to work properly.)
>>>>> -// CHECK: define void @t1() [[NAKED:#[0-9]+]] {
>>>>> +// CHECK: define void @t1() [[NAKED_OPTNONE:#[0-9]+]] {
>>>>>  void t1()
>>>>>  {
>>>>>  }
>>>>>
>>>>>  // Make sure this doesn't explode in the verifier.
>>>>>  // (It doesn't really make sense, but it isn't invalid.)
>>>>> -// CHECK: define void @t2() [[NAKED]] {
>>>>> +// CHECK: define void @t2() [[NAKED:#[0-9]+]] {
>>>>>  __attribute((naked, always_inline)) void t2() {
>>>>>  }
>>>>>
>>>>> @@ -23,4 +23,5 @@ __attribute((naked)) void t3(int x) {
>>>>>  // CHECK: unreachable
>>>>>  }
>>>>>
>>>>> +// CHECK: attributes [[NAKED_OPTNONE]] = { naked noinline nounwind
>>>>> optnone{{.*}} }
>>>>>  // CHECK: attributes [[NAKED]] = { naked noinline nounwind{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/builtins-arm-exclusive.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/builtins-arm-exclusive.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/builtins-arm-exclusive.c Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,6 +1,5 @@
>>>>> -// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi
>>>>> -fno-signed-char -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> -// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0
>>>>> -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> --check-prefix=CHECK-ARM64
>>>>> -
>>>>> +// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi
>>>>> -fno-signed-char -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>> +// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0
>>>>> -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> --check-prefix=CHECK-ARM64
>>>>>
>>>>>  struct Simple {
>>>>>    char a, b;
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/builtins-arm.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/builtins-arm.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/builtins-arm.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu
>>>>> cortex-a8 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu
>>>>> cortex-a8 -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg |
>>>>> FileCheck %s
>>>>>
>>>>>  #include <stdint.h>
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/builtins-arm64.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/builtins-arm64.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/builtins-arm64.c Mon May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple arm64-unknown-linux -emit-llvm -o - %s |
>>>>> opt -S -mem2reg | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone
>>>>> -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
>>>>>
>>>>>  void f0(void *a, void *b) {
>>>>>         __clear_cache(a,b);
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -17,4 +17,4 @@ int main() {
>>>>>
>>>>>  }
>>>>>
>>>>> -// CHECK: attributes [[NI]] = { noduplicate nounwind{{.*}} }
>>>>> +// CHECK: attributes [[NI]] = { noduplicate {{.*}}nounwind{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/pragma-weak.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/pragma-weak.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/pragma-weak.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/pragma-weak.c Mon May 29 00:38:20 2017
>>>>> @@ -189,4 +189,4 @@ void zzz(void){}
>>>>>  int correct_linkage;
>>>>>
>>>>>  // CHECK: attributes [[NI]] = { noinline nounwind{{.*}} }
>>>>> -// CHECK: attributes [[RN]] = { noinline nounwind readnone{{.*}} }
>>>>> +// CHECK: attributes [[RN]] = { noinline nounwind optnone
>>>>> readnone{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGen/unwind-attr.c
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/unwind-attr.c?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGen/unwind-attr.c (original)
>>>>> +++ cfe/trunk/test/CodeGen/unwind-attr.c Mon May 29 00:38:20 2017
>>>>> @@ -23,7 +23,7 @@ __attribute__((weak)) int test2(void) {
>>>>>    return 0;
>>>>>  }
>>>>>
>>>>> -// CHECK: attributes [[TF]] = { noinline "{{.*}} }
>>>>> +// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }
>>>>>  // CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
>>>>>
>>>>>  // CHECK-NOEXC: attributes [[NUW]] = { noinline nounwind{{.*}} }
>>>>>
>>>>> Modified:
>>>>> cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> ---
>>>>> cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp
>>>>> (original)
>>>>> +++
>>>>> cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp Mon May
>>>>> 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext
>>>>> -fno-rtti -emit-llvm -o - %s | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext
>>>>> -fno-rtti -disable-O0-optnone -emit-llvm -o - %s | FileCheck %s
>>>>>
>>>>>  // CHECK: @_ZTV5TemplIiE = internal unnamed_addr constant { [7 x i8*]
>>>>> } { [7 x i8*] [i8* null, i8* null, i8* bitcast (void (%struct.Templ*)*
>>>>> @_ZN5TemplIiED1Ev to i8*), i8* bitcast (void (%struct.Templ*)*
>>>>> @_ZN5TemplIiED0Ev to i8*), i8* bitcast (void (%struct.Templ*)*
>>>>> @_ZN5TemplIiE1fEv to i8*), i8* bitcast (void (%struct.Templ*)*
>>>>> @_ZN5TemplIiE1gEv to i8*), i8* null] }
>>>>>
>>>>>
>>>>> Modified:
>>>>> cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp
>>>>> (original)
>>>>> +++ cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp Mon
>>>>> May 29 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext
>>>>> -fno-rtti -emit-llvm -o - %s | FileCheck %s
>>>>> +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext
>>>>> -fno-rtti -disable-O0-optnone -emit-llvm -o - %s | FileCheck %s
>>>>>  // rdar://8825235
>>>>>  /**
>>>>>  1) Normally, global object construction code ends up in __StaticInit
>>>>> segment of text section
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp
>>>>> (original)
>>>>> +++ cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp Mon May
>>>>> 29 00:38:20 2017
>>>>> @@ -1,6 +1,6 @@
>>>>> -// RUN: %clang_cc1 %s -debug-info-kind=limited -triple
>>>>> %itanium_abi_triple -fno-use-cxa-atexit -S -emit-llvm -o - \
>>>>> +// RUN: %clang_cc1 %s -debug-info-kind=limited -triple
>>>>> %itanium_abi_triple -fno-use-cxa-atexit -S -disable-O0-optnone  -emit-llvm
>>>>> -o - \
>>>>>  // RUN:     | FileCheck %s --check-prefix=CHECK-NOKEXT
>>>>> -// RUN: %clang_cc1 %s -debug-info-kind=limited -triple
>>>>> %itanium_abi_triple -fno-use-cxa-atexit -fapple-kext -S -emit-llvm -o - \
>>>>> +// RUN: %clang_cc1 %s -debug-info-kind=limited -triple
>>>>> %itanium_abi_triple -fno-use-cxa-atexit -fapple-kext -S -disable-O0-optnone
>>>>> -emit-llvm -o - \
>>>>>  // RUN:     | FileCheck %s --check-prefix=CHECK-KEXT
>>>>>
>>>>>  class A {
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenCXX/optnone-templates.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/optnone-templates.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenCXX/optnone-templates.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGenCXX/optnone-templates.cpp Mon May 29
>>>>> 00:38:20 2017
>>>>> @@ -1,4 +1,4 @@
>>>>> -// RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11
>>>>> -emit-llvm -o - | FileCheck %s
>>>>> +// RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11
>>>>> -disable-O0-optnone -emit-llvm -o - | FileCheck %s
>>>>>
>>>>>  // Test optnone on template instantiations.
>>>>>
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -43,12 +43,12 @@ struct A {
>>>>>
>>>>>  A theA;
>>>>>
>>>>> -// WEBASSEMBLY32: define internal void @__cxx_global_var_init() #0
>>>>> section ".text.__startup" {
>>>>> +// WEBASSEMBLY32: define internal void @__cxx_global_var_init() #3
>>>>> section ".text.__startup" {
>>>>>  // WEBASSEMBLY32: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA)
>>>>> -// WEBASSEMBLY32: define internal void
>>>>> @_GLOBAL__sub_I_static_init_wasm.cpp() #0 section ".text.__startup" {
>>>>> +// WEBASSEMBLY32: define internal void
>>>>> @_GLOBAL__sub_I_static_init_wasm.cpp() #3 section ".text.__startup" {
>>>>>  // WEBASSEMBLY32: call void @__cxx_global_var_init()
>>>>>  //
>>>>> -// WEBASSEMBLY64: define internal void @__cxx_global_var_init() #0
>>>>> section ".text.__startup" {
>>>>> +// WEBASSEMBLY64: define internal void @__cxx_global_var_init() #3
>>>>> section ".text.__startup" {
>>>>>  // WEBASSEMBLY64: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA)
>>>>> -// WEBASSEMBLY64: define internal void
>>>>> @_GLOBAL__sub_I_static_init_wasm.cpp() #0 section ".text.__startup" {
>>>>> +// WEBASSEMBLY64: define internal void
>>>>> @_GLOBAL__sub_I_static_init_wasm.cpp() #3 section ".text.__startup" {
>>>>>  // WEBASSEMBLY64: call void @__cxx_global_var_init()
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenCXX/thunks.cpp
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/thunks.cpp?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenCXX/thunks.cpp (original)
>>>>> +++ cfe/trunk/test/CodeGenCXX/thunks.cpp Mon May 29 00:38:20 2017
>>>>> @@ -401,5 +401,5 @@ D::~D() {}
>>>>>  // CHECK-OPT-LABEL: define linkonce_odr void @_ZN6Test101C3fooEv
>>>>>  // CHECK-OPT-LABEL: define linkonce_odr void @_ZThn8_N6Test101C3fooEv
>>>>>
>>>>> -// CHECK-NONOPT: attributes [[NUW]] = { noinline nounwind
>>>>> uwtable{{.*}} }
>>>>> +// CHECK-NONOPT: attributes [[NUW]] = { noinline nounwind optnone
>>>>> uwtable{{.*}} }
>>>>>  // CHECK-OPT: attributes [[NUW]] = { nounwind uwtable{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenObjC/gnu-exceptions.m
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/gnu-exceptions.m?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenObjC/gnu-exceptions.m (original)
>>>>> +++ cfe/trunk/test/CodeGenObjC/gnu-exceptions.m Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -32,4 +32,4 @@ void test0() {
>>>>>    log(1);
>>>>>  }
>>>>>
>>>>> -// CHECK: attributes [[TF]] = { noinline "{{.*}} }
>>>>> +// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }
>>>>>
>>>>> Modified: cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl (original)
>>>>> +++ cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -151,28 +151,28 @@ kernel void reqd_work_group_size_32_2_1_
>>>>>  // CHECK-NOT: "amdgpu-num-sgpr"="0"
>>>>>  // CHECK-NOT: "amdgpu-num-vgpr"="0"
>>>>>
>>>>> -// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="32,64"
>>>>> -// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="64,64"
>>>>> -// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="16,128"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind
>>>>> "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { noinline nounwind
>>>>> "amdgpu-waves-per-eu"="2,4"
>>>>> -// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind
>>>>> "amdgpu-num-sgpr"="32"
>>>>> -// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind
>>>>> "amdgpu-num-vgpr"="64"
>>>>> +// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> +// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="64,64"
>>>>> +// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="16,128"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind
>>>>> optnone "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { noinline nounwind
>>>>> optnone "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind
>>>>> optnone "amdgpu-num-sgpr"="32"
>>>>> +// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind
>>>>> optnone "amdgpu-num-vgpr"="64"
>>>>>
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { noinline nounwind
>>>>> "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { noinline nounwind
>>>>> "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2,4"
>>>>> -// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] =
>>>>> { noinline nounwind "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32"
>>>>> -// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] =
>>>>> { noinline nounwind "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-vgpr"="64"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline
>>>>> nounwind "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline
>>>>> nounwind "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = {
>>>>> noinline nounwind "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
>>>>> -// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = {
>>>>> noinline nounwind "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
>>>>> -// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { noinline
>>>>> nounwind "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { noinline nounwind optnone
>>>>> "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { noinline nounwind
>>>>> optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] =
>>>>> { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32"
>>>>> +// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] =
>>>>> { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-vgpr"="64"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline
>>>>> nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline
>>>>> nounwind optnone "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = {
>>>>> noinline nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = {
>>>>> noinline nounwind optnone "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { noinline
>>>>> nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"
>>>>>
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32"
>>>>> "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64"
>>>>> "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32"
>>>>> "amdgpu-waves-per-eu"="2,4"
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline
>>>>> nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64"
>>>>> "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline
>>>>> nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
>>>>>
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = {
>>>>> noinline nounwind "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
>>>>> -// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = {
>>>>> noinline nounwind "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = {
>>>>> noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
>>>>> +// CHECK-DAG: attributes
>>>>> [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = {
>>>>> noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"
>>>>> "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
>>>>>
>>>>> Modified: cfe/trunk/test/Driver/darwin-iphone-defaults.m
>>>>> URL:
>>>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/darwin-iphone-defaults.m?rev=304127&r1=304126&r2=304127&view=diff
>>>>>
>>>>> ==============================================================================
>>>>> --- cfe/trunk/test/Driver/darwin-iphone-defaults.m (original)
>>>>> +++ cfe/trunk/test/Driver/darwin-iphone-defaults.m Mon May 29 00:38:20
>>>>> 2017
>>>>> @@ -26,4 +26,4 @@ void f1() {
>>>>>    [I1 alloc];
>>>>>  }
>>>>>
>>>>> -// CHECK: attributes [[F0]] = { noinline ssp{{.*}} }
>>>>> +// CHECK: attributes [[F0]] = { noinline  optnone ssp{{.*}} }
>>>>>
>>>>>
>>>>> _______________________________________________
>>>>> cfe-commits mailing list
>>>>> cfe-commits at lists.llvm.org
>>>>> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
>>>>>
>>>>
>>>
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