r304017 - CodeGen: Define Swift's legal vector types for AArch64, ARM

Evgenii Stepanov via cfe-commits cfe-commits at lists.llvm.org
Fri May 26 14:33:23 PDT 2017


I've got the same failure locally w/o MSan, in a regular
release+assertions build on linux x86_64.

On Fri, May 26, 2017 at 2:15 PM, Vitaly Buka via cfe-commits
<cfe-commits at lists.llvm.org> wrote:
> Could this be the patch
> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/5228/steps/check-llvm%20msan/logs/stdio
>
> FAIL: LLVM :: CodeGen/ARM/arm-shrink-wrapping.ll (5392 of 20818)
> ******************** TEST 'LLVM :: CodeGen/ARM/arm-shrink-wrapping.ll'
> FAILED ********************
> Script:
> --
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/llc
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> -o - -enable-shrink-wrap=true -ifcvt-fn-start=1 -ifcvt-fn-stop=0
> -mtriple=armv7-apple-ios       |
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/FileCheck
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> --check-prefix=CHECK --check-prefix=ARM --check-prefix=ENABLE
> --check-prefix=ARM-ENABLE
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/llc
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> -o - -enable-shrink-wrap=false -ifcvt-fn-start=1 -ifcvt-fn-stop=0
> -mtriple=armv7-apple-ios       |
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/FileCheck
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> --check-prefix=CHECK --check-prefix=ARM --check-prefix=DISABLE
> --check-prefix=ARM-DISABLE
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/llc
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> -o - -enable-shrink-wrap=true -ifcvt-fn-start=1 -ifcvt-fn-stop=0
> -mtriple=thumbv7-apple-ios       |
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/FileCheck
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> --check-prefix=CHECK --check-prefix=THUMB --check-prefix=ENABLE
> --check-prefix=THUMB-ENABLE
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/llc
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> -o - -enable-shrink-wrap=false -ifcvt-fn-start=1 -ifcvt-fn-stop=0
> -mtriple=thumbv7-apple-ios       |
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm_build_msan/./bin/FileCheck
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
> --check-prefix=CHECK --check-prefix=THUMB --check-prefix=DISABLE
> --check-prefix=THUMB-DISABLE
> --
> Exit Code: 1
>
> Command Output (stderr):
> --
> /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll:659:10:
> error: expected string not found in input
> ; CHECK: bl
>          ^
> <stdin>:375:7: note: scanning from here
>  vldr s0, LCPI12_0
>       ^
> <stdin>:377:2: note: possible intended match here
>  bx lr
>  ^
>
>
>
> On Fri, May 26, 2017 at 11:11 AM, Arnold Schwaighofer via cfe-commits
> <cfe-commits at lists.llvm.org> wrote:
>>
>> Author: arnolds
>> Date: Fri May 26 13:11:54 2017
>> New Revision: 304017
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=304017&view=rev
>> Log:
>> CodeGen: Define Swift's legal vector types for AArch64, ARM
>>
>> rdar://32401301
>>
>> Modified:
>>     cfe/trunk/lib/CodeGen/TargetInfo.cpp
>>     cfe/trunk/test/CodeGen/64bit-swiftcall.c
>>     cfe/trunk/test/CodeGen/arm-swiftcall.c
>>
>> Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=304017&r1=304016&r2=304017&view=diff
>>
>> ==============================================================================
>> --- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
>> +++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Fri May 26 13:11:54 2017
>> @@ -4821,6 +4821,9 @@ private:
>>    bool isSwiftErrorInRegister() const override {
>>      return true;
>>    }
>> +
>> +  bool isLegalVectorTypeForSwift(CharUnits totalSize, llvm::Type *eltTy,
>> +                                 unsigned elts) const override;
>>  };
>>
>>  class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
>> @@ -4994,6 +4997,17 @@ bool AArch64ABIInfo::isIllegalVectorType
>>    return false;
>>  }
>>
>> +bool AArch64ABIInfo::isLegalVectorTypeForSwift(CharUnits totalSize,
>> +                                               llvm::Type *eltTy,
>> +                                               unsigned elts) const {
>> +  if (!llvm::isPowerOf2_32(elts))
>> +    return false;
>> +  if (totalSize.getQuantity() != 8 &&
>> +      (totalSize.getQuantity() != 16 || elts == 1))
>> +    return false;
>> +  return true;
>> +}
>> +
>>  bool AArch64ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
>>    // Homogeneous aggregates for AAPCS64 must have base types of a
>> floating
>>    // point type or a short-vector type. This is the same as the 32-bit
>> ABI,
>> @@ -5382,6 +5396,8 @@ private:
>>    bool isSwiftErrorInRegister() const override {
>>      return true;
>>    }
>> +  bool isLegalVectorTypeForSwift(CharUnits totalSize, llvm::Type *eltTy,
>> +                                 unsigned elts) const override;
>>  };
>>
>>  class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
>> @@ -5894,6 +5910,20 @@ bool ARMABIInfo::isIllegalVectorType(Qua
>>    return false;
>>  }
>>
>> +bool ARMABIInfo::isLegalVectorTypeForSwift(CharUnits vectorSize,
>> +                                           llvm::Type *eltTy,
>> +                                           unsigned numElts) const {
>> +  if (!llvm::isPowerOf2_32(numElts))
>> +    return false;
>> +  unsigned size = getDataLayout().getTypeStoreSizeInBits(eltTy);
>> +  if (size > 64)
>> +    return false;
>> +  if (vectorSize.getQuantity() != 8 &&
>> +      (vectorSize.getQuantity() != 16 || numElts == 1))
>> +    return false;
>> +  return true;
>> +}
>> +
>>  bool ARMABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
>>    // Homogeneous aggregates for AAPCS-VFP must have base types of float,
>>    // double, or 64-bit or 128-bit vectors.
>>
>> Modified: cfe/trunk/test/CodeGen/64bit-swiftcall.c
>> URL:
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/64bit-swiftcall.c?rev=304017&r1=304016&r2=304017&view=diff
>>
>> ==============================================================================
>> --- cfe/trunk/test/CodeGen/64bit-swiftcall.c (original)
>> +++ cfe/trunk/test/CodeGen/64bit-swiftcall.c Fri May 26 13:11:54 2017
>> @@ -1,5 +1,6 @@
>>  // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -target-cpu core2
>> -emit-llvm -o - %s | FileCheck %s
>>  // RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone
>> -emit-llvm -o - %s | FileCheck %s
>> +// RUN: %clang_cc1 -triple arm64-apple-ios9 -target-cpu cyclone
>> -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64
>>
>>  // REQUIRES: aarch64-registered-target,x86-registered-target
>>
>> @@ -60,6 +61,7 @@ SWIFTCALL void context_error_2(short s,
>>  /********************************** LOWERING
>> *********************************/
>>
>> /*****************************************************************************/
>>
>> +typedef float float3 __attribute__((ext_vector_type(3)));
>>  typedef float float4 __attribute__((ext_vector_type(4)));
>>  typedef float float8 __attribute__((ext_vector_type(8)));
>>  typedef double double2 __attribute__((ext_vector_type(2)));
>> @@ -1005,3 +1007,10 @@ struct {
>>  TEST(union_het_vecint)
>>  // CHECK: define swiftcc void @return_union_het_vecint([[UNION:%.*]]*
>> noalias sret
>>  // CHECK: define swiftcc void @take_union_het_vecint([[UNION]]*
>> +
>> +typedef struct {
>> +  float3 f3;
>> +} struct_v1f3;
>> +TEST(struct_v1f3)
>> +// ARM64-LABEL: define swiftcc { <2 x float>, float }
>> @return_struct_v1f3()
>> +// ARM64-LABEL: define swiftcc void @take_struct_v1f3(<2 x float>, float)
>>
>> Modified: cfe/trunk/test/CodeGen/arm-swiftcall.c
>> URL:
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-swiftcall.c?rev=304017&r1=304016&r2=304017&view=diff
>>
>> ==============================================================================
>> --- cfe/trunk/test/CodeGen/arm-swiftcall.c (original)
>> +++ cfe/trunk/test/CodeGen/arm-swiftcall.c Fri May 26 13:11:54 2017
>> @@ -57,6 +57,7 @@ SWIFTCALL void context_error_2(short s,
>>  /********************************** LOWERING
>> *********************************/
>>
>> /*****************************************************************************/
>>
>> +typedef float float3 __attribute__((ext_vector_type(3)));
>>  typedef float float4 __attribute__((ext_vector_type(4)));
>>  typedef float float8 __attribute__((ext_vector_type(8)));
>>  typedef double double2 __attribute__((ext_vector_type(2)));
>> @@ -1013,3 +1014,10 @@ typedef struct {
>>  TEST(struct_vf81)
>>  // CHECK-LABEL: define swiftcc { <4 x float>, <4 x float> }
>> @return_struct_vf81()
>>  // CHECK-LABEL: define swiftcc void @take_struct_vf81(<4 x float>, <4 x
>> float>)
>> +
>> +typedef struct {
>> +  float3 f3;
>> +} struct_v1f3;
>> +TEST(struct_v1f3)
>> +// CHECK-LABEL: define swiftcc { <2 x float>, float }
>> @return_struct_v1f3()
>> +// CHECK-LABEL: define swiftcc void @take_struct_v1f3(<2 x float>, float)
>>
>>
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>
>
>
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