[PATCH] D30423: [ubsan] Detect UB loads from bitfields

[Alex Lorenz via Phabricator via cfe-commits]

arphaman added inline comments.


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Comment at: test/CodeGenCXX/ubsan-bitfields.cpp:21
+  // CHECK: call void @__ubsan_handle_load_invalid_value
+  return s->e1;
+}
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Can we avoid the check if the bitfield is 2 bits wide?


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Comment at: test/CodeGenObjC/ubsan-bool.m:25
+  // OBJC:  [[ASHR:%.*]] = ashr i8 [[SHL]], 7
+  // OBJC:  [[ICMP:%.*]] = icmp ule i8 [[ASHR]], 1, !nosanitize
+  // OBJC: call void @__ubsan_handle_load_invalid_value
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One unrelated thing that I noticed in the IR, the `zext`s to `i64` are emitted before the branch, even though they are used only in the `invalid_value` blocks. I know that the optimizer can move those anyway, but would there any be any benefit in moving them into the blocks at the frontend IRGen level?


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Comment at: test/CodeGenObjC/ubsan-bool.m:26
+  // OBJC:  [[ICMP:%.*]] = icmp ule i8 [[ASHR]], 1, !nosanitize
+  // OBJC: call void @__ubsan_handle_load_invalid_value
+
----------------
Is it possible to avoid the check here since the bitfield is just one bit wide?


https://reviews.llvm.org/D30423