[PATCH] D29542: [TargetInfo] Adjust x86-32 atomic support to the CPU used

[Justin Lebar via Phabricator via cfe-commits]

jlebar added a comment.

> Could someone help me figure out what is the cause and correct solution to that failure? @jlebar?

The test is checking that the macros have the same value when compiling for CUDA host and device.  That is, if we're compiling for an x86 CPU and an NVPTX GPU, we invoke cc1 twice, and the macros should have the same values both times.  Which, I know, is a lie.  But because when we're compiling for NVPTX we still parse all of the CPU code, macros generally need to have the same values otherwise we get into Big Trouble.  NVPTX atomics are controlled separately.

You can see in NVPTXTargetInfo that we read properties from the host targetinfo so that we export the same macros.  The problem here seems to be that we're mutating the x86 targetinfo after the nvptx targetinfo reads its properties.

Does that give you enough context to fix the problem?


Repository:
  rL LLVM

https://reviews.llvm.org/D29542