[PATCH] D28528: [PowerPC] Fix the wrong implementation of builtin vec_rlnm.

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

Please fix the minor issue with the test case and then commit.
LGTM.



================
Comment at: test/CodeGen/builtins-ppc-p9vector.c:871
 vector unsigned int test77(void) {
+// CHECK-BE: %shl.i = shl <4 x i32
+// CHECK-BE: %or.i = or <4 x i32> %shl.i
----------------
Don't hard-code the names of intermediate results. I imagine this will fail even now on some build bot. Rather specify it as something like:
`// CHECK-BE: %[[RES1:.+]] = shl <4 x i32`

And feel free to use the saved result as the operand to the next instruction. Like:
`// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]]`


https://reviews.llvm.org/D28528