r289249 - [DOXYGEN] Improved doxygen comments for x86 intrinsics headers.
Ekaterina Romanova via cfe-commits
cfe-commits at lists.llvm.org
Fri Dec 9 10:35:50 PST 2016
Author: kromanova
Date: Fri Dec 9 12:35:50 2016
New Revision: 289249
URL: http://llvm.org/viewvc/llvm-project?rev=289249&view=rev
Log:
[DOXYGEN] Improved doxygen comments for x86 intrinsics headers.
Tagged instruction names with <c> INSTR_NAME </c> to display them in typewriter font.
In the past, \c command was used, unfortunately it applied to only one word.
<c> .. </c> has the same meaning, but applies to all words in between the tags.
Modified:
cfe/trunk/lib/Headers/__wmmintrin_aes.h
cfe/trunk/lib/Headers/__wmmintrin_pclmul.h
cfe/trunk/lib/Headers/ammintrin.h
cfe/trunk/lib/Headers/avxintrin.h
cfe/trunk/lib/Headers/bmiintrin.h
cfe/trunk/lib/Headers/emmintrin.h
cfe/trunk/lib/Headers/f16cintrin.h
cfe/trunk/lib/Headers/fxsrintrin.h
cfe/trunk/lib/Headers/immintrin.h
cfe/trunk/lib/Headers/mmintrin.h
cfe/trunk/lib/Headers/pmmintrin.h
cfe/trunk/lib/Headers/popcntintrin.h
cfe/trunk/lib/Headers/xmmintrin.h
Modified: cfe/trunk/lib/Headers/__wmmintrin_aes.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/__wmmintrin_aes.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/__wmmintrin_aes.h (original)
+++ cfe/trunk/lib/Headers/__wmmintrin_aes.h Fri Dec 9 12:35:50 2016
@@ -35,7 +35,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VAESENC instruction.
+/// This intrinsic corresponds to the <c> VAESENC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@@ -55,7 +55,7 @@ _mm_aesenc_si128(__m128i __V, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VAESENCLAST instruction.
+/// This intrinsic corresponds to the <c> VAESENCLAST </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@@ -75,7 +75,7 @@ _mm_aesenclast_si128(__m128i __V, __m128
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VAESDEC instruction.
+/// This intrinsic corresponds to the <c> VAESDEC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@@ -95,7 +95,7 @@ _mm_aesdec_si128(__m128i __V, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VAESDECLAST instruction.
+/// This intrinsic corresponds to the <c> VAESDECLAST </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the state value.
@@ -114,7 +114,7 @@ _mm_aesdeclast_si128(__m128i __V, __m128
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VAESIMC instruction.
+/// This intrinsic corresponds to the <c> VAESIMC </c> instruction.
///
/// \param __V
/// A 128-bit integer vector containing the expanded key.
@@ -136,7 +136,7 @@ _mm_aesimc_si128(__m128i __V)
/// __m128i _mm_aeskeygenassist_si128(__m128i C, const int R);
/// \endcode
///
-/// This intrinsic corresponds to the \c AESKEYGENASSIST instruction.
+/// This intrinsic corresponds to the <c> AESKEYGENASSIST </c> instruction.
///
/// \param C
/// A 128-bit integer vector that is used to generate the AES encryption key.
Modified: cfe/trunk/lib/Headers/__wmmintrin_pclmul.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/__wmmintrin_pclmul.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/__wmmintrin_pclmul.h (original)
+++ cfe/trunk/lib/Headers/__wmmintrin_pclmul.h Fri Dec 9 12:35:50 2016
@@ -34,7 +34,7 @@
/// __m128i _mm_clmulepi64_si128(__m128i __X, __m128i __Y, const int __I);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPCLMULQDQ instruction.
+/// This intrinsic corresponds to the <c> VPCLMULQDQ </c> instruction.
///
/// \param __X
/// A 128-bit vector of [2 x i64] containing one of the source operands.
Modified: cfe/trunk/lib/Headers/ammintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/ammintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/ammintrin.h (original)
+++ cfe/trunk/lib/Headers/ammintrin.h Fri Dec 9 12:35:50 2016
@@ -38,7 +38,7 @@
/// __m128i _mm_extracti_si64(__m128i x, const int len, const int idx);
/// \endcode
///
-/// This intrinsic corresponds to the \c EXTRQ instruction.
+/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param x
/// The value from which bits are extracted.
@@ -63,7 +63,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c EXTRQ instruction.
+/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param __x
/// The value from which bits are extracted.
@@ -93,7 +93,7 @@ _mm_extract_si64(__m128i __x, __m128i __
/// const int idx);
/// \endcode
///
-/// This intrinsic corresponds to the \c INSERTQ instruction.
+/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param x
/// The destination operand where bits will be inserted. The inserted bits
@@ -126,7 +126,7 @@ _mm_extract_si64(__m128i __x, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c INSERTQ instruction.
+/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param __x
/// The destination operand where bits will be inserted. The inserted bits
@@ -158,7 +158,7 @@ _mm_insert_si64(__m128i __x, __m128i __y
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MOVNTSD instruction.
+/// This intrinsic corresponds to the <c> MOVNTSD </c> instruction.
///
/// \param __p
/// The 64-bit memory location used to store the register value.
@@ -176,7 +176,7 @@ _mm_stream_sd(double *__p, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MOVNTSS instruction.
+/// This intrinsic corresponds to the <c> MOVNTSS </c> instruction.
///
/// \param __p
/// The 32-bit memory location used to store the register value.
Modified: cfe/trunk/lib/Headers/avxintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avxintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avxintrin.h (original)
+++ cfe/trunk/lib/Headers/avxintrin.h Fri Dec 9 12:35:50 2016
@@ -57,7 +57,7 @@ typedef long long __m256i __attribute__(
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDPD instruction.
+/// This intrinsic corresponds to the <c> VADDPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -75,7 +75,7 @@ _mm256_add_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDPS instruction.
+/// This intrinsic corresponds to the <c> VADDPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -93,7 +93,7 @@ _mm256_add_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBPD instruction.
+/// This intrinsic corresponds to the <c> VSUBPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing the minuend.
@@ -111,7 +111,7 @@ _mm256_sub_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBPS instruction.
+/// This intrinsic corresponds to the <c> VSUBPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing the minuend.
@@ -130,7 +130,7 @@ _mm256_sub_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSUBPD instruction.
+/// This intrinsic corresponds to the <c> VADDSUBPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing the left source operand.
@@ -149,7 +149,7 @@ _mm256_addsub_pd(__m256d __a, __m256d __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSUBPS instruction.
+/// This intrinsic corresponds to the <c> VADDSUBPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing the left source operand.
@@ -167,7 +167,7 @@ _mm256_addsub_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVPD instruction.
+/// This intrinsic corresponds to the <c> VDIVPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing the dividend.
@@ -185,7 +185,7 @@ _mm256_div_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVPS instruction.
+/// This intrinsic corresponds to the <c> VDIVPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing the dividend.
@@ -204,7 +204,7 @@ _mm256_div_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXPD instruction.
+/// This intrinsic corresponds to the <c> VMAXPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the operands.
@@ -223,7 +223,7 @@ _mm256_max_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXPS instruction.
+/// This intrinsic corresponds to the <c> VMAXPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the operands.
@@ -242,7 +242,7 @@ _mm256_max_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINPD instruction.
+/// This intrinsic corresponds to the <c> VMINPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the operands.
@@ -261,7 +261,7 @@ _mm256_min_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINPS instruction.
+/// This intrinsic corresponds to the <c> VMINPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the operands.
@@ -279,7 +279,7 @@ _mm256_min_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULPD instruction.
+/// This intrinsic corresponds to the <c> VMULPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the operands.
@@ -297,7 +297,7 @@ _mm256_mul_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULPS instruction.
+/// This intrinsic corresponds to the <c> VMULPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the operands.
@@ -316,7 +316,7 @@ _mm256_mul_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTPD instruction.
+/// This intrinsic corresponds to the <c> VSQRTPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -333,7 +333,7 @@ _mm256_sqrt_pd(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTPS instruction.
+/// This intrinsic corresponds to the <c> VSQRTPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -350,7 +350,7 @@ _mm256_sqrt_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRSQRTPS instruction.
+/// This intrinsic corresponds to the <c> VRSQRTPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -367,7 +367,7 @@ _mm256_rsqrt_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRCPPS instruction.
+/// This intrinsic corresponds to the <c> VRCPPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -389,7 +389,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256d _mm256_round_pd(__m256d V, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPD instruction.
+/// This intrinsic corresponds to the <c> VROUNDPD </c> instruction.
///
/// \param V
/// A 256-bit vector of [4 x double].
@@ -421,7 +421,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256 _mm256_round_ps(__m256 V, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPS instruction.
+/// This intrinsic corresponds to the <c> VROUNDPS </c> instruction.
///
/// \param V
/// A 256-bit vector of [8 x float].
@@ -453,7 +453,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256d _mm256_ceil_pd(__m256d V);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPD instruction.
+/// This intrinsic corresponds to the <c> VROUNDPD </c> instruction.
///
/// \param V
/// A 256-bit vector of [4 x double].
@@ -470,7 +470,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256d _mm256_floor_pd(__m256d V);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPD instruction.
+/// This intrinsic corresponds to the <c> VROUNDPD </c> instruction.
///
/// \param V
/// A 256-bit vector of [4 x double].
@@ -488,7 +488,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256 _mm256_ceil_ps(__m256 V);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPS instruction.
+/// This intrinsic corresponds to the <c> VROUNDPS </c> instruction.
///
/// \param V
/// A 256-bit vector of [8 x float].
@@ -505,7 +505,7 @@ _mm256_rcp_ps(__m256 __a)
/// __m256 _mm256_floor_ps(__m256 V);
/// \endcode
///
-/// This intrinsic corresponds to the \c VROUNDPS instruction.
+/// This intrinsic corresponds to the <c> VROUNDPS </c> instruction.
///
/// \param V
/// A 256-bit vector of [8 x float].
@@ -517,7 +517,7 @@ _mm256_rcp_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDPD instruction.
+/// This intrinsic corresponds to the <c> VANDPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -535,7 +535,7 @@ _mm256_and_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDPS instruction.
+/// This intrinsic corresponds to the <c> VANDPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -554,7 +554,7 @@ _mm256_and_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDNPD instruction.
+/// This intrinsic corresponds to the <c> VANDNPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing the left source operand. The
@@ -575,7 +575,7 @@ _mm256_andnot_pd(__m256d __a, __m256d __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDNPS instruction.
+/// This intrinsic corresponds to the <c> VANDNPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing the left source operand. The
@@ -595,7 +595,7 @@ _mm256_andnot_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VORPD instruction.
+/// This intrinsic corresponds to the <c> VORPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -613,7 +613,7 @@ _mm256_or_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VORPS instruction.
+/// This intrinsic corresponds to the <c> VORPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -631,7 +631,7 @@ _mm256_or_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPD instruction.
+/// This intrinsic corresponds to the <c> VXORPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -649,7 +649,7 @@ _mm256_xor_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -669,7 +669,7 @@ _mm256_xor_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHADDPD instruction.
+/// This intrinsic corresponds to the <c> VHADDPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -692,7 +692,7 @@ _mm256_hadd_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHADDPS instruction.
+/// This intrinsic corresponds to the <c> VHADDPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -715,7 +715,7 @@ _mm256_hadd_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHSUBPD instruction.
+/// This intrinsic corresponds to the <c> VHSUBPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing one of the source operands.
@@ -738,7 +738,7 @@ _mm256_hsub_pd(__m256d __a, __m256d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHSUBPS instruction.
+/// This intrinsic corresponds to the <c> VHSUBPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing one of the source operands.
@@ -762,7 +762,7 @@ _mm256_hsub_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPD instruction.
+/// This intrinsic corresponds to the <c> VPERMILPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -791,7 +791,7 @@ _mm_permutevar_pd(__m128d __a, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPD instruction.
+/// This intrinsic corresponds to the <c> VPERMILPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -830,7 +830,7 @@ _mm256_permutevar_pd(__m256d __a, __m256
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -902,7 +902,7 @@ _mm_permutevar_ps(__m128 __a, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -997,7 +997,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m128d _mm_permute_pd(__m128d A, const int C);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERMILPD instruction.
+/// This intrinsic corresponds to the <c> VPERMILPD </c> instruction.
///
/// \param A
/// A 128-bit vector of [2 x double].
@@ -1030,7 +1030,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256d _mm256_permute_pd(__m256d A, const int C);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERMILPD instruction.
+/// This intrinsic corresponds to the <c> VPERMILPD </c> instruction.
///
/// \param A
/// A 256-bit vector of [4 x double].
@@ -1074,7 +1074,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m128 _mm_permute_ps(__m128 A, const int C);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS </c> instruction.
///
/// \param A
/// A 128-bit vector of [4 x float].
@@ -1132,7 +1132,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256 _mm256_permute_ps(__m256 A, const int C);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS </c> instruction.
///
/// \param A
/// A 256-bit vector of [8 x float].
@@ -1232,7 +1232,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256d _mm256_permute2f128_pd(__m256d V1, __m256d V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERM2F128 instruction.
+/// This intrinsic corresponds to the <c> VPERM2F128 </c> instruction.
///
/// \param V1
/// A 256-bit vector of [4 x double].
@@ -1273,7 +1273,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256 _mm256_permute2f128_ps(__m256 V1, __m256 V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERM2F128 instruction.
+/// This intrinsic corresponds to the <c> VPERM2F128 </c> instruction.
///
/// \param V1
/// A 256-bit vector of [8 x float].
@@ -1314,7 +1314,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256i _mm256_permute2f128_si256(__m256i V1, __m256i V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPERM2F128 instruction.
+/// This intrinsic corresponds to the <c> VPERM2F128 </c> instruction.
///
/// \param V1
/// A 256-bit integer vector.
@@ -1356,7 +1356,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256d _mm256_blend_pd(__m256d V1, __m256d V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VBLENDPD instruction.
+/// This intrinsic corresponds to the <c> VBLENDPD </c> instruction.
///
/// \param V1
/// A 256-bit vector of [4 x double].
@@ -1388,7 +1388,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
/// __m256 _mm256_blend_ps(__m256 V1, __m256 V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VBLENDPS instruction.
+/// This intrinsic corresponds to the <c> VBLENDPS </c> instruction.
///
/// \param V1
/// A 256-bit vector of [8 x float].
@@ -1420,7 +1420,7 @@ _mm256_permutevar_ps(__m256 __a, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBLENDVPD instruction.
+/// This intrinsic corresponds to the <c> VBLENDVPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -1448,7 +1448,7 @@ _mm256_blendv_pd(__m256d __a, __m256d __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBLENDVPS instruction.
+/// This intrinsic corresponds to the <c> VBLENDVPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -1487,7 +1487,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m256 _mm256_dp_ps(__m256 V1, __m256 V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VDPPS instruction.
+/// This intrinsic corresponds to the <c> VDPPS </c> instruction.
///
/// \param V1
/// A vector of [8 x float] values, treated as two [4 x float] vectors.
@@ -1529,7 +1529,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m256 _mm256_shuffle_ps(__m256 a, __m256 b, const int mask);
/// \endcode
///
-/// This intrinsic corresponds to the \c VSHUFPS instruction.
+/// This intrinsic corresponds to the <c> VSHUFPS </c> instruction.
///
/// \param a
/// A 256-bit vector of [8 x float]. The four selected elements in this
@@ -1587,7 +1587,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m256d _mm256_shuffle_pd(__m256d a, __m256d b, const int mask);
/// \endcode
///
-/// This intrinsic corresponds to the \c VSHUFPD instruction.
+/// This intrinsic corresponds to the <c> VSHUFPD </c> instruction.
///
/// \param a
/// A 256-bit vector of [4 x double].
@@ -1667,7 +1667,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m128d _mm_cmp_pd(__m128d a, __m128d b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPPD instruction.
+/// This intrinsic corresponds to the <c> VCMPPD </c> instruction.
///
/// \param a
/// A 128-bit vector of [2 x double].
@@ -1713,7 +1713,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m128 _mm_cmp_ps(__m128 a, __m128 b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPPS instruction.
+/// This intrinsic corresponds to the <c> VCMPPS </c> instruction.
///
/// \param a
/// A 128-bit vector of [4 x float].
@@ -1749,7 +1749,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m256d _mm256_cmp_pd(__m256d a, __m256d b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPPD instruction.
+/// This intrinsic corresponds to the <c> VCMPPD </c> instruction.
///
/// \param a
/// A 256-bit vector of [4 x double].
@@ -1785,7 +1785,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m256 _mm256_cmp_ps(__m256 a, __m256 b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPPS instruction.
+/// This intrinsic corresponds to the <c> VCMPPS </c> instruction.
///
/// \param a
/// A 256-bit vector of [8 x float].
@@ -1820,7 +1820,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m128d _mm_cmp_sd(__m128d a, __m128d b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPSD instruction.
+/// This intrinsic corresponds to the <c> VCMPSD </c> instruction.
///
/// \param a
/// A 128-bit vector of [2 x double].
@@ -1855,7 +1855,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
/// __m128 _mm_cmp_ss(__m128 a, __m128 b, const int c);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCMPSS instruction.
+/// This intrinsic corresponds to the <c> VCMPSS </c> instruction.
///
/// \param a
/// A 128-bit vector of [4 x float].
@@ -1884,7 +1884,7 @@ _mm256_blendv_ps(__m256 __a, __m256 __b,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x i32].
@@ -1905,7 +1905,7 @@ _mm256_extract_epi32(__m256i __a, const
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A 256-bit integer vector of [16 x i16].
@@ -1926,7 +1926,7 @@ _mm256_extract_epi16(__m256i __a, const
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A 256-bit integer vector of [32 x i8].
@@ -1948,7 +1948,7 @@ _mm256_extract_epi8(__m256i __a, const i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A 256-bit integer vector of [4 x i64].
@@ -1971,7 +1971,7 @@ _mm256_extract_epi64(__m256i __a, const
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A vector of [8 x i32] to be used by the insert operation.
@@ -1997,7 +1997,7 @@ _mm256_insert_epi32(__m256i __a, int __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A vector of [16 x i16] to be used by the insert operation.
@@ -2022,7 +2022,7 @@ _mm256_insert_epi16(__m256i __a, int __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A vector of [32 x i8] to be used by the insert operation.
@@ -2048,7 +2048,7 @@ _mm256_insert_epi8(__m256i __a, int __b,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128+COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128+COMPOSITE </c> instruction.
///
/// \param __a
/// A vector of [4 x i64] to be used by the insert operation.
@@ -2073,7 +2073,7 @@ _mm256_insert_epi64(__m256i __a, long lo
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTDQ2PD instruction.
+/// This intrinsic corresponds to the <c> VCVTDQ2PD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [4 x i32].
@@ -2088,7 +2088,7 @@ _mm256_cvtepi32_pd(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTDQ2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTDQ2PS </c> instruction.
///
/// \param __a
/// A 256-bit integer vector.
@@ -2104,7 +2104,7 @@ _mm256_cvtepi32_ps(__m256i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPD2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTPD2PS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2119,7 +2119,7 @@ _mm256_cvtpd_ps(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPS2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2DQ </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2135,7 +2135,7 @@ _mm256_cvtps_epi32(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPS2PD instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2PD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2152,7 +2152,7 @@ _mm256_cvtps_pd(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTPD2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTTPD2DQ </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2169,7 +2169,7 @@ _mm256_cvttpd_epi32(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPD2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTPD2DQ </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2185,7 +2185,7 @@ _mm256_cvtpd_epi32(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTPS2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTTPS2DQ </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2229,7 +2229,7 @@ _mm256_cvtss_f32(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSHDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVSHDUP </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2254,7 +2254,7 @@ _mm256_movehdup_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSLDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVSLDUP </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2276,7 +2276,7 @@ _mm256_moveldup_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2294,7 +2294,7 @@ _mm256_movedup_pd(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKHPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKHPD </c> instruction.
///
/// \param __a
/// A 256-bit floating-point vector of [4 x double].
@@ -2316,7 +2316,7 @@ _mm256_unpackhi_pd(__m256d __a, __m256d
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD </c> instruction.
///
/// \param __a
/// A 256-bit floating-point vector of [4 x double].
@@ -2339,7 +2339,7 @@ _mm256_unpacklo_pd(__m256d __a, __m256d
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKHPS instruction.
+/// This intrinsic corresponds to the <c> VUNPCKHPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2366,7 +2366,7 @@ _mm256_unpackhi_ps(__m256 __a, __m256 __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPS instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2402,7 +2402,7 @@ _mm256_unpacklo_ps(__m256 __a, __m256 __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -2429,7 +2429,7 @@ _mm_testz_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -2457,7 +2457,7 @@ _mm_testc_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -2484,7 +2484,7 @@ _mm_testnzc_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2511,7 +2511,7 @@ _mm_testz_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2539,7 +2539,7 @@ _mm_testc_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2566,7 +2566,7 @@ _mm_testnzc_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2593,7 +2593,7 @@ _mm256_testz_pd(__m256d __a, __m256d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2621,7 +2621,7 @@ _mm256_testc_pd(__m256d __a, __m256d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPD instruction.
+/// This intrinsic corresponds to the <c> VTESTPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double].
@@ -2648,7 +2648,7 @@ _mm256_testnzc_pd(__m256d __a, __m256d _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2675,7 +2675,7 @@ _mm256_testz_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2703,7 +2703,7 @@ _mm256_testc_ps(__m256 __a, __m256 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VTESTPS instruction.
+/// This intrinsic corresponds to the <c> VTESTPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float].
@@ -2727,7 +2727,7 @@ _mm256_testnzc_ps(__m256 __a, __m256 __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPTEST instruction.
+/// This intrinsic corresponds to the <c> VPTEST </c> instruction.
///
/// \param __a
/// A 256-bit integer vector.
@@ -2751,7 +2751,7 @@ _mm256_testz_si256(__m256i __a, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPTEST instruction.
+/// This intrinsic corresponds to the <c> VPTEST </c> instruction.
///
/// \param __a
/// A 256-bit integer vector.
@@ -2776,7 +2776,7 @@ _mm256_testc_si256(__m256i __a, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPTEST instruction.
+/// This intrinsic corresponds to the <c> VPTEST </c> instruction.
///
/// \param __a
/// A 256-bit integer vector.
@@ -2796,7 +2796,7 @@ _mm256_testnzc_si256(__m256i __a, __m256
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVMSKPD instruction.
+/// This intrinsic corresponds to the <c> VMOVMSKPD </c> instruction.
///
/// \param __a
/// A 256-bit vector of [4 x double] containing the double-precision
@@ -2814,7 +2814,7 @@ _mm256_movemask_pd(__m256d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVMSKPS instruction.
+/// This intrinsic corresponds to the <c> VMOVMSKPS </c> instruction.
///
/// \param __a
/// A 256-bit vector of [8 x float] containing the double-precision floating
@@ -2831,7 +2831,7 @@ _mm256_movemask_ps(__m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VZEROALL instruction.
+/// This intrinsic corresponds to the <c> VZEROALL </c> instruction.
static __inline void __DEFAULT_FN_ATTRS
_mm256_zeroall(void)
{
@@ -2842,7 +2842,7 @@ _mm256_zeroall(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VZEROUPPER instruction.
+/// This intrinsic corresponds to the <c> VZEROUPPER </c> instruction.
static __inline void __DEFAULT_FN_ATTRS
_mm256_zeroupper(void)
{
@@ -2856,7 +2856,7 @@ _mm256_zeroupper(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBROADCASTSS instruction.
+/// This intrinsic corresponds to the <c> VBROADCASTSS </c> instruction.
///
/// \param __a
/// The single-precision floating point value to be broadcast.
@@ -2875,7 +2875,7 @@ _mm_broadcast_ss(float const *__a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBROADCASTSD instruction.
+/// This intrinsic corresponds to the <c> VBROADCASTSD </c> instruction.
///
/// \param __a
/// The double-precision floating point value to be broadcast.
@@ -2894,7 +2894,7 @@ _mm256_broadcast_sd(double const *__a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBROADCASTSS instruction.
+/// This intrinsic corresponds to the <c> VBROADCASTSS </c> instruction.
///
/// \param __a
/// The single-precision floating point value to be broadcast.
@@ -2913,7 +2913,7 @@ _mm256_broadcast_ss(float const *__a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBROADCASTF128 instruction.
+/// This intrinsic corresponds to the <c> VBROADCASTF128 </c> instruction.
///
/// \param __a
/// The 128-bit vector of [2 x double] to be broadcast.
@@ -2931,7 +2931,7 @@ _mm256_broadcast_pd(__m128d const *__a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBROADCASTF128 instruction.
+/// This intrinsic corresponds to the <c> VBROADCASTF128 </c> instruction.
///
/// \param __a
/// The 128-bit vector of [4 x float] to be broadcast.
@@ -2949,7 +2949,7 @@ _mm256_broadcast_ps(__m128 const *__a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPD instruction.
+/// This intrinsic corresponds to the <c> VMOVAPD </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a memory location containing
@@ -2966,7 +2966,7 @@ _mm256_load_pd(double const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS instruction.
+/// This intrinsic corresponds to the <c> VMOVAPS </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a memory location containing float values.
@@ -2982,7 +2982,7 @@ _mm256_load_ps(float const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPD instruction.
+/// This intrinsic corresponds to the <c> VMOVUPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location containing double-precision floating
@@ -3002,7 +3002,7 @@ _mm256_loadu_pd(double const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPS instruction.
+/// This intrinsic corresponds to the <c> VMOVUPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location containing single-precision floating
@@ -3022,7 +3022,7 @@ _mm256_loadu_ps(float const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQA instruction.
+/// This intrinsic corresponds to the <c> VMOVDQA </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a 256-bit integer vector containing integer
@@ -3039,7 +3039,7 @@ _mm256_load_si256(__m256i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQU instruction.
+/// This intrinsic corresponds to the <c> VMOVDQU </c> instruction.
///
/// \param __p
/// A pointer to a 256-bit integer vector containing integer values.
@@ -3060,7 +3060,7 @@ _mm256_loadu_si256(__m256i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VLDDQU instruction.
+/// This intrinsic corresponds to the <c> VLDDQU </c> instruction.
///
/// \param __p
/// A pointer to a 256-bit integer vector containing integer values.
@@ -3078,7 +3078,7 @@ _mm256_lddqu_si256(__m256i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPD instruction.
+/// This intrinsic corresponds to the <c> VMOVAPD </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a memory location that will receive the
@@ -3096,7 +3096,7 @@ _mm256_store_pd(double *__p, __m256d __a
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS instruction.
+/// This intrinsic corresponds to the <c> VMOVAPS </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a memory location that will receive the
@@ -3114,7 +3114,7 @@ _mm256_store_ps(float *__p, __m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPD instruction.
+/// This intrinsic corresponds to the <c> VMOVUPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the double-precision
@@ -3135,7 +3135,7 @@ _mm256_storeu_pd(double *__p, __m256d __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPS instruction.
+/// This intrinsic corresponds to the <c> VMOVUPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -3155,7 +3155,7 @@ _mm256_storeu_ps(float *__p, __m256 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQA instruction.
+/// This intrinsic corresponds to the <c> VMOVDQA </c> instruction.
///
/// \param __p
/// A 32-byte aligned pointer to a memory location that will receive the
@@ -3173,7 +3173,7 @@ _mm256_store_si256(__m256i *__p, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQU instruction.
+/// This intrinsic corresponds to the <c> VMOVDQU </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the integer values.
@@ -3196,7 +3196,7 @@ _mm256_storeu_si256(__m256i *__p, __m256
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPD instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location that contains the double-precision
@@ -3220,7 +3220,7 @@ _mm_maskload_pd(double const *__p, __m12
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPD instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location that contains the double-precision
@@ -3245,7 +3245,7 @@ _mm256_maskload_pd(double const *__p, __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPS instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that contains the single-precision
@@ -3269,7 +3269,7 @@ _mm_maskload_ps(float const *__p, __m128
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPS instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that contains the single-precision
@@ -3293,7 +3293,7 @@ _mm256_maskload_ps(float const *__p, __m
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPS instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -3317,7 +3317,7 @@ _mm256_maskstore_ps(float *__p, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPD instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -3341,7 +3341,7 @@ _mm_maskstore_pd(double *__p, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPD instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPD </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -3365,7 +3365,7 @@ _mm256_maskstore_pd(double *__p, __m256i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVPS instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -3390,7 +3390,7 @@ _mm_maskstore_ps(float *__p, __m128i __m
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTDQ instruction.
+/// This intrinsic corresponds to the <c> VMOVNTDQ </c> instruction.
///
/// \param __a
/// A pointer to a 32-byte aligned memory location that will receive the
@@ -3409,7 +3409,7 @@ _mm256_stream_si256(__m256i *__a, __m256
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTPD instruction.
+/// This intrinsic corresponds to the <c> VMOVNTPD </c> instruction.
///
/// \param __a
/// A pointer to a 32-byte aligned memory location that will receive the
@@ -3429,7 +3429,7 @@ _mm256_stream_pd(double *__a, __m256d __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTPS instruction.
+/// This intrinsic corresponds to the <c> VMOVNTPS </c> instruction.
///
/// \param __p
/// A pointer to a 32-byte aligned memory location that will receive the
@@ -3487,7 +3487,7 @@ _mm256_undefined_si256(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD+VINSERTF128 </c> instruction.
///
/// \param __a
/// A double-precision floating-point value used to initialize bits [255:192]
@@ -3727,7 +3727,7 @@ _mm256_set_epi8(char __b31, char __b30,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLQDQ+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLQDQ+VINSERTF128 </c> instruction.
///
/// \param __a
/// A 64-bit integral value used to initialize bits [255:192] of the result.
@@ -3751,7 +3751,7 @@ _mm256_set_epi64x(long long __a, long lo
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD+VINSERTF128 </c> instruction.
///
/// \param __a
/// A double-precision floating-point value used to initialize bits [63:0]
@@ -3991,7 +3991,7 @@ _mm256_setr_epi8(char __b31, char __b30,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLQDQ+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLQDQ+VINSERTF128 </c> instruction.
///
/// \param __a
/// A 64-bit integral value used to initialize bits [63:0] of the result.
@@ -4015,7 +4015,7 @@ _mm256_setr_epi64x(long long __a, long l
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP+VINSERTF128 </c> instruction.
///
/// \param __w
/// A double-precision floating-point value used to initialize each vector
@@ -4033,7 +4033,7 @@ _mm256_set1_pd(double __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS+VINSERTF128 </c> instruction.
///
/// \param __w
/// A single-precision floating-point value used to initialize each vector
@@ -4051,7 +4051,7 @@ _mm256_set1_ps(float __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS+VINSERTF128 </c> instruction.
///
/// \param __i
/// A 32-bit integral value used to initialize each vector element of the
@@ -4069,7 +4069,7 @@ _mm256_set1_epi32(int __i)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSHUFB+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPSHUFB+VINSERTF128 </c> instruction.
///
/// \param __w
/// A 16-bit integral value used to initialize each vector element of the
@@ -4087,7 +4087,7 @@ _mm256_set1_epi16(short __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSHUFB+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VPSHUFB+VINSERTF128 </c> instruction.
///
/// \param __b
/// An 8-bit integral value used to initialize each vector element of the
@@ -4107,7 +4107,7 @@ _mm256_set1_epi8(char __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP+VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP+VINSERTF128 </c> instruction.
///
/// \param __q
/// A 64-bit integral value used to initialize each vector element of the
@@ -4125,7 +4125,7 @@ _mm256_set1_epi64x(long long __q)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS </c> instruction.
///
/// \returns A 256-bit vector of [4 x double] with all elements set to zero.
static __inline __m256d __DEFAULT_FN_ATTRS
@@ -4139,7 +4139,7 @@ _mm256_setzero_pd(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS </c> instruction.
///
/// \returns A 256-bit vector of [8 x float] with all elements set to zero.
static __inline __m256 __DEFAULT_FN_ATTRS
@@ -4152,7 +4152,7 @@ _mm256_setzero_ps(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS </c> instruction.
///
/// \returns A 256-bit integer vector initialized to zero.
static __inline __m256i __DEFAULT_FN_ATTRS
@@ -4389,7 +4389,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m256 _mm256_insertf128_ps(__m256 V1, __m128 V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param V1
/// A 256-bit vector of [8 x float]. This vector is copied to the result
@@ -4433,7 +4433,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m256d _mm256_insertf128_pd(__m256d V1, __m128d V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param V1
/// A 256-bit vector of [4 x double]. This vector is copied to the result
@@ -4473,7 +4473,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m256i _mm256_insertf128_si256(__m256i V1, __m128i V2, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param V1
/// A 256-bit integer vector. This vector is copied to the result first, and
@@ -4516,7 +4516,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m128 _mm256_extractf128_ps(__m256 V, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction.
///
/// \param V
/// A 256-bit vector of [8 x float].
@@ -4545,7 +4545,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m128d _mm256_extractf128_pd(__m256d V, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction.
///
/// \param V
/// A 256-bit vector of [4 x double].
@@ -4572,7 +4572,7 @@ _mm256_castsi128_si256(__m128i __a)
/// __m128i _mm256_extractf128_si256(__m256i V, const int M);
/// \endcode
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction.
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction.
///
/// \param V
/// A 256-bit integer vector.
@@ -4597,7 +4597,7 @@ _mm256_castsi128_si256(__m128i __a)
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to load instructions followed by the
-/// \c VINSERTF128 instruction.
+/// <c> VINSERTF128 </c> instruction.
///
/// \param __addr_hi
/// A pointer to a 128-bit memory location containing 4 consecutive
@@ -4625,7 +4625,7 @@ _mm256_loadu2_m128(float const *__addr_h
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to load instructions followed by the
-/// \c VINSERTF128 instruction.
+/// <c> VINSERTF128 </c> instruction.
///
/// \param __addr_hi
/// A pointer to a 128-bit memory location containing two consecutive
@@ -4653,7 +4653,7 @@ _mm256_loadu2_m128d(double const *__addr
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to load instructions followed by the
-/// \c VINSERTF128 instruction.
+/// <c> VINSERTF128 </c> instruction.
///
/// \param __addr_hi
/// A pointer to a 128-bit memory location containing a 128-bit integer
@@ -4677,7 +4677,7 @@ _mm256_loadu2_m128i(__m128i const *__add
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction and the store
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction and the store
/// instructions.
///
/// \param __addr_hi
@@ -4706,7 +4706,7 @@ _mm256_storeu2_m128(float *__addr_hi, fl
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction and the store
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction and the store
/// instructions.
///
/// \param __addr_hi
@@ -4735,7 +4735,7 @@ _mm256_storeu2_m128d(double *__addr_hi,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VEXTRACTF128 instruction and the store
+/// This intrinsic corresponds to the <c> VEXTRACTF128 </c> instruction and the store
/// instructions.
///
/// \param __addr_hi
@@ -4764,7 +4764,7 @@ _mm256_storeu2_m128i(__m128i *__addr_hi,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __hi
/// A 128-bit floating-point vector of [4 x float] to be copied to the upper
@@ -4785,7 +4785,7 @@ _mm256_set_m128 (__m128 __hi, __m128 __l
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __hi
/// A 128-bit floating-point vector of [2 x double] to be copied to the upper
@@ -4806,7 +4806,7 @@ _mm256_set_m128d (__m128d __hi, __m128d
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __hi
/// A 128-bit integer vector to be copied to the upper 128 bits of the
@@ -4828,7 +4828,7 @@ _mm256_set_m128i (__m128i __hi, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __lo
/// A 128-bit floating-point vector of [4 x float] to be copied to the lower
@@ -4851,7 +4851,7 @@ _mm256_setr_m128 (__m128 __lo, __m128 __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __lo
/// A 128-bit floating-point vector of [2 x double] to be copied to the lower
@@ -4873,7 +4873,7 @@ _mm256_setr_m128d (__m128d __lo, __m128d
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VINSERTF128 instruction.
+/// This intrinsic corresponds to the <c> VINSERTF128 </c> instruction.
///
/// \param __lo
/// A 128-bit integer vector to be copied to the lower 128 bits of the
Modified: cfe/trunk/lib/Headers/bmiintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/bmiintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/bmiintrin.h (original)
+++ cfe/trunk/lib/Headers/bmiintrin.h Fri Dec 9 12:35:50 2016
@@ -36,7 +36,7 @@
/// unsigned short _tzcnt_u16(unsigned short a);
/// \endcode
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 16-bit integer whose trailing zeros are to be counted.
@@ -53,7 +53,7 @@
/// unsigned int _andn_u32(unsigned int a, unsigned int b);
/// \endcode
///
-/// This intrinsic corresponds to the \c ANDN instruction.
+/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param a
/// An unsigned integer containing one of the operands.
@@ -73,7 +73,7 @@
/// unsigned int _blsi_u32(unsigned int a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSI instruction.
+/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param a
/// An unsigned integer whose bits are to be cleared.
@@ -91,7 +91,7 @@
/// unsigned int _blsmsk_u32(unsigned int a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSMSK instruction.
+/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param a
/// An unsigned integer used to create the mask.
@@ -107,7 +107,7 @@
/// unsigned int _blsr_u32(unsigned int a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSR instruction.
+/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param a
/// An unsigned integer containing the operand to be cleared.
@@ -123,7 +123,7 @@
/// unsigned int _tzcnt_u32(unsigned int a);
/// \endcode
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@@ -143,7 +143,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 16-bit integer whose trailing zeros are to be counted.
@@ -160,7 +160,7 @@ __tzcnt_u16(unsigned short __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c ANDN instruction.
+/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param __X
/// An unsigned integer containing one of the operands.
@@ -180,7 +180,7 @@ __andn_u32(unsigned int __X, unsigned in
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BEXTR instruction.
+/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be extracted.
@@ -202,7 +202,7 @@ __bextr_u32(unsigned int __X, unsigned i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BEXTR instruction.
+/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be extracted.
@@ -225,7 +225,7 @@ _bextr_u32(unsigned int __X, unsigned in
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSI instruction.
+/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param __X
/// An unsigned integer whose bits are to be cleared.
@@ -243,7 +243,7 @@ __blsi_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSMSK instruction.
+/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param __X
/// An unsigned integer used to create the mask.
@@ -259,7 +259,7 @@ __blsmsk_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSR instruction.
+/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param __X
/// An unsigned integer containing the operand to be cleared.
@@ -275,7 +275,7 @@ __blsr_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@@ -291,7 +291,7 @@ __tzcnt_u32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 32-bit integer whose trailing zeros are to be counted.
@@ -314,7 +314,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _andn_u64 (unsigned long long a, unsigned long long b);
/// \endcode
///
-/// This intrinsic corresponds to the \c ANDN instruction.
+/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer containing one of the operands.
@@ -334,7 +334,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsi_u64(unsigned long long a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSI instruction.
+/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer whose bits are to be cleared.
@@ -352,7 +352,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsmsk_u64(unsigned long long a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSMSK instruction.
+/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer used to create the mask.
@@ -368,7 +368,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _blsr_u64(unsigned long long a);
/// \endcode
///
-/// This intrinsic corresponds to the \c BLSR instruction.
+/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer containing the operand to be cleared.
@@ -384,7 +384,7 @@ _mm_tzcnt_32(unsigned int __X)
/// unsigned long long _tzcnt_u64(unsigned long long a);
/// \endcode
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param a
/// An unsigned 64-bit integer whose trailing zeros are to be counted.
@@ -397,7 +397,7 @@ _mm_tzcnt_32(unsigned int __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c ANDN instruction.
+/// This intrinsic corresponds to the <c> ANDN </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer containing one of the operands.
@@ -417,7 +417,7 @@ __andn_u64 (unsigned long long __X, unsi
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BEXTR instruction.
+/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be extracted.
@@ -439,7 +439,7 @@ __bextr_u64(unsigned long long __X, unsi
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BEXTR instruction.
+/// This intrinsic corresponds to the <c> BEXTR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be extracted.
@@ -462,7 +462,7 @@ _bextr_u64(unsigned long long __X, unsig
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSI instruction.
+/// This intrinsic corresponds to the <c> BLSI </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose bits are to be cleared.
@@ -480,7 +480,7 @@ __blsi_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSMSK instruction.
+/// This intrinsic corresponds to the <c> BLSMSK </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer used to create the mask.
@@ -496,7 +496,7 @@ __blsmsk_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c BLSR instruction.
+/// This intrinsic corresponds to the <c> BLSR </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer containing the operand to be cleared.
@@ -512,7 +512,7 @@ __blsr_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose trailing zeros are to be counted.
@@ -528,7 +528,7 @@ __tzcnt_u64(unsigned long long __X)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c TZCNT instruction.
+/// This intrinsic corresponds to the <c> TZCNT </c> instruction.
///
/// \param __X
/// An unsigned 64-bit integer whose trailing zeros are to be counted.
Modified: cfe/trunk/lib/Headers/emmintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/emmintrin.h (original)
+++ cfe/trunk/lib/Headers/emmintrin.h Fri Dec 9 12:35:50 2016
@@ -55,7 +55,7 @@ typedef signed char __v16qs __attribute_
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSD / ADDSD instruction.
+/// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -75,7 +75,7 @@ _mm_add_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDPD / ADDPD instruction.
+/// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -97,7 +97,7 @@ _mm_add_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBSD / SUBSD instruction.
+/// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the minuend.
@@ -117,7 +117,7 @@ _mm_sub_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBPD / SUBPD instruction.
+/// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the minuend.
@@ -138,7 +138,7 @@ _mm_sub_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULSD / MULSD instruction.
+/// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -158,7 +158,7 @@ _mm_mul_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULPD / MULPD instruction.
+/// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands.
@@ -180,7 +180,7 @@ _mm_mul_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVSD / DIVSD instruction.
+/// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the dividend.
@@ -201,7 +201,7 @@ _mm_div_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVPD / DIVPD instruction.
+/// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the dividend.
@@ -222,7 +222,7 @@ _mm_div_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTSD / SQRTSD instruction.
+/// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands. The
@@ -246,7 +246,7 @@ _mm_sqrt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTPD / SQRTPD instruction.
+/// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -265,7 +265,7 @@ _mm_sqrt_pd(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINSD / MINSD instruction.
+/// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands. The
@@ -288,7 +288,7 @@ _mm_min_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINPD / MINPD instruction.
+/// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands.
@@ -309,7 +309,7 @@ _mm_min_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXSD / MAXSD instruction.
+/// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands. The
@@ -332,7 +332,7 @@ _mm_max_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXPD / MAXPD instruction.
+/// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the operands.
@@ -350,7 +350,7 @@ _mm_max_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPAND / PAND instruction.
+/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -369,7 +369,7 @@ _mm_and_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPANDN / PANDN instruction.
+/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the left source operand. The
@@ -389,7 +389,7 @@ _mm_andnot_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPOR / POR instruction.
+/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -407,7 +407,7 @@ _mm_or_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPXOR / PXOR instruction.
+/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -427,7 +427,7 @@ _mm_xor_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPEQPD / CMPEQPD instruction.
+/// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -447,7 +447,7 @@ _mm_cmpeq_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTPD / CMPLTPD instruction.
+/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -467,7 +467,7 @@ _mm_cmplt_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLEPD / CMPLEPD instruction.
+/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -487,7 +487,7 @@ _mm_cmple_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTPD / CMPLTPD instruction.
+/// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -507,7 +507,7 @@ _mm_cmpgt_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLEPD / CMPLEPD instruction.
+/// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -529,7 +529,7 @@ _mm_cmpge_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPORDPD / CMPORDPD instruction.
+/// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -551,7 +551,7 @@ _mm_cmpord_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPUNORDPD / CMPUNORDPD instruction.
+/// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -571,7 +571,7 @@ _mm_cmpunord_pd(__m128d __a, __m128d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNEQPD / CMPNEQPD instruction.
+/// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -591,7 +591,7 @@ _mm_cmpneq_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTPD / CMPNLTPD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -611,7 +611,7 @@ _mm_cmpnlt_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLEPD / CMPNLEPD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -631,7 +631,7 @@ _mm_cmpnle_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTPD / CMPNLTPD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -651,7 +651,7 @@ _mm_cmpngt_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLEPD / CMPNLEPD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -670,7 +670,7 @@ _mm_cmpnge_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPEQSD / CMPEQSD instruction.
+/// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -694,7 +694,7 @@ _mm_cmpeq_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTSD / CMPLTSD instruction.
+/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -718,7 +718,7 @@ _mm_cmplt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLESD / CMPLESD instruction.
+/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -742,7 +742,7 @@ _mm_cmple_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTSD / CMPLTSD instruction.
+/// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -767,7 +767,7 @@ _mm_cmpgt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLESD / CMPLESD instruction.
+/// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -793,7 +793,7 @@ _mm_cmpge_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPORDSD / CMPORDSD instruction.
+/// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -818,7 +818,7 @@ _mm_cmpord_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPUNORDSD / CMPUNORDSD instruction.
+/// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -842,7 +842,7 @@ _mm_cmpunord_sd(__m128d __a, __m128d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNEQSD / CMPNEQSD instruction.
+/// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -866,7 +866,7 @@ _mm_cmpneq_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTSD / CMPNLTSD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -890,7 +890,7 @@ _mm_cmpnlt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLESD / CMPNLESD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -914,7 +914,7 @@ _mm_cmpnle_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTSD / CMPNLTSD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -939,7 +939,7 @@ _mm_cmpngt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLESD / CMPNLESD instruction.
+/// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -962,7 +962,7 @@ _mm_cmpnge_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -984,7 +984,7 @@ _mm_comieq_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1007,7 +1007,7 @@ _mm_comilt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1029,7 +1029,7 @@ _mm_comile_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1052,7 +1052,7 @@ _mm_comigt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1074,7 +1074,7 @@ _mm_comige_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISD / COMISD instruction.
+/// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1096,7 +1096,7 @@ _mm_comineq_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1120,7 +1120,7 @@ _mm_ucomieq_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1145,7 +1145,7 @@ _mm_ucomilt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1169,7 +1169,7 @@ _mm_ucomile_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1194,7 +1194,7 @@ _mm_ucomigt_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1218,7 +1218,7 @@ _mm_ucomige_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISD / UCOMISD instruction.
+/// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower double-precision value is
@@ -1241,7 +1241,7 @@ _mm_ucomineq_sd(__m128d __a, __m128d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPD2PS / CVTPD2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1260,7 +1260,7 @@ _mm_cvtpd_ps(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPS2PD / CVTPS2PD instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower two single-precision
@@ -1281,7 +1281,7 @@ _mm_cvtps_pd(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTDQ2PD / CVTDQ2PD instruction.
+/// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
@@ -1301,7 +1301,7 @@ _mm_cvtepi32_pd(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPD2DQ / CVTPD2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1318,7 +1318,7 @@ _mm_cvtpd_epi32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSD2SI / CVTSD2SI instruction.
+/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
@@ -1338,7 +1338,7 @@ _mm_cvtsd_si32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSD2SS / CVTSD2SS instruction.
+/// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
@@ -1362,7 +1362,7 @@ _mm_cvtsd_ss(__m128 __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSI2SD / CVTSI2SD instruction.
+/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
@@ -1387,7 +1387,7 @@ _mm_cvtsi32_sd(__m128d __a, int __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSS2SD / CVTSS2SD instruction.
+/// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
@@ -1414,7 +1414,7 @@ _mm_cvtss_sd(__m128d __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTPD2DQ / CVTTPD2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1431,7 +1431,7 @@ _mm_cvttpd_epi32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTSD2SI / CVTTSD2SI instruction.
+/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
@@ -1449,7 +1449,7 @@ _mm_cvttsd_si32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPD2PI instruction.
+/// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1468,7 +1468,7 @@ _mm_cvtpd_pi32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTTPD2PI instruction.
+/// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1485,7 +1485,7 @@ _mm_cvttpd_pi32(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PD instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
///
/// \param __a
/// A 64-bit vector of [2 x i32].
@@ -1518,7 +1518,7 @@ _mm_cvtsd_f64(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPD / MOVAPD instruction.
+/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
///
/// \param __dp
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1536,7 +1536,7 @@ _mm_load_pd(double const *__dp)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP / MOVDDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
///
/// \param __dp
/// A pointer to a memory location containing a double-precision value.
@@ -1559,7 +1559,7 @@ _mm_load1_pd(double const *__dp)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPD / MOVAPD instruction + needed
+/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction + needed
/// shuffling instructions. In AVX mode, the shuffling may be combined with the
/// \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
///
@@ -1580,7 +1580,7 @@ _mm_loadr_pd(double const *__dp)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPD / MOVUPD instruction.
+/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
///
/// \param __dp
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1621,7 +1621,7 @@ _mm_load_sd(double const *__dp)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVHPD / MOVHPD instruction.
+/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1648,7 +1648,7 @@ _mm_loadh_pd(__m128d __a, double const *
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVLPD / MOVLPD instruction.
+/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -1692,7 +1692,7 @@ _mm_undefined_pd(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
///
/// \param __w
/// A double-precision floating-point value used to initialize the lower 64
@@ -1712,7 +1712,7 @@ _mm_set_sd(double __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP / MOVLHPS instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
///
/// \param __w
/// A double-precision floating-point value used to initialize each vector
@@ -1729,7 +1729,7 @@ _mm_set1_pd(double __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD / UNPCKLPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
///
/// \param __w
/// A double-precision floating-point value used to initialize the upper 64
@@ -1750,7 +1750,7 @@ _mm_set_pd(double __w, double __x)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD / UNPCKLPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
///
/// \param __w
/// A double-precision floating-point value used to initialize the lower 64
@@ -1770,7 +1770,7 @@ _mm_setr_pd(double __w, double __x)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS / XORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
///
/// \returns An initialized 128-bit floating-point vector of [2 x double] with
/// all elements set to zero.
@@ -1786,7 +1786,7 @@ _mm_setzero_pd(void)
//
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VBLENDPD / BLENDPD instruction.
+/// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
@@ -1806,7 +1806,7 @@ _mm_move_sd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSD / MOVSD instruction.
+/// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
///
/// \param __dp
/// A pointer to a 64-bit memory location.
@@ -1839,7 +1839,7 @@ _mm_store1_pd(double *__dp, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPD / MOVAPD instruction.
+/// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
///
/// \param __dp
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1857,7 +1857,7 @@ _mm_store_pd1(double *__dp, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPD / MOVUPD instruction.
+/// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
///
/// \param __dp
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1879,7 +1879,7 @@ _mm_storeu_pd(double *__dp, __m128d __a)
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to a shuffling instruction followed by a
-/// \c VMOVAPD / MOVAPD instruction.
+/// <c> VMOVAPD / MOVAPD </c> instruction.
///
/// \param __dp
/// A pointer to a 16-byte aligned memory location that can store two
@@ -1899,7 +1899,7 @@ _mm_storer_pd(double *__dp, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVHPD / MOVHPD instruction.
+/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
///
/// \param __dp
/// A pointer to a 64-bit memory location.
@@ -1919,7 +1919,7 @@ _mm_storeh_pd(double *__dp, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVLPD / MOVLPD instruction.
+/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
///
/// \param __dp
/// A pointer to a 64-bit memory location.
@@ -1941,7 +1941,7 @@ _mm_storel_pd(double *__dp, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDB / PADDB instruction.
+/// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
///
/// \param __a
/// A 128-bit vector of [16 x i8].
@@ -1962,7 +1962,7 @@ _mm_add_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDW / PADDW instruction.
+/// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
///
/// \param __a
/// A 128-bit vector of [8 x i16].
@@ -1983,7 +1983,7 @@ _mm_add_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDD / PADDD instruction.
+/// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x i32].
@@ -2002,7 +2002,7 @@ _mm_add_epi32(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDQ instruction.
+/// This intrinsic corresponds to the <c> PADDQ </c> instruction.
///
/// \param __a
/// A 64-bit integer.
@@ -2022,7 +2022,7 @@ _mm_add_si64(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDQ / PADDQ instruction.
+/// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x i64].
@@ -2043,7 +2043,7 @@ _mm_add_epi64(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDSB / PADDSB instruction.
+/// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
///
/// \param __a
/// A 128-bit signed [16 x i8] vector.
@@ -2065,7 +2065,7 @@ _mm_adds_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDSW / PADDSW instruction.
+/// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2086,7 +2086,7 @@ _mm_adds_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDUSB / PADDUSB instruction.
+/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [16 x i8] vector.
@@ -2107,7 +2107,7 @@ _mm_adds_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPADDUSB / PADDUSB instruction.
+/// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [8 x i16] vector.
@@ -2127,7 +2127,7 @@ _mm_adds_epu16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPAVGB / PAVGB instruction.
+/// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [16 x i8] vector.
@@ -2147,7 +2147,7 @@ _mm_avg_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPAVGW / PAVGW instruction.
+/// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [8 x i16] vector.
@@ -2171,7 +2171,7 @@ _mm_avg_epu16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMADDWD / PMADDWD instruction.
+/// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2191,7 +2191,7 @@ _mm_madd_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMAXSW / PMAXSW instruction.
+/// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2211,7 +2211,7 @@ _mm_max_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMAXUB / PMAXUB instruction.
+/// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [16 x i8] vector.
@@ -2231,7 +2231,7 @@ _mm_max_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMINSW / PMINSW instruction.
+/// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2251,7 +2251,7 @@ _mm_min_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMINUB / PMINUB instruction.
+/// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [16 x i8] vector.
@@ -2271,7 +2271,7 @@ _mm_min_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMULHW / PMULHW instruction.
+/// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2291,7 +2291,7 @@ _mm_mulhi_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMULHUW / PMULHUW instruction.
+/// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
///
/// \param __a
/// A 128-bit unsigned [8 x i16] vector.
@@ -2311,7 +2311,7 @@ _mm_mulhi_epu16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMULLW / PMULLW instruction.
+/// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
///
/// \param __a
/// A 128-bit signed [8 x i16] vector.
@@ -2331,7 +2331,7 @@ _mm_mullo_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMULUDQ instruction.
+/// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
///
/// \param __a
/// A 64-bit integer containing one of the source operands.
@@ -2350,7 +2350,7 @@ _mm_mul_su32(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMULUDQ / PMULUDQ instruction.
+/// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
///
/// \param __a
/// A [2 x i64] vector containing one of the source operands.
@@ -2371,7 +2371,7 @@ _mm_mul_epu32(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSADBW / PSADBW instruction.
+/// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing one of the source operands.
@@ -2389,7 +2389,7 @@ _mm_sad_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBB / PSUBB instruction.
+/// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2407,7 +2407,7 @@ _mm_sub_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBW / PSUBW instruction.
+/// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2425,7 +2425,7 @@ _mm_sub_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBD / PSUBD instruction.
+/// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2444,7 +2444,7 @@ _mm_sub_epi32(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBQ instruction.
+/// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing the minuend.
@@ -2462,7 +2462,7 @@ _mm_sub_si64(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBQ / PSUBQ instruction.
+/// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2483,7 +2483,7 @@ _mm_sub_epi64(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBSB / PSUBSB instruction.
+/// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2504,7 +2504,7 @@ _mm_subs_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBSW / PSUBSW instruction.
+/// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2524,7 +2524,7 @@ _mm_subs_epi16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBUSB / PSUBUSB instruction.
+/// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2544,7 +2544,7 @@ _mm_subs_epu8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSUBUSW / PSUBUSW instruction.
+/// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the minuends.
@@ -2562,7 +2562,7 @@ _mm_subs_epu16(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPAND / PAND instruction.
+/// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing one of the source operands.
@@ -2581,7 +2581,7 @@ _mm_and_si128(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPANDN / PANDN instruction.
+/// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
///
/// \param __a
/// A 128-bit vector containing the left source operand. The one's complement
@@ -2599,7 +2599,7 @@ _mm_andnot_si128(__m128i __a, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPOR / POR instruction.
+/// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing one of the source operands.
@@ -2617,7 +2617,7 @@ _mm_or_si128(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPXOR / PXOR instruction.
+/// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing one of the source operands.
@@ -2640,7 +2640,7 @@ _mm_xor_si128(__m128i __a, __m128i __b)
/// __m128i _mm_slli_si128(__m128i a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPSLLDQ / PSLLDQ instruction.
+/// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
///
/// \param a
/// A 128-bit integer vector containing the source operand.
@@ -2677,7 +2677,7 @@ _mm_xor_si128(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLW / PSLLW instruction.
+/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2696,7 +2696,7 @@ _mm_slli_epi16(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLW / PSLLW instruction.
+/// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2715,7 +2715,7 @@ _mm_sll_epi16(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLD / PSLLD instruction.
+/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2734,7 +2734,7 @@ _mm_slli_epi32(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLD / PSLLD instruction.
+/// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2753,7 +2753,7 @@ _mm_sll_epi32(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLQ / PSLLQ instruction.
+/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2772,7 +2772,7 @@ _mm_slli_epi64(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSLLQ / PSLLQ instruction.
+/// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2792,7 +2792,7 @@ _mm_sll_epi64(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRAW / PSRAW instruction.
+/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2812,7 +2812,7 @@ _mm_srai_epi16(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRAW / PSRAW instruction.
+/// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2832,7 +2832,7 @@ _mm_sra_epi16(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRAD / PSRAD instruction.
+/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2852,7 +2852,7 @@ _mm_srai_epi32(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRAD / PSRAD instruction.
+/// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2875,7 +2875,7 @@ _mm_sra_epi32(__m128i __a, __m128i __cou
/// __m128i _mm_srli_si128(__m128i a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPSRLDQ / PSRLDQ instruction.
+/// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
///
/// \param a
/// A 128-bit integer vector containing the source operand.
@@ -2912,7 +2912,7 @@ _mm_sra_epi32(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLW / PSRLW instruction.
+/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2931,7 +2931,7 @@ _mm_srli_epi16(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLW / PSRLW instruction.
+/// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2950,7 +2950,7 @@ _mm_srl_epi16(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLD / PSRLD instruction.
+/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2969,7 +2969,7 @@ _mm_srli_epi32(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLD / PSRLD instruction.
+/// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -2988,7 +2988,7 @@ _mm_srl_epi32(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLQ / PSRLQ instruction.
+/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -3007,7 +3007,7 @@ _mm_srli_epi64(__m128i __a, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSRLQ / PSRLQ instruction.
+/// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the source operand.
@@ -3027,7 +3027,7 @@ _mm_srl_epi64(__m128i __a, __m128i __cou
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPEQB / PCMPEQB instruction.
+/// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3046,7 +3046,7 @@ _mm_cmpeq_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPEQW / PCMPEQW instruction.
+/// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3065,7 +3065,7 @@ _mm_cmpeq_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPEQD / PCMPEQD instruction.
+/// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3085,7 +3085,7 @@ _mm_cmpeq_epi32(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTB / PCMPGTB instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3107,7 +3107,7 @@ _mm_cmpgt_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTW / PCMPGTW instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3127,7 +3127,7 @@ _mm_cmpgt_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTD / PCMPGTD instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3147,7 +3147,7 @@ _mm_cmpgt_epi32(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTB / PCMPGTB instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3167,7 +3167,7 @@ _mm_cmplt_epi8(__m128i __a, __m128i __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTW / PCMPGTW instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3187,7 +3187,7 @@ _mm_cmplt_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPCMPGTD / PCMPGTD instruction.
+/// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3208,7 +3208,7 @@ _mm_cmplt_epi32(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSI2SD / CVTSI2SD instruction.
+/// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
@@ -3230,7 +3230,7 @@ _mm_cvtsi64_sd(__m128d __a, long long __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSD2SI / CVTSD2SI instruction.
+/// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
@@ -3247,7 +3247,7 @@ _mm_cvtsd_si64(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTSD2SI / CVTTSD2SI instruction.
+/// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
@@ -3264,7 +3264,7 @@ _mm_cvttsd_si64(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTDQ2PS / CVTDQ2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -3279,7 +3279,7 @@ _mm_cvtepi32_ps(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPS2DQ / CVTPS2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -3296,7 +3296,7 @@ _mm_cvtps_epi32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTPS2DQ / CVTTPS2DQ instruction.
+/// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -3312,7 +3312,7 @@ _mm_cvttps_epi32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __a
/// A 32-bit signed integer operand.
@@ -3329,7 +3329,7 @@ _mm_cvtsi32_si128(int __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
///
/// \param __a
/// A 64-bit signed integer operand containing the value to be converted.
@@ -3346,7 +3346,7 @@ _mm_cvtsi64_si128(long long __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __a
/// A vector of [4 x i32]. The least significant 32 bits are moved to the
@@ -3365,7 +3365,7 @@ _mm_cvtsi128_si32(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
///
/// \param __a
/// A vector of [2 x i64]. The least significant 64 bits are moved to the
@@ -3383,7 +3383,7 @@ _mm_cvtsi128_si64(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQA / MOVDQA instruction.
+/// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
///
/// \param __p
/// An aligned pointer to a memory location containing integer values.
@@ -3399,7 +3399,7 @@ _mm_load_si128(__m128i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDQU / MOVDQU instruction.
+/// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
///
/// \param __p
/// A pointer to a memory location containing integer values.
@@ -3418,7 +3418,7 @@ _mm_loadu_si128(__m128i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
///
/// \param __p
/// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
@@ -3709,7 +3709,7 @@ _mm_set1_epi8(char __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLQDQ / PUNPCKLQDQ instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c> instruction.
///
/// \param __q0
/// A 64-bit integral value used to initialize the lower 64 bits of the
@@ -3829,7 +3829,7 @@ _mm_setr_epi8(char __b0, char __b1, char
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS / XORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
///
/// \returns An initialized 128-bit integer vector with all elements set to
/// zero.
@@ -3844,7 +3844,7 @@ _mm_setzero_si128(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS / MOVAPS instruction.
+/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
///
/// \param __p
/// A pointer to an aligned memory location that will receive the integer
@@ -3861,7 +3861,7 @@ _mm_store_si128(__m128i *__p, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPS / MOVUPS instruction.
+/// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the integer values.
@@ -3885,7 +3885,7 @@ _mm_storeu_si128(__m128i *__p, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMASKMOVDQU / MASKMOVDQU instruction.
+/// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c> instruction.
///
/// \param __d
/// A 128-bit integer vector containing the values to be moved.
@@ -3906,7 +3906,7 @@ _mm_maskmoveu_si128(__m128i __d, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVLPS / MOVLPS instruction.
+/// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
///
/// \param __p
/// A pointer to a 64-bit memory location that will receive the lower 64 bits
@@ -3929,7 +3929,7 @@ _mm_storel_epi64(__m128i *__p, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTPS / MOVNTPS instruction.
+/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
///
/// \param __p
/// A pointer to the 128-bit aligned memory location used to store the value.
@@ -3947,7 +3947,7 @@ _mm_stream_pd(double *__p, __m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTPS / MOVNTPS instruction.
+/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
///
/// \param __p
/// A pointer to the 128-bit aligned memory location used to store the value.
@@ -3965,7 +3965,7 @@ _mm_stream_si128(__m128i *__p, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MOVNTI instruction.
+/// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
///
/// \param __p
/// A pointer to the 32-bit memory location used to store the value.
@@ -3984,7 +3984,7 @@ _mm_stream_si32(int *__p, int __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MOVNTIQ instruction.
+/// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
///
/// \param __p
/// A pointer to the 64-bit memory location used to store the value.
@@ -4006,7 +4006,7 @@ extern "C" {
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CLFLUSH instruction.
+/// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
///
/// \param __p
/// A pointer to the memory location used to identify the cache line to be
@@ -4020,7 +4020,7 @@ void _mm_clflush(void const *);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c LFENCE instruction.
+/// This intrinsic corresponds to the <c> LFENCE </c> instruction.
///
void _mm_lfence(void);
@@ -4031,7 +4031,7 @@ void _mm_lfence(void);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MFENCE instruction.
+/// This intrinsic corresponds to the <c> MFENCE </c> instruction.
///
void _mm_mfence(void);
@@ -4046,7 +4046,7 @@ void _mm_mfence(void);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPACKSSWB / PACKSSWB instruction.
+/// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
@@ -4074,7 +4074,7 @@ _mm_packs_epi16(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPACKSSDW / PACKSSDW instruction.
+/// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
@@ -4102,7 +4102,7 @@ _mm_packs_epi32(__m128i __a, __m128i __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPACKUSWB / PACKUSWB instruction.
+/// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
@@ -4128,7 +4128,7 @@ _mm_packus_epi16(__m128i __a, __m128i __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPEXTRW / PEXTRW instruction.
+/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector.
@@ -4159,7 +4159,7 @@ _mm_extract_epi16(__m128i __a, int __imm
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPINSRW / PINSRW instruction.
+/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
///
/// \param __a
/// A 128-bit integer vector of [8 x i16]. This vector is copied to the
@@ -4186,7 +4186,7 @@ _mm_insert_epi16(__m128i __a, int __b, i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPMOVMSKB / PMOVMSKB instruction.
+/// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
///
/// \param __a
/// A 128-bit integer vector containing the values with bits to be extracted.
@@ -4208,7 +4208,7 @@ _mm_movemask_epi8(__m128i __a)
/// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPSHUFD / PSHUFD instruction.
+/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
///
/// \param a
/// A 128-bit integer vector containing the values to be copied.
@@ -4242,7 +4242,7 @@ _mm_movemask_epi8(__m128i __a)
/// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPSHUFLW / PSHUFLW instruction.
+/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
///
/// \param a
/// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
@@ -4276,7 +4276,7 @@ _mm_movemask_epi8(__m128i __a)
/// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPSHUFHW / PSHUFHW instruction.
+/// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
///
/// \param a
/// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
@@ -4307,7 +4307,7 @@ _mm_movemask_epi8(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKHBW / PUNPCKHBW instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c> instruction.
///
/// \param __a
/// A 128-bit vector of [16 x i8].
@@ -4341,7 +4341,7 @@ _mm_unpackhi_epi8(__m128i __a, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKHWD / PUNPCKHWD instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [8 x i16].
@@ -4367,7 +4367,7 @@ _mm_unpackhi_epi16(__m128i __a, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKHDQ / PUNPCKHDQ instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x i32].
@@ -4389,7 +4389,7 @@ _mm_unpackhi_epi32(__m128i __a, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKHQDQ / PUNPCKHQDQ instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x i64].
@@ -4409,7 +4409,7 @@ _mm_unpackhi_epi64(__m128i __a, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLBW / PUNPCKLBW instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c> instruction.
///
/// \param __a
/// A 128-bit vector of [16 x i8].
@@ -4444,7 +4444,7 @@ _mm_unpacklo_epi8(__m128i __a, __m128i _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLWD / PUNPCKLWD instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [8 x i16].
@@ -4470,7 +4470,7 @@ _mm_unpacklo_epi16(__m128i __a, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLDQ / PUNPCKLDQ instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x i32].
@@ -4492,7 +4492,7 @@ _mm_unpacklo_epi32(__m128i __a, __m128i
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLQDQ / PUNPCKLQDQ instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x i64].
@@ -4529,7 +4529,7 @@ _mm_movepi64_pi64(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ / MOVD </c> instruction.
///
/// \param __a
/// A 64-bit value.
@@ -4546,7 +4546,7 @@ _mm_movpi64_epi64(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
///
/// \param __a
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
@@ -4565,7 +4565,7 @@ _mm_move_epi64(__m128i __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKHPD / UNPCKHPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -4586,7 +4586,7 @@ _mm_unpackhi_pd(__m128d __a, __m128d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD / UNPCKLPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double].
@@ -4607,7 +4607,7 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVMSKPD / MOVMSKPD instruction.
+/// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the values with sign bits to
@@ -4631,7 +4631,7 @@ _mm_movemask_pd(__m128d __a)
/// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
/// \endcode
///
-/// This intrinsic corresponds to the \c VSHUFPD / SHUFPD instruction.
+/// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
///
/// \param a
/// A 128-bit vector of [2 x double].
@@ -4761,7 +4761,7 @@ extern "C" {
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PAUSE instruction.
+/// This intrinsic corresponds to the <c> PAUSE </c> instruction.
///
void _mm_pause(void);
Modified: cfe/trunk/lib/Headers/f16cintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/f16cintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/f16cintrin.h (original)
+++ cfe/trunk/lib/Headers/f16cintrin.h Fri Dec 9 12:35:50 2016
@@ -37,7 +37,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 16-bit half-precision float value.
@@ -59,7 +59,7 @@ _cvtsh_ss(unsigned short __a)
/// unsigned short _cvtss_sh(float a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 32-bit single-precision float value to be converted to a 16-bit
@@ -85,7 +85,7 @@ _cvtsh_ss(unsigned short __a)
/// __m128i _mm_cvtps_ph(__m128 a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 128-bit vector containing 32-bit float values.
@@ -107,7 +107,7 @@ _cvtsh_ss(unsigned short __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector containing 16-bit half-precision float values. The lower
Modified: cfe/trunk/lib/Headers/fxsrintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/fxsrintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/fxsrintrin.h (original)
+++ cfe/trunk/lib/Headers/fxsrintrin.h Fri Dec 9 12:35:50 2016
@@ -35,7 +35,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c FXSAVE instruction.
+/// This intrinsic corresponds to the <c> FXSAVE </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@@ -53,7 +53,7 @@ _fxsave(void *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c FXRSTOR instruction.
+/// This intrinsic corresponds to the <c> FXRSTOR </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@@ -70,7 +70,7 @@ _fxrstor(void *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c FXSAVE64 instruction.
+/// This intrinsic corresponds to the <c> FXSAVE64 </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
@@ -88,7 +88,7 @@ _fxsave64(void *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c FXRSTOR64 instruction.
+/// This intrinsic corresponds to the <c> FXRSTOR64 </c> instruction.
///
/// \param __p
/// A pointer to a 512-byte memory region. The beginning of this memory
Modified: cfe/trunk/lib/Headers/immintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/immintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/immintrin.h (original)
+++ cfe/trunk/lib/Headers/immintrin.h Fri Dec 9 12:35:50 2016
@@ -78,7 +78,7 @@
/// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
/// \endcode
///
-/// This intrinsic corresponds to the \c VCVTPS2PH instruction.
+/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
/// A 256-bit vector containing 32-bit single-precision float values to be
@@ -100,7 +100,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTPH2PS instruction.
+/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector containing 16-bit half-precision float values to be
Modified: cfe/trunk/lib/Headers/mmintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/mmintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/mmintrin.h (original)
+++ cfe/trunk/lib/Headers/mmintrin.h Fri Dec 9 12:35:50 2016
@@ -39,7 +39,7 @@ typedef char __v8qi __attribute__((__vec
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c EMMS instruction.
+/// This intrinsic corresponds to the <c> EMMS </c> instruction.
///
static __inline__ void __DEFAULT_FN_ATTRS
_mm_empty(void)
@@ -52,7 +52,7 @@ _mm_empty(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __i
/// A 32-bit integer value.
@@ -69,7 +69,7 @@ _mm_cvtsi32_si64(int __i)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVD / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector.
@@ -85,7 +85,7 @@ _mm_cvtsi64_si32(__m64 __m)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
///
/// \param __i
/// A 64-bit signed integer.
@@ -101,7 +101,7 @@ _mm_cvtsi64_m64(long long __i)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction.
+/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector.
@@ -121,7 +121,7 @@ _mm_cvtm64_si64(__m64 __m)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PACKSSWB instruction.
+/// This intrinsic corresponds to the <c> PACKSSWB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
@@ -151,7 +151,7 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PACKSSDW instruction.
+/// This intrinsic corresponds to the <c> PACKSSDW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
@@ -181,7 +181,7 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PACKUSWB instruction.
+/// This intrinsic corresponds to the <c> PACKUSWB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
@@ -208,7 +208,7 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKHBW instruction.
+/// This intrinsic corresponds to the <c> PUNPCKHBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -235,7 +235,7 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKHWD instruction.
+/// This intrinsic corresponds to the <c> PUNPCKHWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -258,7 +258,7 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKHDQ instruction.
+/// This intrinsic corresponds to the <c> PUNPCKHDQ </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
@@ -279,7 +279,7 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKLBW instruction.
+/// This intrinsic corresponds to the <c> PUNPCKLBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -306,7 +306,7 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKLWD instruction.
+/// This intrinsic corresponds to the <c> PUNPCKLWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -329,7 +329,7 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PUNPCKLDQ instruction.
+/// This intrinsic corresponds to the <c> PUNPCKLDQ </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
@@ -352,7 +352,7 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDB instruction.
+/// This intrinsic corresponds to the <c> PADDB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -373,7 +373,7 @@ _mm_add_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDW instruction.
+/// This intrinsic corresponds to the <c> PADDW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -394,7 +394,7 @@ _mm_add_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDD instruction.
+/// This intrinsic corresponds to the <c> PADDD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@@ -416,7 +416,7 @@ _mm_add_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDSB instruction.
+/// This intrinsic corresponds to the <c> PADDSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -439,7 +439,7 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDSW instruction.
+/// This intrinsic corresponds to the <c> PADDSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -461,7 +461,7 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDUSB instruction.
+/// This intrinsic corresponds to the <c> PADDUSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -483,7 +483,7 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PADDUSW instruction.
+/// This intrinsic corresponds to the <c> PADDUSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -504,7 +504,7 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBB instruction.
+/// This intrinsic corresponds to the <c> PSUBB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@@ -525,7 +525,7 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBW instruction.
+/// This intrinsic corresponds to the <c> PSUBW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@@ -546,7 +546,7 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBD instruction.
+/// This intrinsic corresponds to the <c> PSUBD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32] containing the minuends.
@@ -569,7 +569,7 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBSB instruction.
+/// This intrinsic corresponds to the <c> PSUBSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@@ -592,7 +592,7 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBSW instruction.
+/// This intrinsic corresponds to the <c> PSUBSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@@ -615,7 +615,7 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBUSB instruction.
+/// This intrinsic corresponds to the <c> PSUBUSB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8] containing the minuends.
@@ -638,7 +638,7 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSUBUSW instruction.
+/// This intrinsic corresponds to the <c> PSUBUSW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16] containing the minuends.
@@ -663,7 +663,7 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMADDWD instruction.
+/// This intrinsic corresponds to the <c> PMADDWD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -684,7 +684,7 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMULHW instruction.
+/// This intrinsic corresponds to the <c> PMULHW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -705,7 +705,7 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMULLW instruction.
+/// This intrinsic corresponds to the <c> PMULLW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -727,7 +727,7 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLW instruction.
+/// This intrinsic corresponds to the <c> PSLLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -749,7 +749,7 @@ _mm_sll_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLW instruction.
+/// This intrinsic corresponds to the <c> PSLLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -772,7 +772,7 @@ _mm_slli_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLD instruction.
+/// This intrinsic corresponds to the <c> PSLLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -794,7 +794,7 @@ _mm_sll_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLD instruction.
+/// This intrinsic corresponds to the <c> PSLLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -815,7 +815,7 @@ _mm_slli_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLQ instruction.
+/// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@@ -835,7 +835,7 @@ _mm_sll_si64(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSLLQ instruction.
+/// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@@ -858,7 +858,7 @@ _mm_slli_si64(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRAW instruction.
+/// This intrinsic corresponds to the <c> PSRAW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -880,7 +880,7 @@ _mm_sra_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRAW instruction.
+/// This intrinsic corresponds to the <c> PSRAW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -903,7 +903,7 @@ _mm_srai_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRAD instruction.
+/// This intrinsic corresponds to the <c> PSRAD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -925,7 +925,7 @@ _mm_sra_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRAD instruction.
+/// This intrinsic corresponds to the <c> PSRAD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -947,7 +947,7 @@ _mm_srai_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLW instruction.
+/// This intrinsic corresponds to the <c> PSRLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -968,7 +968,7 @@ _mm_srl_pi16(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLW instruction.
+/// This intrinsic corresponds to the <c> PSRLW </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [4 x i16].
@@ -990,7 +990,7 @@ _mm_srli_pi16(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLD instruction.
+/// This intrinsic corresponds to the <c> PSRLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -1011,7 +1011,7 @@ _mm_srl_pi32(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLD instruction.
+/// This intrinsic corresponds to the <c> PSRLD </c> instruction.
///
/// \param __m
/// A 64-bit integer vector of [2 x i32].
@@ -1031,7 +1031,7 @@ _mm_srli_pi32(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLQ instruction.
+/// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@@ -1050,7 +1050,7 @@ _mm_srl_si64(__m64 __m, __m64 __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSRLQ instruction.
+/// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
///
/// \param __m
/// A 64-bit integer vector interpreted as a single 64-bit integer.
@@ -1067,7 +1067,7 @@ _mm_srli_si64(__m64 __m, int __count)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PAND instruction.
+/// This intrinsic corresponds to the <c> PAND </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@@ -1087,7 +1087,7 @@ _mm_and_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PANDN instruction.
+/// This intrinsic corresponds to the <c> PANDN </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector. The one's complement of this parameter is used
@@ -1106,7 +1106,7 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c POR instruction.
+/// This intrinsic corresponds to the <c> POR </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@@ -1124,7 +1124,7 @@ _mm_or_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PXOR instruction.
+/// This intrinsic corresponds to the <c> PXOR </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector.
@@ -1145,7 +1145,7 @@ _mm_xor_si64(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPEQB instruction.
+/// This intrinsic corresponds to the <c> PCMPEQB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -1166,7 +1166,7 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPEQW instruction.
+/// This intrinsic corresponds to the <c> PCMPEQW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -1187,7 +1187,7 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPEQD instruction.
+/// This intrinsic corresponds to the <c> PCMPEQD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@@ -1208,7 +1208,7 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPGTB instruction.
+/// This intrinsic corresponds to the <c> PCMPGTB </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [8 x i8].
@@ -1229,7 +1229,7 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPGTW instruction.
+/// This intrinsic corresponds to the <c> PCMPGTW </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [4 x i16].
@@ -1250,7 +1250,7 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PCMPGTD instruction.
+/// This intrinsic corresponds to the <c> PCMPGTD </c> instruction.
///
/// \param __m1
/// A 64-bit integer vector of [2 x i32].
@@ -1268,7 +1268,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the the \c VXORPS / XORPS instruction.
+/// This intrinsic corresponds to the the <c> VXORPS / XORPS </c> instruction.
///
/// \returns An initialized 64-bit integer vector with all elements set to zero.
static __inline__ __m64 __DEFAULT_FN_ATTRS
@@ -1360,7 +1360,7 @@ _mm_set_pi8(char __b7, char __b6, char _
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSHUFD / PSHUFD instruction.
+/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
///
/// \param __i
/// A 32-bit integer value used to initialize each vector element of the
@@ -1378,7 +1378,7 @@ _mm_set1_pi32(int __i)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPSHUFLW / PSHUFLW instruction.
+/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
///
/// \param __w
/// A 16-bit integer value used to initialize each vector element of the
@@ -1395,8 +1395,8 @@ _mm_set1_pi16(short __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPUNPCKLBW + VPSHUFLW / \c PUNPCKLBW +
-/// PSHUFLW instruction.
+/// This intrinsic corresponds to the <c> VPUNPCKLBW + VPSHUFLW / PUNPCKLBW +
+/// PSHUFLW </c> instruction.
///
/// \param __b
/// An 8-bit integer value used to initialize each vector element of the
Modified: cfe/trunk/lib/Headers/pmmintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/pmmintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/pmmintrin.h (original)
+++ cfe/trunk/lib/Headers/pmmintrin.h Fri Dec 9 12:35:50 2016
@@ -37,7 +37,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VLDDQU instruction.
+/// This intrinsic corresponds to the <c> VLDDQU </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit integer vector containing integer values.
@@ -53,7 +53,7 @@ _mm_lddqu_si128(__m128i const *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSUBPS instruction.
+/// This intrinsic corresponds to the <c> VADDSUBPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the left source operand.
@@ -72,7 +72,7 @@ _mm_addsub_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHADDPS instruction.
+/// This intrinsic corresponds to the <c> VHADDPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -95,7 +95,7 @@ _mm_hadd_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHSUBPS instruction.
+/// This intrinsic corresponds to the <c> VHSUBPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -123,7 +123,7 @@ _mm_hsub_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSHDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVSHDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -145,7 +145,7 @@ _mm_movehdup_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSLDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVSLDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -162,7 +162,7 @@ _mm_moveldup_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSUBPD instruction.
+/// This intrinsic corresponds to the <c> VADDSUBPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing the left source operand.
@@ -181,7 +181,7 @@ _mm_addsub_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHADDPD instruction.
+/// This intrinsic corresponds to the <c> VHADDPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -204,7 +204,7 @@ _mm_hadd_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VHSUBPD instruction.
+/// This intrinsic corresponds to the <c> VHSUBPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double] containing one of the source operands.
@@ -231,7 +231,7 @@ _mm_hsub_pd(__m128d __a, __m128d __b)
/// __m128d _mm_loaddup_pd(double const * dp);
/// \endcode
///
-/// This intrinsic corresponds to the \c VMOVDDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
///
/// \param dp
/// A pointer to a double-precision value to be moved and duplicated.
@@ -245,7 +245,7 @@ _mm_hsub_pd(__m128d __a, __m128d __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVDDUP instruction.
+/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
///
/// \param __a
/// A 128-bit vector of [2 x double]. Bits [63:0] are written to bits
@@ -272,7 +272,7 @@ _mm_movedup_pd(__m128d __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MONITOR instruction.
+/// This intrinsic corresponds to the <c> MONITOR </c> instruction.
///
/// \param __p
/// The memory range to be monitored. The size of the range is determined by
@@ -293,7 +293,7 @@ _mm_monitor(void const *__p, unsigned __
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MWAIT instruction.
+/// This intrinsic corresponds to the <c> MWAIT </c> instruction.
///
/// \param __extensions
/// Optional extensions for the monitoring state, which may vary by
Modified: cfe/trunk/lib/Headers/popcntintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/popcntintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/popcntintrin.h (original)
+++ cfe/trunk/lib/Headers/popcntintrin.h Fri Dec 9 12:35:50 2016
@@ -31,7 +31,7 @@
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c POPCNT instruction.
+/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// An unsigned 32-bit integer operand.
@@ -47,7 +47,7 @@ _mm_popcnt_u32(unsigned int __A)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c POPCNT instruction.
+/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// A signed 32-bit integer operand.
@@ -64,7 +64,7 @@ _popcnt32(int __A)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c POPCNT instruction.
+/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// An unsigned 64-bit integer operand.
@@ -80,7 +80,7 @@ _mm_popcnt_u64(unsigned long long __A)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c POPCNT instruction.
+/// This intrinsic corresponds to the <c> POPCNT </c> instruction.
///
/// \param __A
/// A signed 64-bit integer operand.
Modified: cfe/trunk/lib/Headers/xmmintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/xmmintrin.h?rev=289249&r1=289248&r2=289249&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/xmmintrin.h (original)
+++ cfe/trunk/lib/Headers/xmmintrin.h Fri Dec 9 12:35:50 2016
@@ -46,7 +46,7 @@ typedef unsigned int __v4su __attribute_
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDSS / ADDSS instructions.
+/// This intrinsic corresponds to the <c> VADDSS / ADDSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -69,7 +69,7 @@ _mm_add_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VADDPS / ADDPS instructions.
+/// This intrinsic corresponds to the <c> VADDPS / ADDPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -88,7 +88,7 @@ _mm_add_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBSS / SUBSS instructions.
+/// This intrinsic corresponds to the <c> VSUBSS / SUBSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the minuend. The lower 32 bits
@@ -112,7 +112,7 @@ _mm_sub_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSUBPS / SUBPS instructions.
+/// This intrinsic corresponds to the <c> VSUBPS / SUBPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the minuend.
@@ -131,7 +131,7 @@ _mm_sub_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULSS / MULSS instructions.
+/// This intrinsic corresponds to the <c> VMULSS / MULSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -154,7 +154,7 @@ _mm_mul_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMULPS / MULPS instructions.
+/// This intrinsic corresponds to the <c> VMULPS / MULPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -173,7 +173,7 @@ _mm_mul_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVSS / DIVSS instructions.
+/// This intrinsic corresponds to the <c> VDIVSS / DIVSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the dividend. The lower 32
@@ -195,7 +195,7 @@ _mm_div_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VDIVPS / DIVPS instructions.
+/// This intrinsic corresponds to the <c> VDIVPS / DIVPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the dividend.
@@ -214,7 +214,7 @@ _mm_div_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTSS / SQRTSS instructions.
+/// This intrinsic corresponds to the <c> VSQRTSS / SQRTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -233,7 +233,7 @@ _mm_sqrt_ss(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSQRTPS / SQRTPS instructions.
+/// This intrinsic corresponds to the <c> VSQRTPS / SQRTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -250,7 +250,7 @@ _mm_sqrt_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRCPSS / RCPSS instructions.
+/// This intrinsic corresponds to the <c> VRCPSS / RCPSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -269,7 +269,7 @@ _mm_rcp_ss(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRCPPS / RCPPS instructions.
+/// This intrinsic corresponds to the <c> VRCPPS / RCPPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -286,7 +286,7 @@ _mm_rcp_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRSQRTSS / RSQRTSS instructions.
+/// This intrinsic corresponds to the <c> VRSQRTSS / RSQRTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -306,7 +306,7 @@ _mm_rsqrt_ss(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VRSQRTPS / RSQRTPS instructions.
+/// This intrinsic corresponds to the <c> VRSQRTPS / RSQRTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -324,7 +324,7 @@ _mm_rsqrt_ps(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINSS / MINSS instructions.
+/// This intrinsic corresponds to the <c> VMINSS / MINSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -346,7 +346,7 @@ _mm_min_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMINPS / MINPS instructions.
+/// This intrinsic corresponds to the <c> VMINPS / MINPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands.
@@ -366,7 +366,7 @@ _mm_min_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXSS / MAXSS instructions.
+/// This intrinsic corresponds to the <c> VMAXSS / MAXSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -388,7 +388,7 @@ _mm_max_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMAXPS / MAXPS instructions.
+/// This intrinsic corresponds to the <c> VMAXPS / MAXPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands.
@@ -406,7 +406,7 @@ _mm_max_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDPS / ANDPS instructions.
+/// This intrinsic corresponds to the <c> VANDPS / ANDPS </c> instructions.
///
/// \param __a
/// A 128-bit vector containing one of the source operands.
@@ -426,7 +426,7 @@ _mm_and_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VANDNPS / ANDNPS instructions.
+/// This intrinsic corresponds to the <c> VANDNPS / ANDNPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing the first source operand. The
@@ -446,7 +446,7 @@ _mm_andnot_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VORPS / ORPS instructions.
+/// This intrinsic corresponds to the <c> VORPS / ORPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -465,7 +465,7 @@ _mm_or_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS / XORPS instructions.
+/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the source operands.
@@ -485,7 +485,7 @@ _mm_xor_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPEQSS / CMPEQSS instructions.
+/// This intrinsic corresponds to the <c> VCMPEQSS / CMPEQSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -506,7 +506,7 @@ _mm_cmpeq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPEQPS / CMPEQPS instructions.
+/// This intrinsic corresponds to the <c> VCMPEQPS / CMPEQPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -526,7 +526,7 @@ _mm_cmpeq_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTSS / CMPLTSS instructions.
+/// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -548,7 +548,7 @@ _mm_cmplt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTPS / CMPLTPS instructions.
+/// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -569,7 +569,7 @@ _mm_cmplt_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLESS / CMPLESS instructions.
+/// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -591,7 +591,7 @@ _mm_cmple_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLEPS / CMPLEPS instructions.
+/// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -611,7 +611,7 @@ _mm_cmple_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTSS / CMPLTSS instructions.
+/// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -635,7 +635,7 @@ _mm_cmpgt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLTPS / CMPLTPS instructions.
+/// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -656,7 +656,7 @@ _mm_cmpgt_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLESS / CMPLESS instructions.
+/// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -680,7 +680,7 @@ _mm_cmpge_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPLEPS / CMPLEPS instructions.
+/// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -699,7 +699,7 @@ _mm_cmpge_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNEQSS / CMPNEQSS instructions.
+/// This intrinsic corresponds to the <c> VCMPNEQSS / CMPNEQSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -720,7 +720,7 @@ _mm_cmpneq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNEQPS / CMPNEQPS instructions.
+/// This intrinsic corresponds to the <c> VCMPNEQPS / CMPNEQPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -740,7 +740,7 @@ _mm_cmpneq_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTSS / CMPNLTSS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -762,7 +762,7 @@ _mm_cmpnlt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTPS / CMPNLTPS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -783,7 +783,7 @@ _mm_cmpnlt_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLESS / CMPNLESS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -805,7 +805,7 @@ _mm_cmpnle_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLEPS / CMPNLEPS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -826,7 +826,7 @@ _mm_cmpnle_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTSS / CMPNLTSS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -850,7 +850,7 @@ _mm_cmpngt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLTPS / CMPNLTPS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -871,7 +871,7 @@ _mm_cmpngt_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLESS / CMPNLESS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -895,7 +895,7 @@ _mm_cmpnge_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPNLEPS / CMPNLEPS instructions.
+/// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -916,7 +916,7 @@ _mm_cmpnge_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPORDSS / CMPORDSS instructions.
+/// This intrinsic corresponds to the <c> VCMPORDSS / CMPORDSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -938,7 +938,7 @@ _mm_cmpord_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPORDPS / CMPORDPS instructions.
+/// This intrinsic corresponds to the <c> VCMPORDPS / CMPORDPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -959,7 +959,7 @@ _mm_cmpord_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPUNORDSS / CMPUNORDSS instructions.
+/// This intrinsic corresponds to the <c> VCMPUNORDSS / CMPUNORDSS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float] containing one of the operands. The lower
@@ -981,7 +981,7 @@ _mm_cmpunord_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCMPUNORDPS / CMPUNORDPS instructions.
+/// This intrinsic corresponds to the <c> VCMPUNORDPS / CMPUNORDPS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -999,7 +999,7 @@ _mm_cmpunord_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1020,7 +1020,7 @@ _mm_comieq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1041,7 +1041,7 @@ _mm_comilt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1062,7 +1062,7 @@ _mm_comile_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1083,7 +1083,7 @@ _mm_comigt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1104,7 +1104,7 @@ _mm_comige_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCOMISS / COMISS instructions.
+/// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1125,7 +1125,7 @@ _mm_comineq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1146,7 +1146,7 @@ _mm_ucomieq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1168,7 +1168,7 @@ _mm_ucomilt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1190,7 +1190,7 @@ _mm_ucomile_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1212,7 +1212,7 @@ _mm_ucomigt_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1233,7 +1233,7 @@ _mm_ucomige_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUCOMISS / UCOMISS instructions.
+/// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1253,7 +1253,7 @@ _mm_ucomineq_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSS2SI / CVTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1270,7 +1270,7 @@ _mm_cvtss_si32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSS2SI / CVTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1289,7 +1289,7 @@ _mm_cvt_ss2si(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSS2SI / CVTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1308,7 +1308,7 @@ _mm_cvtss_si64(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPS2PI instruction.
+/// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1324,7 +1324,7 @@ _mm_cvtps_pi32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPS2PI instruction.
+/// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1341,7 +1341,7 @@ _mm_cvt_ps2pi(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTSS2SI / CVTTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1359,7 +1359,7 @@ _mm_cvttss_si32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTSS2SI / CVTTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1378,7 +1378,7 @@ _mm_cvtt_ss2si(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTTSS2SI / CVTTSS2SI instructions.
+/// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1397,7 +1397,7 @@ _mm_cvttss_si64(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTTPS2PI / VTTPS2PI instructions.
+/// This intrinsic corresponds to the <c> CVTTPS2PI / VTTPS2PI </c> instructions.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1414,7 +1414,7 @@ _mm_cvttps_pi32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTTPS2PI instruction.
+/// This intrinsic corresponds to the <c> CVTTPS2PI </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1432,7 +1432,7 @@ _mm_cvtt_ps2pi(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSI2SS / CVTSI2SS instruction.
+/// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1455,7 +1455,7 @@ _mm_cvtsi32_ss(__m128 __a, int __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSI2SS / CVTSI2SS instruction.
+/// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1479,7 +1479,7 @@ _mm_cvt_si2ss(__m128 __a, int __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VCVTSI2SS / CVTSI2SS instruction.
+/// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1504,7 +1504,7 @@ _mm_cvtsi64_ss(__m128 __a, long long __b
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1527,7 +1527,7 @@ _mm_cvtpi32_ps(__m128 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -1548,7 +1548,7 @@ _mm_cvt_pi2ps(__m128 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS instruction.
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
@@ -1566,7 +1566,7 @@ _mm_cvtss_f32(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVHPD / MOVHPD instruction.
+/// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float]. Bits [63:0] are written to bits [63:0]
@@ -1593,7 +1593,7 @@ _mm_loadh_pi(__m128 __a, const __m64 *__
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVLPD / MOVLPD instruction.
+/// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float]. Bits [127:64] are written to bits
@@ -1621,7 +1621,7 @@ _mm_loadl_pi(__m128 __a, const __m64 *__
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS instruction.
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
///
/// \param __p
/// A pointer to a 32-bit memory location containing a single-precision
@@ -1644,7 +1644,7 @@ _mm_load_ss(const float *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS + \c shuffling
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS + shuffling </c>
/// instruction.
///
/// \param __p
@@ -1668,7 +1668,7 @@ _mm_load1_ps(const float *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS / MOVAPS instruction.
+/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1685,7 +1685,7 @@ _mm_load_ps(const float *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPS / MOVUPS instruction.
+/// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1705,7 +1705,7 @@ _mm_loadu_ps(const float *__p)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS / MOVAPS + \c shuffling
+/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
/// instruction.
///
/// \param __p
@@ -1739,7 +1739,7 @@ _mm_undefined_ps(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS instruction.
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
///
/// \param __w
/// A single-precision floating-point value used to initialize the lower 32
@@ -1759,7 +1759,7 @@ _mm_set_ss(float __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS / PERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
///
/// \param __w
/// A single-precision floating-point value used to initialize each vector
@@ -1778,7 +1778,7 @@ _mm_set1_ps(float __w)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPERMILPS / PERMILPS instruction.
+/// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
///
/// \param __w
/// A single-precision floating-point value used to initialize each vector
@@ -1850,7 +1850,7 @@ _mm_setr_ps(float __z, float __y, float
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VXORPS / XORPS instruction.
+/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
///
/// \returns An initialized 128-bit floating-point vector of [4 x float] with
/// all elements set to zero.
@@ -1865,7 +1865,7 @@ _mm_setzero_ps(void)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VPEXTRQ / MOVQ instruction.
+/// This intrinsic corresponds to the <c> VPEXTRQ / MOVQ </c> instruction.
///
/// \param __p
/// A pointer to a 64-bit memory location.
@@ -1882,7 +1882,7 @@ _mm_storeh_pi(__m64 *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVLPS / MOVLPS instruction.
+/// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
///
/// \param __p
/// A pointer to a memory location that will receive the float values.
@@ -1899,7 +1899,7 @@ _mm_storel_pi(__m64 *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS instruction.
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
///
/// \param __p
/// A pointer to a 32-bit memory location.
@@ -1919,7 +1919,7 @@ _mm_store_ss(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVUPS / MOVUPS instruction.
+/// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1940,7 +1940,7 @@ _mm_storeu_ps(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS / MOVAPS instruction.
+/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit memory location. The address of the memory
@@ -1958,7 +1958,7 @@ _mm_store_ps(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to \c VMOVAPS / MOVAPS + \c shuffling
+/// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
/// instruction.
///
/// \param __p
@@ -1978,7 +1978,7 @@ _mm_store1_ps(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to \c VMOVAPS / MOVAPS + \c shuffling
+/// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
/// instruction.
///
/// \param __p
@@ -1997,7 +1997,7 @@ _mm_store_ps1(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVAPS / MOVAPS + \c shuffling
+/// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
/// instruction.
///
/// \param __p
@@ -2030,7 +2030,7 @@ _mm_storer_ps(float *__p, __m128 __a)
/// void _mm_prefetch(const void * a, const int sel);
/// \endcode
///
-/// This intrinsic corresponds to the \c PREFETCHNTA instruction.
+/// This intrinsic corresponds to the <c> PREFETCHNTA </c> instruction.
///
/// \param a
/// A pointer to a memory location containing a cache line of data.
@@ -2053,7 +2053,7 @@ _mm_storer_ps(float *__p, __m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MOVNTQ instruction.
+/// This intrinsic corresponds to the <c> MOVNTQ </c> instruction.
///
/// \param __p
/// A pointer to an aligned memory location used to store the register value.
@@ -2071,7 +2071,7 @@ _mm_stream_pi(__m64 *__p, __m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVNTPS / MOVNTPS instruction.
+/// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
///
/// \param __p
/// A pointer to a 128-bit aligned memory location that will receive the
@@ -2095,7 +2095,7 @@ extern "C" {
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c SFENCE instruction.
+/// This intrinsic corresponds to the <c> SFENCE </c> instruction.
///
void _mm_sfence(void);
@@ -2112,7 +2112,7 @@ void _mm_sfence(void);
/// void _mm_extract_pi(__m64 a, int n);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPEXTRW / PEXTRW instruction.
+/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
///
/// \param a
/// A 64-bit vector of [4 x i16].
@@ -2136,7 +2136,7 @@ void _mm_sfence(void);
/// void _mm_insert_pi(__m64 a, int d, int n);
/// \endcode
///
-/// This intrinsic corresponds to the \c VPINSRW / PINSRW instruction.
+/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
///
/// \param a
/// A 64-bit vector of [4 x i16].
@@ -2163,7 +2163,7 @@ void _mm_sfence(void);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMAXSW instruction.
+/// This intrinsic corresponds to the <c> PMAXSW </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2182,7 +2182,7 @@ _mm_max_pi16(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMAXUB instruction.
+/// This intrinsic corresponds to the <c> PMAXUB </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2201,7 +2201,7 @@ _mm_max_pu8(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMINSW instruction.
+/// This intrinsic corresponds to the <c> PMINSW </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2220,7 +2220,7 @@ _mm_min_pi16(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMINUB instruction.
+/// This intrinsic corresponds to the <c> PMINUB </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2239,7 +2239,7 @@ _mm_min_pu8(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMOVMSKB instruction.
+/// This intrinsic corresponds to the <c> PMOVMSKB </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing the values with bits to be extracted.
@@ -2257,7 +2257,7 @@ _mm_movemask_pi8(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PMULHUW instruction.
+/// This intrinsic corresponds to the <c> PMULHUW </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2279,7 +2279,7 @@ _mm_mulhi_pu16(__m64 __a, __m64 __b)
/// __m64 _mm_shuffle_pi16(__m64 a, const int n);
/// \endcode
///
-/// This intrinsic corresponds to the \c PSHUFW instruction.
+/// This intrinsic corresponds to the <c> PSHUFW </c> instruction.
///
/// \param a
/// A 64-bit integer vector containing the values to be shuffled.
@@ -2308,7 +2308,7 @@ _mm_mulhi_pu16(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c MASKMOVQ instruction.
+/// This intrinsic corresponds to the <c> MASKMOVQ </c> instruction.
///
/// \param __d
/// A 64-bit integer vector containing the values with elements to be copied.
@@ -2333,7 +2333,7 @@ _mm_maskmove_si64(__m64 __d, __m64 __n,
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PAVGB instruction.
+/// This intrinsic corresponds to the <c> PAVGB </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2352,7 +2352,7 @@ _mm_avg_pu8(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PAVGW instruction.
+/// This intrinsic corresponds to the <c> PAVGW </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2372,7 +2372,7 @@ _mm_avg_pu16(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c PSADBW instruction.
+/// This intrinsic corresponds to the <c> PSADBW </c> instruction.
///
/// \param __a
/// A 64-bit integer vector containing one of the source operands.
@@ -2419,7 +2419,7 @@ extern "C" {
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VSTMXCSR / STMXCSR instruction.
+/// This intrinsic corresponds to the <c> VSTMXCSR / STMXCSR </c> instruction.
///
/// \returns A 32-bit unsigned integer containing the contents of the MXCSR
/// register.
@@ -2457,7 +2457,7 @@ unsigned int _mm_getcsr(void);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VLDMXCSR / LDMXCSR instruction.
+/// This intrinsic corresponds to the <c> VLDMXCSR / LDMXCSR </c> instruction.
///
/// \param __i
/// A 32-bit unsigned integer value to be written to the MXCSR register.
@@ -2476,7 +2476,7 @@ void _mm_setcsr(unsigned int);
/// __m128 _mm_shuffle_ps(__m128 a, __m128 b, const int mask);
/// \endcode
///
-/// This intrinsic corresponds to the \c VSHUFPS / SHUFPS instruction.
+/// This intrinsic corresponds to the <c> VSHUFPS / SHUFPS </c> instruction.
///
/// \param a
/// A 128-bit vector of [4 x float].
@@ -2511,7 +2511,7 @@ void _mm_setcsr(unsigned int);
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKHPS / UNPCKHPS instruction.
+/// This intrinsic corresponds to the <c> VUNPCKHPS / UNPCKHPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2534,7 +2534,7 @@ _mm_unpackhi_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPS / UNPCKLPS instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPS / UNPCKLPS </c> instruction.
///
/// \param __a
/// A 128-bit vector of [4 x float].
@@ -2557,7 +2557,7 @@ _mm_unpacklo_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVSS / MOVSS instruction.
+/// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
///
/// \param __a
/// A 128-bit floating-point vector of [4 x float]. The upper 96 bits are
@@ -2578,7 +2578,7 @@ _mm_move_ss(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKHPD / UNPCKHPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
///
/// \param __a
/// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are
@@ -2599,7 +2599,7 @@ _mm_movehl_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VUNPCKLPD / UNPCKLPD instruction.
+/// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
///
/// \param __a
/// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are
@@ -2619,7 +2619,7 @@ _mm_movelh_ps(__m128 __a, __m128 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 64-bit vector of [4 x i16]. The elements of the destination are copied
@@ -2649,7 +2649,7 @@ _mm_cvtpi16_ps(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 64-bit vector of 16-bit unsigned integer values. The elements of the
@@ -2678,7 +2678,7 @@ _mm_cvtpu16_ps(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 64-bit vector of [8 x i8]. The elements of the destination are copied
@@ -2702,7 +2702,7 @@ _mm_cvtpi8_ps(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 64-bit vector of unsigned 8-bit integer values. The elements of the
@@ -2726,7 +2726,7 @@ _mm_cvtpu8_ps(__m64 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPI2PS + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 64-bit vector of [2 x i32]. The lower elements of the destination are
@@ -2759,7 +2759,7 @@ _mm_cvtpi32x2_ps(__m64 __a, __m64 __b)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPS2PI + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPS2PI + \c COMPOSITE </c> instruction.
///
/// \param __a
/// A 128-bit floating-point vector of [4 x float].
@@ -2788,7 +2788,7 @@ _mm_cvtps_pi16(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c CVTPS2PI + \c COMPOSITE instruction.
+/// This intrinsic corresponds to the <c> CVTPS2PI + \c COMPOSITE </c> instruction.
///
/// \param __a
/// 128-bit floating-point vector of [4 x float].
@@ -2812,7 +2812,7 @@ _mm_cvtps_pi8(__m128 __a)
///
/// \headerfile <x86intrin.h>
///
-/// This intrinsic corresponds to the \c VMOVMSKPS / MOVMSKPS instruction.
+/// This intrinsic corresponds to the <c> VMOVMSKPS / MOVMSKPS </c> instruction.
///
/// \param __a
/// A 128-bit floating-point vector of [4 x float].
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