[PATCH] D26858: [AArch64] Don't constrain the assembler when using -mgeneral-regs-only

[silviu.baranga@arm.com via cfe-commits]

sbaranga created this revision.
sbaranga added reviewers: jmolloy, rengolin, t.p.northover.
sbaranga added a subscriber: cfe-commits.
Herald added a subscriber: aemerson.

We use the neonasm, cryptoasm, fp-armv8asm and fullfp16asm features
to enable the assembling of instructions that were disabled when
disabling neon, crypto, and fp-armv8 features.

      

This makes the -mgeneral-regs-only behaviour compatible with gcc.

      

Fixes https://llvm.org/bugs/show_bug.cgi?id=30792


https://reviews.llvm.org/D26858

Files:
  docs/UsersManual.rst
  lib/Driver/Tools.cpp
  test/Driver/aarch64-mgeneral_regs_only.c


Index: lib/Driver/Tools.cpp
===================================================================
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -2623,9 +2623,33 @@
     D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args);
 
   if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
+    // Find the last of each feature.
+    llvm::StringMap<unsigned> LastOpt;
+    for (unsigned I = 0, N = Features.size(); I < N; ++I) {
+      StringRef Name = Features[I];
+      assert(Name[0] == '-' || Name[0] == '+');
+      LastOpt[Name.drop_front(1)] = I;
+    }
+
+    llvm::StringMap<unsigned>::iterator I = LastOpt.find("neon");
+    if (I != LastOpt.end() && Features[I->second] == "+neon")
+      Features.push_back("+neonasm");
+
+    I = LastOpt.find("crypto");
+    if (I != LastOpt.end() && Features[I->second] == "+crypto")
+      Features.push_back("+cryptoasm");
+
+    I = LastOpt.find("fp-armv8");
+    if (I != LastOpt.end() && Features[I->second] == "+fp-armv8")
+      Features.push_back("+fp-armv8asm");
+
+    I = LastOpt.find("fullfp16");
+    if (I != LastOpt.end() && Features[I->second] == "+fullfp16")
+      Features.push_back("+fullfp16asm");
+
     Features.push_back("-fp-armv8");
-    Features.push_back("-crypto");
     Features.push_back("-neon");
+    Features.push_back("-crypto");
   }
 
   // En/disable crc
Index: docs/UsersManual.rst
===================================================================
--- docs/UsersManual.rst
+++ docs/UsersManual.rst
@@ -1188,7 +1188,8 @@
    Generate code which only uses the general purpose registers.
 
    This option restricts the generated code to use general registers
-   only. This only applies to the AArch64 architecture.
+   only but does not restrict the assembler. This only applies to the
+   AArch64 architecture.
 
 .. option:: -mcompact-branches=[values]
 
Index: test/Driver/aarch64-mgeneral_regs_only.c
===================================================================
--- test/Driver/aarch64-mgeneral_regs_only.c
+++ test/Driver/aarch64-mgeneral_regs_only.c
@@ -4,6 +4,19 @@
 // RUN:   | FileCheck --check-prefix=CHECK-NO-FP %s
 // RUN: %clang -target arm64-linux-eabi -mgeneral-regs-only %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-NO-FP %s
+// RUN: %clang -target aarch64-linux-eabi -mgeneral-regs-only -mfpu=crypto-neon-fp-armv8 -%s -### 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-FP %s
+
+// CHECK-NO-FP: "-target-feature" "+neonasm"
+// CHECK-NO-FP-NOT: "-target-feature" "+fp-armv8asm"
+// CHECK-NO-FP-NOT: "-target-feature" "+cryptoasm"
 // CHECK-NO-FP: "-target-feature" "-fp-armv8"
 // CHECK-NO-FP: "-target-feature" "-crypto"
 // CHECK-NO-FP: "-target-feature" "-neon"
+
+// CHECK-FP: "-target-feature" "+neonasm"
+// CHECK-FP: "-target-feature" "+fp-armv8asm"
+// CHECK-FP: "-target-feature" "+cryptoasm"
+// CHECK-FP: "-target-feature" "-fp-armv8"
+// CHECK-FP: "-target-feature" "-crypto"
+// CHECK-FP: "-target-feature" "-neon"


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