[PATCH] D26587: [X86][AVX512][InlineASM][MS][clang] (I|G)CC Memory adjustments compatibility

[coby via cfe-commits]

coby created this revision.
coby added reviewers: m_zuckerman, rnk, myatsina.
coby added a subscriber: cfe-commits.
coby set the repository for this revision to rL LLVM.

(I|G)CC will adjust a missing size qualifier on an indirect memory reference according to a certain logic, which is presented on the suggested patch.
This patch implements a narrow view of those said adjustments - only upon AVX512 platforms, and only if the adjusted operand is missing a size qualifier & is of SIMD type (or a broadcast)
Summery of adjustment logic:

Unqualified indirect memory reference (i.e. - via 'brackets')
AVX512 platform
Operand is of SIMD type
llvm part can be viewed here: https://reviews.llvm.org/D26586


Repository:
  rL LLVM

https://reviews.llvm.org/D26587

Files:
  test/CodeGen/ms-inline-asm-avx512-relaxations.c


Index: test/CodeGen/ms-inline-asm-avx512-relaxations.c
===================================================================
--- test/CodeGen/ms-inline-asm-avx512-relaxations.c
+++ test/CodeGen/ms-inline-asm-avx512-relaxations.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake-avx512 -fasm-blocks -o - | FileCheck %s
+
+// Minimal reproducer
+// Case1: Check integrity of inspected patch upon broadcasting
+// Case2: Check integrity of inspected patch upon SIMD mem ref
+// Case3: Check we don't mess up with non-SIMD mem ref
+// Case4: Check non-AVX512 insts aren't affected
+
+void F() {
+  char a;
+  // CHECK: vaddps xmm1, xmm2, dword ptr $0{1to4}
+  // CHECK: vaddps xmm1, xmm2, xmmword ptr $1
+  // CHECK: vcomiss xmm1, byte ptr $2
+  // CHECK: mov rax, byte ptr $3
+  __asm vaddps xmm1, xmm2, [a]{1to4}
+  __asm vaddps xmm1, xmm2, [a]
+  __asm vcomiss xmm1, [a]
+  __asm mov rax, [a]
+}


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