r283743 - Revert "[x86][inline-asm][clang] accept 'v' constraint"

Daniel Jasper via cfe-commits cfe-commits at lists.llvm.org
Mon Oct 10 04:40:29 PDT 2016


Author: djasper
Date: Mon Oct 10 06:40:28 2016
New Revision: 283743

URL: http://llvm.org/viewvc/llvm-project?rev=283743&view=rev
Log:
Revert "[x86][inline-asm][clang] accept 'v' constraint"

This reverts commit r283716.

Breaks buildbot:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/

Removed:
    cfe/trunk/test/CodeGen/x86-inline-asm-v-constraint.c
Modified:
    cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=283743&r1=283742&r2=283743&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Oct 10 06:40:28 2016
@@ -4005,7 +4005,6 @@ X86TargetInfo::validateAsmConstraint(con
   case 'u': // Second from top of floating point stack.
   case 'q': // Any register accessible as [r]l: a, b, c, and d.
   case 'y': // Any MMX register.
-  case 'v': // Any {X,Y,Z}MM register (Arch & context dependent)
   case 'x': // Any SSE register.
   case 'Q': // Any register accessible as [r]h: a, b, c, and d.
   case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
@@ -4046,7 +4045,6 @@ bool X86TargetInfo::validateOperandSize(
   case 't':
   case 'u':
     return Size <= 128;
-  case 'v':
   case 'x':
     if (SSELevel >= AVX512F)
       // 512-bit zmm registers can be used if target supports AVX512F.

Removed: cfe/trunk/test/CodeGen/x86-inline-asm-v-constraint.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/x86-inline-asm-v-constraint.c?rev=283742&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/x86-inline-asm-v-constraint.c (original)
+++ cfe/trunk/test/CodeGen/x86-inline-asm-v-constraint.c (removed)
@@ -1,30 +0,0 @@
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu x86-64 -o - | FileCheck %s --check-prefix SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake -D AVX -o - | FileCheck %s --check-prefixes AVX,SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake-avx512 -D AVX512 -D AVX -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
-// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu knl -D AVX -D AVX512 -o - | FileCheck %s --check-prefixes AVX512,AVX,SSE
-
-typedef float __m128 __attribute__ ((vector_size (16)));
-typedef float __m256 __attribute__ ((vector_size (32)));
-typedef float __m512 __attribute__ ((vector_size (64)));
-
-// SSE: call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %0, <4 x float> %1)
-__m128 testXMM(__m128 _xmm0, long _l) {
-  __asm__("vmovhlps %1, %2, %0" :"=v"(_xmm0) : "v"(_l), "v"(_xmm0));
-  return _xmm0;
-}
-
-// AVX: call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %0)
-__m256 testYMM(__m256 _ymm0) {
-#ifdef AVX
-  __asm__("vmovsldup %1, %0" :"=v"(_ymm0) : "v"(_ymm0));
-#endif
-  return _ymm0;
-}
-
-// AVX512: call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %0, <16 x float> %1)
-__m512 testZMM(__m512 _zmm0, __m512 _zmm1) {
-#ifdef AVX512
-  __asm__("vpternlogd $0, %1, %2, %0" :"=v"(_zmm0) : "v"(_zmm1), "v"(_zmm0));
-#endif
-  return _zmm0;
-}




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