[PATCH] D24397: Target Power9 bit counting and vector comparison instructions through builtins (front end portion)

[Nemanja Ivanovic via cfe-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D24397#555057, @bjope wrote:

> This test/CodeGen/builtins-ppc-p9vector.c test will fail together with this upcoming LLVM patch https://reviews.llvm.org/D24955
>
> Problem is that lots of your
>
>   add i64 {{.*}}, 64
>
> checks will fails since the improved analysis will find out that the add has the "nsw" "nuw" properties.
>
> I'm not so familiar with the regexps used by FileCheck, but somehow we need to (also) allow
>
>   add nsw nuw i64 {{.*}}, 64
>
> in the checks to make it more future proof.


I can change the patterns that check for the add instructions to the following:
// CHECK: add {{[nsuw ]*}}i64 {{.*}}, 64

That will pass with:
add nsw i64
add nuw i64
add nsw nuw i64
...

Basically if all that is found between the "add" and "i64" is any combination of the letters "nsuw" and space, it will pass. As far as I'm concerned, ensuring that the strings there are well formed is irrelevant - all I'm testing is that an add instruction is emitted that adds the constant 64.

I can make the change and check it in if you're in agreement.


Repository:
  rL LLVM

https://reviews.llvm.org/D24397