r272452 - [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version.
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Fri Jun 10 20:31:14 PDT 2016
Author: ctopper
Date: Fri Jun 10 22:31:13 2016
New Revision: 272452
URL: http://llvm.org/viewvc/llvm-project?rev=272452&view=rev
Log:
[AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version.
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx2intrin.h
cfe/trunk/lib/Headers/avx512bwintrin.h
cfe/trunk/lib/Headers/avx512vlbwintrin.h
cfe/trunk/lib/Sema/SemaChecking.cpp
cfe/trunk/test/CodeGen/avx512bw-builtins.c
cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Fri Jun 10 22:31:13 2016
@@ -1615,12 +1615,6 @@ TARGET_BUILTIN(__builtin_ia32_prorvd128_
TARGET_BUILTIN(__builtin_ia32_prorvd256_mask, "V8iV8iV8iV8iUc","","avx512vl")
TARGET_BUILTIN(__builtin_ia32_prorvq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl")
TARGET_BUILTIN(__builtin_ia32_prorvq256_mask, "V4LLiV4LLiV4LLiV4LLiUc","","avx512vl")
-TARGET_BUILTIN(__builtin_ia32_pshufhw512_mask, "V32sV32sIiV32sUi","","avx512bw")
-TARGET_BUILTIN(__builtin_ia32_pshuflw512_mask, "V32sV32sIiV32sUi","","avx512bw")
-TARGET_BUILTIN(__builtin_ia32_pshufhw128_mask, "V8sV8sIiV8sUc","","avx512bw,avx512vl")
-TARGET_BUILTIN(__builtin_ia32_pshufhw256_mask, "V16sV16sIiV16sUs","","avx512bw,avx512vl")
-TARGET_BUILTIN(__builtin_ia32_pshuflw128_mask, "V8sV8sIiV8sUc","","avx512bw,avx512vl")
-TARGET_BUILTIN(__builtin_ia32_pshuflw256_mask, "V16sV16sIiV16sUs","","avx512bw,avx512vl")
TARGET_BUILTIN(__builtin_ia32_psllv32hi_mask, "V32sV32sV32sV32sUi","","avx512bw")
TARGET_BUILTIN(__builtin_ia32_psllw512_mask, "V32sV32sV8sV32sUi","","avx512bw")
TARGET_BUILTIN(__builtin_ia32_psllwi512_mask, "V32sV32sIiV32sUi","","avx512bw")
Modified: cfe/trunk/lib/Headers/avx2intrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx2intrin.h?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx2intrin.h (original)
+++ cfe/trunk/lib/Headers/avx2intrin.h Fri Jun 10 22:31:13 2016
@@ -522,8 +522,10 @@ _mm256_shuffle_epi8(__m256i __a, __m256i
#define _mm256_shufflelo_epi16(a, imm) __extension__ ({ \
(__m256i)__builtin_shufflevector((__v16hi)(__m256i)(a), \
(__v16hi)_mm256_setzero_si256(), \
- (imm) & 0x3,((imm) & 0xc) >> 2, \
- ((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \
+ 0 + (((imm) & 0x03) >> 0), \
+ 0 + (((imm) & 0x0c) >> 2), \
+ 0 + (((imm) & 0x30) >> 4), \
+ 0 + (((imm) & 0xc0) >> 6), \
4, 5, 6, 7, \
8 + (((imm) & 0x03) >> 0), \
8 + (((imm) & 0x0c) >> 2), \
Modified: cfe/trunk/lib/Headers/avx512bwintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512bwintrin.h?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512bwintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512bwintrin.h Fri Jun 10 22:31:13 2016
@@ -1588,37 +1588,74 @@ _mm512_maskz_cvtepu8_epi16 (__mmask32 __
(__mmask32)(m)); })
#define _mm512_shufflehi_epi16(A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshufhw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)_mm512_setzero_hi(), \
- (__mmask32)-1); })
+ (__m512i)__builtin_shufflevector((__v32hi)(__m512i)(A), \
+ (__v32hi)_mm512_setzero_hi(), \
+ 0, 1, 2, 3, \
+ 4 + (((imm) & 0x03) >> 0), \
+ 4 + (((imm) & 0x0c) >> 2), \
+ 4 + (((imm) & 0x30) >> 4), \
+ 4 + (((imm) & 0xc0) >> 6), \
+ 8, 9, 10, 11, \
+ 12 + (((imm) & 0x03) >> 0), \
+ 12 + (((imm) & 0x0c) >> 2), \
+ 12 + (((imm) & 0x30) >> 4), \
+ 12 + (((imm) & 0xc0) >> 6), \
+ 16, 17, 18, 19, \
+ 20 + (((imm) & 0x03) >> 0), \
+ 20 + (((imm) & 0x0c) >> 2), \
+ 20 + (((imm) & 0x30) >> 4), \
+ 20 + (((imm) & 0xc0) >> 6), \
+ 24, 25, 26, 27, \
+ 28 + (((imm) & 0x03) >> 0), \
+ 28 + (((imm) & 0x0c) >> 2), \
+ 28 + (((imm) & 0x30) >> 4), \
+ 28 + (((imm) & 0xc0) >> 6)); })
#define _mm512_mask_shufflehi_epi16(W, U, A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshufhw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)(__m512i)(W), \
- (__mmask32)(U)); })
-
+ (__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
+ _mm512_shufflehi_epi16((A), (imm)), \
+ (__v32hi)(__m512i)(W)); })
#define _mm512_maskz_shufflehi_epi16(U, A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshufhw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)_mm512_setzero_hi(), \
- (__mmask32)(U)); })
+ (__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
+ _mm512_shufflehi_epi16((A), (imm)), \
+ (__v32hi)_mm512_setzero_hi()); })
#define _mm512_shufflelo_epi16(A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshuflw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)_mm512_setzero_hi(), \
- (__mmask32)-1); })
+ (__m512i)__builtin_shufflevector((__v32hi)(__m512i)(A), \
+ (__v32hi)_mm512_setzero_hi(), \
+ 0 + (((imm) & 0x03) >> 0), \
+ 0 + (((imm) & 0x0c) >> 2), \
+ 0 + (((imm) & 0x30) >> 4), \
+ 0 + (((imm) & 0xc0) >> 6), \
+ 4, 5, 6, 7, \
+ 8 + (((imm) & 0x03) >> 0), \
+ 8 + (((imm) & 0x0c) >> 2), \
+ 8 + (((imm) & 0x30) >> 4), \
+ 8 + (((imm) & 0xc0) >> 6), \
+ 12, 13, 14, 15, \
+ 16 + (((imm) & 0x03) >> 0), \
+ 16 + (((imm) & 0x0c) >> 2), \
+ 16 + (((imm) & 0x30) >> 4), \
+ 16 + (((imm) & 0xc0) >> 6), \
+ 20, 21, 22, 23, \
+ 24 + (((imm) & 0x03) >> 0), \
+ 24 + (((imm) & 0x0c) >> 2), \
+ 24 + (((imm) & 0x30) >> 4), \
+ 24 + (((imm) & 0xc0) >> 6), \
+ 28, 29, 30, 31); })
#define _mm512_mask_shufflelo_epi16(W, U, A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshuflw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)(__m512i)(W), \
- (__mmask32)(U)); })
+ (__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
+ _mm512_shufflelo_epi16((A), (imm)), \
+ (__v32hi)(__m512i)(W)); })
#define _mm512_maskz_shufflelo_epi16(U, A, imm) __extension__ ({ \
- (__m512i)__builtin_ia32_pshuflw512_mask((__v32hi)(__m512i)(A), (int)(imm), \
- (__v32hi)_mm512_setzero_hi(), \
- (__mmask32)(U)); })
+ (__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
+ _mm512_shufflelo_epi16((A), (imm)), \
+ (__v32hi)_mm512_setzero_hi()); })
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_sllv_epi16 (__m512i __A, __m512i __B)
Modified: cfe/trunk/lib/Headers/avx512vlbwintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlbwintrin.h?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512vlbwintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512vlbwintrin.h Fri Jun 10 22:31:13 2016
@@ -2407,49 +2407,44 @@ _mm256_maskz_cvtepu8_epi16 (__mmask16 __
(__mmask16)(m)); })
#define _mm_mask_shufflehi_epi16(W, U, A, imm) __extension__ ({ \
- (__m128i)__builtin_ia32_pshufhw128_mask((__v8hi)(__m128i)(A), (int)(imm), \
- (__v8hi)(__m128i)(W), \
- (__mmask8)(U)); })
+ (__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
+ _mm_shufflehi_epi16((A), (imm)), \
+ (__v8hi)(__m128i)(W)); })
#define _mm_maskz_shufflehi_epi16(U, A, imm) __extension__ ({ \
- (__m128i)__builtin_ia32_pshufhw128_mask((__v8hi)(__m128i)(A), (int)(imm), \
- (__v8hi)_mm_setzero_hi(), \
- (__mmask8)(U)); })
-
+ (__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
+ _mm_shufflehi_epi16((A), (imm)), \
+ (__v8hi)_mm_setzero_hi()); })
#define _mm256_mask_shufflehi_epi16(W, U, A, imm) __extension__ ({ \
- (__m256i)__builtin_ia32_pshufhw256_mask((__v16hi)(__m256i)(A), (int)(imm), \
- (__v16hi)(__m256i)(W), \
- (__mmask16)(U)); })
-
+ (__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
+ _mm256_shufflehi_epi16((A), (imm)), \
+ (__v16hi)(__m256i)(W)); })
#define _mm256_maskz_shufflehi_epi16(U, A, imm) __extension__ ({ \
- (__m256i)__builtin_ia32_pshufhw256_mask((__v16hi)(__m256i)(A), (int)(imm), \
- (__v16hi)_mm256_setzero_si256(), \
- (__mmask16)(U)); })
-
+ (__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
+ _mm256_shufflehi_epi16((A), (imm)), \
+ (__v16hi)_mm256_setzero_si256()); })
#define _mm_mask_shufflelo_epi16(W, U, A, imm) __extension__ ({ \
- (__m128i)__builtin_ia32_pshuflw128_mask((__v8hi)(__m128i)(A), (int)(imm), \
- (__v8hi)(__m128i)(W), \
- (__mmask8)(U)); })
+ (__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
+ _mm_shufflelo_epi16((A), (imm)), \
+ (__v8hi)(__m128i)(W)); })
#define _mm_maskz_shufflelo_epi16(U, A, imm) __extension__ ({ \
- (__m128i)__builtin_ia32_pshuflw128_mask((__v8hi)(__m128i)(A), (int)(imm), \
- (__v8hi)_mm_setzero_hi(), \
- (__mmask8)(U)); })
-
+ (__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
+ _mm_shufflelo_epi16((A), (imm)), \
+ (__v8hi)_mm_setzero_hi()); })
#define _mm256_mask_shufflelo_epi16(W, U, A, imm) __extension__ ({ \
- (__m256i)__builtin_ia32_pshuflw256_mask((__v16hi)(__m256i)(A), (int)(imm), \
- (__v16hi)(__m256i)(W), \
- (__mmask16)(U)); })
-
+ (__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
+ _mm256_shufflelo_epi16((A), (imm)), \
+ (__v16hi)(__m256i)(W)); })
#define _mm256_maskz_shufflelo_epi16(U, A, imm) __extension__ ({ \
- (__m256i)__builtin_ia32_pshuflw256_mask((__v16hi)(__m256i)(A), (int)(imm), \
- (__v16hi)_mm256_setzero_si256(), \
- (__mmask16)(U)); })
+ (__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
+ _mm256_shufflelo_epi16((A), (imm)), \
+ (__v16hi)_mm256_setzero_si256()); })
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_sllv_epi16 (__m256i __A, __m256i __B)
Modified: cfe/trunk/lib/Sema/SemaChecking.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/lib/Sema/SemaChecking.cpp (original)
+++ cfe/trunk/lib/Sema/SemaChecking.cpp Fri Jun 10 22:31:13 2016
@@ -1525,12 +1525,6 @@ bool Sema::CheckX86BuiltinFunctionCall(u
case X86::BI__builtin_ia32_prord256_mask:
case X86::BI__builtin_ia32_prorq128_mask:
case X86::BI__builtin_ia32_prorq256_mask:
- case X86::BI__builtin_ia32_pshufhw512_mask:
- case X86::BI__builtin_ia32_pshuflw512_mask:
- case X86::BI__builtin_ia32_pshufhw128_mask:
- case X86::BI__builtin_ia32_pshufhw256_mask:
- case X86::BI__builtin_ia32_pshuflw128_mask:
- case X86::BI__builtin_ia32_pshuflw256_mask:
case X86::BI__builtin_ia32_psllwi512_mask:
case X86::BI__builtin_ia32_psllwi128_mask:
case X86::BI__builtin_ia32_psllwi256_mask:
Modified: cfe/trunk/test/CodeGen/avx512bw-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512bw-builtins.c?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512bw-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512bw-builtins.c Fri Jun 10 22:31:13 2016
@@ -1079,37 +1079,41 @@ __m512i test_mm512_maskz_cvtepu8_epi16(_
__m512i test_mm512_shufflehi_epi16(__m512i __A) {
// CHECK-LABEL: @test_mm512_shufflehi_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufh.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28>
return _mm512_shufflehi_epi16(__A, 5);
}
__m512i test_mm512_mask_shufflehi_epi16(__m512i __W, __mmask32 __U, __m512i __A) {
// CHECK-LABEL: @test_mm512_mask_shufflehi_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufh.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28>
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_mask_shufflehi_epi16(__W, __U, __A, 5);
}
__m512i test_mm512_maskz_shufflehi_epi16(__mmask32 __U, __m512i __A) {
// CHECK-LABEL: @test_mm512_maskz_shufflehi_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufh.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28>
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_maskz_shufflehi_epi16(__U, __A, 5);
}
__m512i test_mm512_shufflelo_epi16(__m512i __A) {
// CHECK-LABEL: @test_mm512_shufflelo_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufl.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>
return _mm512_shufflelo_epi16(__A, 5);
}
__m512i test_mm512_mask_shufflelo_epi16(__m512i __W, __mmask32 __U, __m512i __A) {
// CHECK-LABEL: @test_mm512_mask_shufflelo_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufl.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_mask_shufflelo_epi16(__W, __U, __A, 5);
}
__m512i test_mm512_maskz_shufflelo_epi16(__mmask32 __U, __m512i __A) {
// CHECK-LABEL: @test_mm512_maskz_shufflelo_epi16
- // CHECK: @llvm.x86.avx512.mask.pshufl.w.512
+ // CHECK: shufflevector <32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15, i32 17, i32 17, i32 16, i32 16, i32 20, i32 21, i32 22, i32 23, i32 25, i32 25, i32 24, i32 24, i32 28, i32 29, i32 30, i32 31>
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
return _mm512_maskz_shufflelo_epi16(__U, __A, 5);
}
Modified: cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vlbw-builtins.c?rev=272452&r1=272451&r2=272452&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vlbw-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vlbw-builtins.c Fri Jun 10 22:31:13 2016
@@ -2391,3 +2391,58 @@ __mmask16 test_mm256_movepi16_mask(__m25
return _mm256_movepi16_mask(__A);
}
+__m128i test_mm_mask_shufflehi_epi16(__m128i __W, __mmask32 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_mask_shufflehi_epi16
+ // CHECK: shufflevector <8 x i16> %2, <8 x i16> %4, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_shufflehi_epi16(__W, __U, __A, 5);
+}
+
+__m128i test_mm_maskz_shufflehi_epi16(__mmask32 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_maskz_shufflehi_epi16
+ // CHECK: shufflevector <8 x i16> %2, <8 x i16> %4, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_shufflehi_epi16(__U, __A, 5);
+}
+
+__m128i test_mm_mask_shufflelo_epi16(__m128i __W, __mmask32 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_mask_shufflelo_epi16
+ // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <8 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_mask_shufflelo_epi16(__W, __U, __A, 5);
+}
+
+__m128i test_mm_maskz_shufflelo_epi16(__mmask32 __U, __m128i __A) {
+ // CHECK-LABEL: @test_mm_maskz_shufflelo_epi16
+ // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> %{{.*}}, <8 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ return _mm_maskz_shufflelo_epi16(__U, __A, 5);
+}
+
+__m256i test_mm256_mask_shufflehi_epi16(__m256i __W, __mmask32 __U, __m256i __A) {
+ // CHECK-LABEL: @test_mm256_mask_shufflehi_epi16
+ // CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_shufflehi_epi16(__W, __U, __A, 5);
+}
+
+__m256i test_mm256_maskz_shufflehi_epi16(__mmask32 __U, __m256i __A) {
+ // CHECK-LABEL: @test_mm256_maskz_shufflehi_epi16
+ // CHECK: shufflevector <16 x i16> %{{.*}}, <16 x i16> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_shufflehi_epi16(__U, __A, 5);
+}
+
+__m256i test_mm256_mask_shufflelo_epi16(__m256i __W, __mmask32 __U, __m256i __A) {
+ // CHECK-LABEL: @test_mm256_mask_shufflelo_epi16
+ // CHECK: shufflevector <16 x i16> %2, <16 x i16> %4, <16 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_mask_shufflelo_epi16(__W, __U, __A, 5);
+}
+
+__m256i test_mm256_maskz_shufflelo_epi16(__mmask32 __U, __m256i __A) {
+ // CHECK-LABEL: @test_mm256_maskz_shufflelo_epi16
+ // CHECK: shufflevector <16 x i16> %2, <16 x i16> %4, <16 x i32> <i32 1, i32 1, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7, i32 9, i32 9, i32 8, i32 8, i32 12, i32 13, i32 14, i32 15>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ return _mm256_maskz_shufflelo_epi16(__U, __A, 5);
+}
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