r270953 - [CodeGen] Don't crash when sizeof(long) != 4 for some intrins

[David Majnemer via cfe-commits]

Author: majnemer
Date: Thu May 26 21:06:19 2016
New Revision: 270953

URL: http://llvm.org/viewvc/llvm-project?rev=270953&view=rev
Log:
[CodeGen] Don't crash when sizeof(long) != 4 for some intrins

_InterlockedIncrement and _InterlockedDecrement have 'long' in their
prototypes.  We assumed 'long' was the same size as an i32 which is
incorrect for other targets.

This fixes PR27892.

Added:
    cfe/trunk/test/CodeGen/pr27892.c
Modified:
    cfe/trunk/lib/CodeGen/CGBuiltin.cpp

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=270953&r1=270952&r2=270953&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu May 26 21:06:19 2016
@@ -1884,22 +1884,24 @@ RValue CodeGenFunction::EmitBuiltinExpr(
       return RValue::get(Builder.CreateExtractValue(CXI, 0));
   }
   case Builtin::BI_InterlockedIncrement: {
+    llvm::Type *IntTy = ConvertType(E->getType());
     AtomicRMWInst *RMWI = Builder.CreateAtomicRMW(
       AtomicRMWInst::Add,
       EmitScalarExpr(E->getArg(0)),
-      ConstantInt::get(Int32Ty, 1),
+      ConstantInt::get(IntTy, 1),
       llvm::AtomicOrdering::SequentiallyConsistent);
     RMWI->setVolatile(true);
-    return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(Int32Ty, 1)));
+    return RValue::get(Builder.CreateAdd(RMWI, ConstantInt::get(IntTy, 1)));
   }
   case Builtin::BI_InterlockedDecrement: {
+    llvm::Type *IntTy = ConvertType(E->getType());
     AtomicRMWInst *RMWI = Builder.CreateAtomicRMW(
       AtomicRMWInst::Sub,
       EmitScalarExpr(E->getArg(0)),
-      ConstantInt::get(Int32Ty, 1),
+      ConstantInt::get(IntTy, 1),
       llvm::AtomicOrdering::SequentiallyConsistent);
     RMWI->setVolatile(true);
-    return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(Int32Ty, 1)));
+    return RValue::get(Builder.CreateSub(RMWI, ConstantInt::get(IntTy, 1)));
   }
   case Builtin::BI_InterlockedExchangeAdd: {
     AtomicRMWInst *RMWI = Builder.CreateAtomicRMW(
@@ -1911,11 +1913,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(
     return RValue::get(RMWI);
   }
   case Builtin::BI__readfsdword: {
+    llvm::Type *IntTy = ConvertType(E->getType());
     Value *IntToPtr =
       Builder.CreateIntToPtr(EmitScalarExpr(E->getArg(0)),
-                             llvm::PointerType::get(CGM.Int32Ty, 257));
+                             llvm::PointerType::get(IntTy, 257));
     LoadInst *Load =
-        Builder.CreateAlignedLoad(IntToPtr, /*Align=*/4, /*isVolatile=*/true);
+        Builder.CreateDefaultAlignedLoad(IntToPtr, /*isVolatile=*/true);
     return RValue::get(Load);
   }
 

Added: cfe/trunk/test/CodeGen/pr27892.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/pr27892.c?rev=270953&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/pr27892.c (added)
+++ cfe/trunk/test/CodeGen/pr27892.c Thu May 26 21:06:19 2016
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -fms-extensions %s -emit-llvm -o - | FileCheck %s
+
+long test1(long *p) {
+  return _InterlockedIncrement(p);
+}
+// CHECK-DAG: define i64 @test1(
+// CHECK:   %[[p_addr:.*]] = alloca i64*, align 8
+// CHECK:   store i64* %p, i64** %[[p_addr]], align 8
+// CHECK:   %[[p_load:.*]] = load i64*, i64** %[[p_addr]], align 8
+// CHECK:   %[[atomic_add:.*]] = atomicrmw volatile add i64* %[[p_load]], i64 1 seq_cst
+// CHECK:   %[[res:.*]] = add i64 %[[atomic_add]], 1
+// CHECK:   ret i64 %[[res]]
+
+long test2(long *p) {
+  return _InterlockedDecrement(p);
+}
+// CHECK-DAG: define i64 @test2(
+// CHECK:   %[[p_addr:.*]] = alloca i64*, align 8
+// CHECK:   store i64* %p, i64** %[[p_addr]], align 8
+// CHECK:   %[[p_load:.*]] = load i64*, i64** %[[p_addr]], align 8
+// CHECK:   %[[atomic_sub:.*]] = atomicrmw volatile sub i64* %[[p_load]], i64 1 seq_cst
+// CHECK:   %[[res:.*]] = sub i64 %[[atomic_sub]], 1
+// CHECK:   ret i64 %[[res]]