[PATCH] D20528: [X86][SSE] Replace lossless i32/f32 to f64 conversion intrinsics with generic IR
Simon Pilgrim via cfe-commits
cfe-commits at lists.llvm.org
Mon May 23 15:02:36 PDT 2016
RKSimon added a comment.
In http://reviews.llvm.org/D20528#437165, @mkuper wrote:
> Presumably, the fast-isel lowering of the IR pattern is already correct, and in any case, it isn't affected by this patch.
> I just want to make sure we don't regress the optimized DAG codegen - that is, it still produces the instruction we'd expect from the intrinsic (or something at least as good).
The existing llvm\test\CodeGen\X86\vec_fpext.ll and llvm\test\CodeGen\X86\vec_int_to_fp.ll already demonstrate the correct optimized DAG codegen using the same IR as output in the clang\test\CodeGen\*-builtins.c here.
Also, the aim is to keep the llvm\test\CodeGen\X86\*-intrinsics-fast-isel.ll tests in sync with the llvm\tools\clang\test\CodeGen\*-builtins.c equivalents.
Repository:
rL LLVM
http://reviews.llvm.org/D20528
More information about the cfe-commits
mailing list