[PATCH] D20528: [X86][SSE] Replace lossless i32/f32 to f64 conversion intrinsics with generic IR

[Simon Pilgrim via cfe-commits]

RKSimon added a comment.

In http://reviews.llvm.org/D20528#436893, @mkuper wrote:

> This looks right, but we may lose some end-to-end tests, since right now we have a clang-level test that checks the builtin is lowered to the intrinsic, and (hopefully) a CG-level test that the intrinsic is lowered to the correct instruction.
>  Do you know if there are already CG tests that check we correctly lower these IR patterns to CVTPS2PD, etc? If not, could you add them?


I do have the relevant changes for llvm\test\CodeGen\X86\sse2-intrinsics-fast-isel.ll and llvm\test\CodeGen\X86\avx-intrinsics-fast-isel.ll (I spent most of last week adding them all.....). Do you want me to setup a separate llvm patch for review? I'm not ready to do the rest of the llvm work (removal of the llvm intrinsics / auto-upgrade etc.). but the fast-isel changes are very simple.


================
Comment at: lib/Headers/emmintrin.h:390
@@ -390,1 +389,3 @@
+  return (__m128d) __builtin_convertvector(
+      __builtin_shufflevector((__v4sf __a, (__v4sf)__a, 0, 1), __v2df);
 }
----------------
mkuper wrote:
> It looks like there's a missing paren after the first __v4sf.
> How does the test compile? Or am I misreading?
Sorry, that's me 'fixing' clang-format which I stupidly forgot to run until just before submission.


Repository:
  rL LLVM

http://reviews.llvm.org/D20528