r267876 - [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
Michael Zuckerman via cfe-commits
cfe-commits at lists.llvm.org
Thu Apr 28 05:47:30 PDT 2016
Author: mzuckerm
Date: Thu Apr 28 07:47:30 2016
New Revision: 267876
URL: http://llvm.org/viewvc/llvm-project?rev=267876&view=rev
Log:
[Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
Differential Revision: http://reviews.llvm.org/D19588
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512bwintrin.h
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/lib/Headers/avx512vlbwintrin.h
cfe/trunk/lib/Headers/avx512vlintrin.h
cfe/trunk/test/CodeGen/avx512bw-builtins.c
cfe/trunk/test/CodeGen/avx512f-builtins.c
cfe/trunk/test/CodeGen/avx512vl-builtins.c
cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Apr 28 07:47:30 2016
@@ -1058,6 +1058,10 @@ TARGET_BUILTIN(__builtin_ia32_vpermt2var
TARGET_BUILTIN(__builtin_ia32_vpermt2varpd512_mask, "V8dV8LLiV8dV8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_alignq512_mask, "V8LLiV8LLiV8LLiIiV8LLiUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_alignd512_mask, "V16iV16iV16iIiV16iUs", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_alignd128_mask, "V4iV4iV4iIiV4iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_alignd256_mask, "V8iV8iV8iIiV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_alignq128_mask, "V2LLiV2LLiV2LLiIiV2LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_alignq256_mask, "V4LLiV4LLiV4LLiIiV4LLiUc","","avx512vl")
TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIiV4dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIiV4fUc", "", "avx512f")
@@ -2207,6 +2211,10 @@ TARGET_BUILTIN(__builtin_ia32_movntdq512
TARGET_BUILTIN(__builtin_ia32_movntdqa512, "V8LLiV8LLi*","","avx512f")
TARGET_BUILTIN(__builtin_ia32_movntpd512, "vd*V8d","","avx512f")
TARGET_BUILTIN(__builtin_ia32_movntps512, "vf*V16f","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_palignr512_mask, "V64cV64cV64ciV64cULLi","","avx512bw")
+TARGET_BUILTIN(__builtin_ia32_palignr128_mask, "V16cV16cV16ciV16cUs","","avx512bw,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_palignr256_mask, "V32cV32cV32ciV32cUi","","avx512bw,avx512vl")
+
#undef BUILTIN
#undef TARGET_BUILTIN
Modified: cfe/trunk/lib/Headers/avx512bwintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512bwintrin.h?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512bwintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512bwintrin.h Thu Apr 28 07:47:30 2016
@@ -2168,6 +2168,29 @@ _mm512_mask_permutexvar_epi16 (__m512i _
(__mmask32) __M);
}
+#define _mm512_alignr_epi8( __A, __B, __N) __extension__ ({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B ,__N * 8,\
+ (__v8di) _mm512_undefined_pd (),\
+ (__mmask64) -1);\
+})
+
+#define _mm512_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B,\
+ __N * 8,\
+ (__v8di) __W,\
+ (__mmask64) __U);\
+})
+
+#define _mm512_maskz_alignr_epi8( __U, __A, __B, __N) __extension__({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B,\
+ __N * 8,\
+ (__v8di) _mm512_setzero_si512 (),\
+ (__mmask64) __U);\
+})
+
#undef __DEFAULT_FN_ATTRS
#endif
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Thu Apr 28 07:47:30 2016
@@ -2550,12 +2550,40 @@ _mm512_permutex2var_ps(__m512 __A, __m51
(I), (__v8di)_mm512_setzero_si512(), \
(__mmask8)-1); })
+#define _mm512_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__({\
+ (__m512i)__builtin_ia32_alignq512_mask ((__v8di) __A,\
+ (__v8di) __B, __imm,\
+ (__v8di) __W,\
+ (__mmask8) __U);\
+})
+
+#define _mm512_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__({\
+ (__m512i)__builtin_ia32_alignq512_mask ((__v8di) __A,\
+ (__v8di) __B, __imm,\
+ (__v8di) _mm512_setzero_si512 (),\
+ (__mmask8) __U);\
+})
+
#define _mm512_alignr_epi32(A, B, I) __extension__ ({ \
- (__m512i)__builtin_ia32_alignd512_mask((__v16si)(__m512i)(A), \
+ (__m512i)__builtin_ia32_alignd512_mask((__v16si)(__m512i)(A), \
(__v16si)(__m512i)(B), \
(I), (__v16si)_mm512_setzero_si512(), \
- (__mmask16)-1); })
+ (__mmask16)-1);\
+})
+
+#define _mm512_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({\
+ (__m512i) __builtin_ia32_alignd512_mask((__v16si) __A,\
+ (__v16si) __B, __imm,\
+ (__v16si) __W,\
+ (__mmask16) __U);\
+})
+#define _mm512_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__({\
+ (__m512i) __builtin_ia32_alignd512_mask ((__v16si) __A,\
+ (__v16si) __B, __imm,\
+ (__v16si) _mm512_setzero_si512 (),\
+ (__mmask16) __U);\
+})
/* Vector Extract */
#define _mm512_extractf64x4_pd(A, I) __extension__ ({ \
Modified: cfe/trunk/lib/Headers/avx512vlbwintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlbwintrin.h?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512vlbwintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512vlbwintrin.h Thu Apr 28 07:47:30 2016
@@ -3358,6 +3358,40 @@ _mm256_mask_permutexvar_epi16 (__m256i _
(__mmask16) __M);
}
+#define _mm_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr128_mask ((__v2di)( __A),\
+ (__v2di)( __B),\
+ ( __N) * 8,\
+ (__v2di)( __W),\
+ (__mmask16)( __U));\
+})
+
+#define _mm_maskz_alignr_epi8( __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr128_mask ((__v2di)( __A),\
+ (__v2di)( __B),\
+ ( __N) * 8,\
+ (__v2di)\
+ _mm_setzero_si128 (),\
+ (__mmask16)( __U));\
+})
+
+#define _mm256_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr256_mask ((__v4di)( __A),\
+ (__v4di)( __B),\
+ ( __N) * 8,\
+ (__v4di)( __W),\
+ (__mmask32)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi8( __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr256_mask ((__v4di)( __A),\
+ (__v4di)( __B),\
+ ( __N) * 8,\
+ (__v4di)\
+ _mm256_setzero_si256 (),\
+ (__mmask32)( __U));\
+})
+
#undef __DEFAULT_FN_ATTRS
#endif /* __AVX512VLBWINTRIN_H */
Modified: cfe/trunk/lib/Headers/avx512vlintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlintrin.h?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512vlintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512vlintrin.h Thu Apr 28 07:47:30 2016
@@ -9209,6 +9209,90 @@ _mm256_permutexvar_epi32 (__m256i __X, _
(__mmask8) -1);
}
+#define _mm_alignr_epi32( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si) _mm_undefined_si128 (),\
+ (__mmask8) -1);\
+})
+
+#define _mm_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si) _mm_setzero_si128 (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_alignr_epi32( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si) _mm256_undefined_si256 (),\
+ (__mmask8) -1);\
+})
+
+#define _mm256_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si) _mm256_setzero_si256 (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_alignr_epi64( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di) _mm_setzero_di (),\
+ (__mmask8) -1);\
+})
+
+#define _mm_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di) _mm_setzero_di (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_alignr_epi64( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di) _mm256_undefined_pd (),\
+ (__mmask8) -1);\
+})
+
+#define _mm256_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di) _mm256_setzero_si256 (),\
+ (__mmask8)( __U));\
+})
+
#undef __DEFAULT_FN_ATTRS
#undef __DEFAULT_FN_ATTRS_BOTH
Modified: cfe/trunk/test/CodeGen/avx512bw-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512bw-builtins.c?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512bw-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512bw-builtins.c Thu Apr 28 07:47:30 2016
@@ -1487,3 +1487,23 @@ __m512i test_mm512_mask_permutexvar_epi1
// CHECK: @llvm.x86.avx512.mask.permvar.hi.512
return _mm512_mask_permutexvar_epi16(__W, __M, __A, __B);
}
+__m512i test_mm512_alignr_epi8(__m512i __A,__m512i __B){
+ // CHECK-LABEL: @test_mm512_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.512
+ return _mm512_alignr_epi8(__A, __B, 2);
+}
+
+__m512i test_mm512_mask_alignr_epi8(__m512i __W, __mmask64 __U, __m512i __A,__m512i __B){
+ // CHECK-LABEL: @test_mm512_mask_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.512
+ return _mm512_mask_alignr_epi8(__W, __U, __A, __B, 2);
+}
+
+__m512i test_mm512_maskz_alignr_epi8(__mmask64 __U, __m512i __A,__m512i __B){
+ // CHECK-LABEL: @test_mm512_maskz_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.512
+ return _mm512_maskz_alignr_epi8(__U, __A, __B, 2);
+}
+
+
+
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Thu Apr 28 07:47:30 2016
@@ -180,6 +180,20 @@ __m512i test_mm512_alignr_epi32(__m512i
return _mm512_alignr_epi32(a, b, 2);
}
+__m512i test_mm512_mask_alignr_epi32(__m512i w, __mmask16 u, __m512i a, __m512i b)
+{
+ // CHECK-LABEL: @test_mm512_mask_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.512
+ return _mm512_mask_alignr_epi32(w, u, a, b, 2);
+}
+
+__m512i test_mm512_maskz_alignr_epi32( __mmask16 u, __m512i a, __m512i b)
+{
+ // CHECK-LABEL: @test_mm512_maskz_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.512
+ return _mm512_maskz_alignr_epi32(u, a, b, 2);
+}
+
__m512i test_mm512_alignr_epi64(__m512i a, __m512i b)
{
// CHECK-LABEL: @test_mm512_alignr_epi64
@@ -187,6 +201,20 @@ __m512i test_mm512_alignr_epi64(__m512i
return _mm512_alignr_epi64(a, b, 2);
}
+__m512i test_mm512_mask_alignr_epi64(__m512i w, __mmask8 u, __m512i a, __m512i b)
+{
+ // CHECK-LABEL: @test_mm512_mask_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.512
+ return _mm512_mask_alignr_epi64(w, u, a, b, 2);
+}
+
+__m512i test_mm512_maskz_alignr_epi64( __mmask8 u, __m512i a, __m512i b)
+{
+ // CHECK-LABEL: @test_mm512_maskz_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.512
+ return _mm512_maskz_alignr_epi64(u, a, b, 2);
+}
+
__m512d test_mm512_broadcastsd_pd(__m128d a)
{
// CHECK-LABEL: @test_mm512_broadcastsd_pd
Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Thu Apr 28 07:47:30 2016
@@ -6461,3 +6461,75 @@ __m256i test_mm256_mask_permutexvar_epi3
// CHECK: @llvm.x86.avx512.mask.permvar.si.256
return _mm256_mask_permutexvar_epi32(__W, __M, __X, __Y);
}
+
+__m128i test_mm_alignr_epi32(__m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.128
+ return _mm_alignr_epi32(__A, __B, 1);
+}
+
+__m128i test_mm_mask_alignr_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.128
+ return _mm_mask_alignr_epi32(__W, __U, __A, __B, 1);
+}
+
+__m128i test_mm_maskz_alignr_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.128
+ return _mm_maskz_alignr_epi32(__U, __A, __B, 1);
+}
+
+__m256i test_mm256_alignr_epi32(__m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.256
+ return _mm256_alignr_epi32(__A, __B, 1);
+}
+
+__m256i test_mm256_mask_alignr_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.256
+ return _mm256_mask_alignr_epi32(__W, __U, __A, __B, 1);
+}
+
+__m256i test_mm256_maskz_alignr_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_alignr_epi32
+ // CHECK: @llvm.x86.avx512.mask.valign.d.256
+ return _mm256_maskz_alignr_epi32(__U, __A, __B, 1);
+}
+
+__m128i test_mm_alignr_epi64(__m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.128
+ return _mm_alignr_epi64(__A, __B, 1);
+}
+
+__m128i test_mm_mask_alignr_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.128
+ return _mm_mask_alignr_epi64(__W, __U, __A, __B, 1);
+}
+
+__m128i test_mm_maskz_alignr_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.128
+ return _mm_maskz_alignr_epi64(__U, __A, __B, 1);
+}
+
+__m256i test_mm256_alignr_epi64(__m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.256
+ return _mm256_alignr_epi64(__A, __B, 1);
+}
+
+__m256i test_mm256_mask_alignr_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.256
+ return _mm256_mask_alignr_epi64(__W, __U, __A, __B, 1);
+}
+
+__m256i test_mm256_maskz_alignr_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_alignr_epi64
+ // CHECK: @llvm.x86.avx512.mask.valign.q.256
+ return _mm256_maskz_alignr_epi64(__U, __A, __B, 1);
+}
Modified: cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vlbw-builtins.c?rev=267876&r1=267875&r2=267876&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vlbw-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vlbw-builtins.c Thu Apr 28 07:47:30 2016
@@ -2316,3 +2316,27 @@ __m256i test_mm256_mask_permutexvar_epi1
// CHECK: @llvm.x86.avx512.mask.permvar.hi.256
return _mm256_mask_permutexvar_epi16(__W, __M, __A, __B);
}
+__m128i test_mm_mask_alignr_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.128
+ return _mm_mask_alignr_epi8(__W, __U, __A, __B, 2);
+}
+
+__m128i test_mm_maskz_alignr_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.128
+ return _mm_maskz_alignr_epi8(__U, __A, __B, 2);
+}
+
+__m256i test_mm256_mask_alignr_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.256
+ return _mm256_mask_alignr_epi8(__W, __U, __A, __B, 2);
+}
+
+__m256i test_mm256_maskz_alignr_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_alignr_epi8
+ // CHECK: @llvm.x86.avx512.mask.palignr.256
+ return _mm256_maskz_alignr_epi8(__U, __A, __B, 2);
+}
+
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