r264149 - [X86] Add "x87" in x86 target feature map.
Andrey Turetskiy via cfe-commits
cfe-commits at lists.llvm.org
Wed Mar 23 04:15:11 PDT 2016
Author: aturetsk
Date: Wed Mar 23 06:15:10 2016
New Revision: 264149
URL: http://llvm.org/viewvc/llvm-project?rev=264149&view=rev
Log:
[X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980
Added:
cfe/trunk/test/CodeGen/attr-target-x87-softfp.c (with props)
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/CodeGen/attr-target-x86-mmx.c
cfe/trunk/test/CodeGen/attr-target-x86.c
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=264149&r1=264148&r2=264149&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Mar 23 06:15:10 2016
@@ -2585,6 +2585,9 @@ bool X86TargetInfo::initFeatureMap(
if (getTriple().getArch() == llvm::Triple::x86_64)
setFeatureEnabledImpl(Features, "sse2", true);
+ // Enable X87 for all X86 processors.
+ setFeatureEnabledImpl(Features, "x87", true);
+
switch (getCPUKind(CPU)) {
case CK_Generic:
case CK_i386:
Modified: cfe/trunk/test/CodeGen/attr-target-x86-mmx.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target-x86-mmx.c?rev=264149&r1=264148&r2=264149&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/attr-target-x86-mmx.c (original)
+++ cfe/trunk/test/CodeGen/attr-target-x86-mmx.c Wed Mar 23 06:15:10 2016
@@ -19,4 +19,4 @@ void __attribute__((target("sse"))) shif
_mm_srai_pi32(a, c);
}
-// CHECK: "target-features"="+mmx,+sse"
+// CHECK: "target-features"="+mmx,+sse,+x87"
Modified: cfe/trunk/test/CodeGen/attr-target-x86.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target-x86.c?rev=264149&r1=264148&r2=264149&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/attr-target-x86.c (original)
+++ cfe/trunk/test/CodeGen/attr-target-x86.c Wed Mar 23 06:15:10 2016
@@ -31,9 +31,9 @@ int __attribute__((target("no-mmx"))) qq
// CHECK: qux{{.*}} #1
// CHECK: qax{{.*}} #4
// CHECK: qq{{.*}} #5
-// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2"
-// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt"
-// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
-// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
-// CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+xsave,+xsaveopt,-aes"
-// CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,-3dnow,-3dnowa,-mmx"
+// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87"
+// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
+// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+x87,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
+// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
+// CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes"
+// CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,+x87,-3dnow,-3dnowa,-mmx"
Added: cfe/trunk/test/CodeGen/attr-target-x87-softfp.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target-x87-softfp.c?rev=264149&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/attr-target-x87-softfp.c (added)
+++ cfe/trunk/test/CodeGen/attr-target-x87-softfp.c Wed Mar 23 06:15:10 2016
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu x86-64 -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=HARD
+// RUN: %clang_cc1 -msoft-float -triple x86_64-linux-gnu -target-cpu x86-64 -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT
+
+int __attribute__((target("x87"))) foo(int a) { return 4; }
+int __attribute__((target("no-x87"))) bar(int a) { return 4; }
+
+// CHECK: foo{{.*}} #0
+// CHECK: bar{{.*}} #1
+
+// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87"
+// HARD: "use-soft-float"="false"
+// SOFT: "use-soft-float"="true"
+
+// CHECK: #1 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,-x87"
+// HARD: "use-soft-float"="false"
+// SOFT: "use-soft-float"="true"
Propchange: cfe/trunk/test/CodeGen/attr-target-x87-softfp.c
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: cfe/trunk/test/CodeGen/attr-target-x87-softfp.c
------------------------------------------------------------------------------
svn:keywords = Author Date Id Rev URL
Propchange: cfe/trunk/test/CodeGen/attr-target-x87-softfp.c
------------------------------------------------------------------------------
svn:mime-type = text/plain
More information about the cfe-commits
mailing list