r259639 - -inline-asm][X86] Add ability to use AVX512 in MS inline asm
Marina Yatsina via cfe-commits
cfe-commits at lists.llvm.org
Wed Feb 3 03:32:08 PST 2016
Author: myatsina
Date: Wed Feb 3 05:32:08 2016
New Revision: 259639
URL: http://llvm.org/viewvc/llvm-project?rev=259639&view=rev
Log:
-inline-asm][X86] Add ability to use AVX512 in MS inline asm
Defined the new AVX512 registers in clang inline asm.
Fixed a bug in the MC subtarget info creation during the parsing of MS asm statement - now it receives the actual CPU and target features information.
Differential Revision: http://reviews.llvm.org/D16757
Added:
cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c (with props)
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Parse/ParseStmtAsm.cpp
cfe/trunk/test/Sema/asm.c
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=259639&r1=259638&r2=259639&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Feb 3 05:32:08 2016
@@ -2047,6 +2047,14 @@ static const char* const GCCRegNames[] =
"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
"ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
"ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
+ "xmm16", "xmm17", "xmm18", "xmm19", "xmm20", "xmm21", "xmm22", "xmm23",
+ "xmm24", "xmm25", "xmm26", "xmm27", "xmm28", "xmm29", "xmm30", "xmm31",
+ "ymm16", "ymm17", "ymm18", "ymm19", "ymm20", "ymm21", "ymm22", "ymm23",
+ "ymm24", "ymm25", "ymm26", "ymm27", "ymm28", "ymm29", "ymm30", "ymm31",
+ "zmm0", "zmm1", "zmm2", "zmm3", "zmm4", "zmm5", "zmm6", "zmm7",
+ "zmm8", "zmm9", "zmm10", "zmm11", "zmm12", "zmm13", "zmm14", "zmm15",
+ "zmm16", "zmm17", "zmm18", "zmm19", "zmm20", "zmm21", "zmm22", "zmm23",
+ "zmm24", "zmm25", "zmm26", "zmm27", "zmm28", "zmm29", "zmm30", "zmm31",
};
const TargetInfo::AddlRegName AddlRegNames[] = {
Modified: cfe/trunk/lib/Parse/ParseStmtAsm.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Parse/ParseStmtAsm.cpp?rev=259639&r1=259638&r2=259639&view=diff
==============================================================================
--- cfe/trunk/lib/Parse/ParseStmtAsm.cpp (original)
+++ cfe/trunk/lib/Parse/ParseStmtAsm.cpp Wed Feb 3 05:32:08 2016
@@ -17,6 +17,7 @@
#include "clang/Basic/Diagnostic.h"
#include "clang/Basic/TargetInfo.h"
#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCInstPrinter.h"
@@ -522,13 +523,17 @@ StmtResult Parser::ParseMicrosoftAsmStat
if (buildMSAsmString(PP, AsmLoc, AsmToks, TokOffsets, AsmString))
return StmtError();
+ TargetOptions TO = Actions.Context.getTargetInfo().getTargetOpts();
+ std::string FeaturesStr =
+ llvm::join(TO.Features.begin(), TO.Features.end(), ",");
+
std::unique_ptr<llvm::MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TT));
std::unique_ptr<llvm::MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TT));
// Get the instruction descriptor.
std::unique_ptr<llvm::MCInstrInfo> MII(TheTarget->createMCInstrInfo());
std::unique_ptr<llvm::MCObjectFileInfo> MOFI(new llvm::MCObjectFileInfo());
std::unique_ptr<llvm::MCSubtargetInfo> STI(
- TheTarget->createMCSubtargetInfo(TT, "", ""));
+ TheTarget->createMCSubtargetInfo(TT, TO.CPU, FeaturesStr));
llvm::SourceMgr TempSrcMgr;
llvm::MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &TempSrcMgr);
Added: cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c?rev=259639&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c (added)
+++ cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c Wed Feb 3 05:32:08 2016
@@ -0,0 +1,11 @@
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 %s -triple x86_64-pc-windows-msvc -target-cpu knl -fasm-blocks -emit-llvm -o - | FileCheck %s
+
+void t1() {
+// CHECK: @t1
+// CHECK: call void asm sideeffect inteldialect "vaddpd zmm8, zmm27, zmm6", "~{zmm8},~{dirflag},~{fpsr},~{flags}"()
+// CHECK: ret void
+ __asm {
+ vaddpd zmm8, zmm27, zmm6
+ }
+}
Propchange: cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c
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Propchange: cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c
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svn:keywords = Author Date Id Rev URL
Propchange: cfe/trunk/test/CodeGen/ms-inline-asm-avx512.c
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Modified: cfe/trunk/test/Sema/asm.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/asm.c?rev=259639&r1=259638&r2=259639&view=diff
==============================================================================
--- cfe/trunk/test/Sema/asm.c (original)
+++ cfe/trunk/test/Sema/asm.c Wed Feb 3 05:32:08 2016
@@ -25,7 +25,7 @@ void clobbers() {
asm ("nop" : : : "0", "%0", "#0");
asm ("nop" : : : "foo"); // expected-error {{unknown register name 'foo' in asm}}
asm ("nop" : : : "52");
- asm ("nop" : : : "104"); // expected-error {{unknown register name '104' in asm}}
+ asm ("nop" : : : "204"); // expected-error {{unknown register name '204' in asm}}
asm ("nop" : : : "-1"); // expected-error {{unknown register name '-1' in asm}}
asm ("nop" : : : "+1"); // expected-error {{unknown register name '+1' in asm}}
}
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