[PATCH] D16586: Make clang AAPCS compliant w.r.t volatile bitfield accesses
Richard Smith via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 1 17:00:53 PST 2016
rsmith added a subscriber: rsmith.
================
Comment at: test/CodeGen/aapcs-bitfield.c:312-317
@@ +311,8 @@
+
+ // BE: %[[PTR3:.*]] = bitcast %struct.st5a* %[[PTR2]] to i32*
+ // BE-NEXT: %[[LD:.*]] = load volatile i32, i32* %[[PTR3]], align 4
+ // BE-NEXT: %[[CLR:.*]] = and i32 %[[LD]], -16252929
+ // BE-NEXT: %[[SET:.*]] = or i32 %[[CLR]], 1572864
+ // BE-NEXT: store volatile i32 %[[SET]], i32* %[[PTR3]], align 4
+ m->y.b = 3;
+}
----------------
This violates the C and C++ object models by creating a data race on `m->y.a` that was not present in the source code. A store to a bit-field cannot write to bytes that are not part of the same sequence of bit-field members. If this ABI really requires that (and supports multi-threaded systems), it is not a correct ABI for C11 nor C++11. (This leaves open the question of which standard we should follow...)
http://reviews.llvm.org/D16586
More information about the cfe-commits
mailing list