r246985 - Compute and preserve alignment more faithfully in IR-generation.
John McCall via cfe-commits
cfe-commits at lists.llvm.org
Tue Sep 29 17:06:27 PDT 2015
> On Sep 28, 2015, at 9:19 PM, Yung, Douglas <douglas_yung at playstation.sony.com> wrote:
> Hi John,
>
> Sorry for the late notice, but we just received this change in our internal branch and tracked a failure to this change you made.
>
> I have filed PR24982 with details of the issue.
The new code is correct. The source operand only has alignment 4, and so the memcpy cannot safely have alignment 16.
John.
>
> Douglas Yung
>
> -----Original Message-----
> From: cfe-commits [mailto:cfe-commits-bounces at lists.llvm.org] On Behalf Of John McCall via cfe-commits
> Sent: Tuesday, September 08, 2015 1:06 AM
> To: cfe-commits at lists.llvm.org
> Subject: r246985 - Compute and preserve alignment more faithfully in IR-generation.
>
> Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
> +++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Tue Sep 8 03:05:57 2015
> @@ -39,7 +39,7 @@ static void AssignToArrayRange(CodeGen::
> for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
> llvm::Value *Cell =
> Builder.CreateConstInBoundsGEP1_32(Builder.getInt8Ty(), Array, I);
> - Builder.CreateStore(Value, Cell);
> + Builder.CreateAlignedStore(Value, Cell, CharUnits::One());
> }
> }
>
> @@ -48,6 +48,19 @@ static bool isAggregateTypeForABI(QualTy
> T->isMemberFunctionPointerType();
> }
>
> +ABIArgInfo
> +ABIInfo::getNaturalAlignIndirect(QualType Ty, bool ByRef, bool Realign,
> + llvm::Type *Padding) const {
> + return ABIArgInfo::getIndirect(getContext().getTypeAlignInChars(Ty),
> + ByRef, Realign, Padding);
> +}
> +
> +ABIArgInfo
> +ABIInfo::getNaturalAlignIndirectInReg(QualType Ty, bool Realign) const {
> + return ABIArgInfo::getIndirectInReg(getContext().getTypeAlignInChars(Ty),
> + /*ByRef*/ false, Realign);
> +}
> +
> ABIInfo::~ABIInfo() {}
>
> static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT,
> @@ -133,7 +146,7 @@ void ABIArgInfo::dump() const {
> OS << "InAlloca Offset=" << getInAllocaFieldIndex();
> break;
> case Indirect:
> - OS << "Indirect Align=" << getIndirectAlign()
> + OS << "Indirect Align=" << getIndirectAlign().getQuantity()
> << " ByVal=" << getIndirectByVal()
> << " Realign=" << getIndirectRealign();
> break;
> @@ -144,6 +157,125 @@ void ABIArgInfo::dump() const {
> OS << ")\n";
> }
>
> +/// Emit va_arg for a platform using the common void* representation,
> +/// where arguments are simply emitted in an array of slots on the stack.
> +///
> +/// This version implements the core direct-value passing rules.
> +///
> +/// \param SlotSize - The size and alignment of a stack slot.
> +/// Each argument will be allocated to a multiple of this number of
> +/// slots, and all the slots will be aligned to this value.
> +/// \param AllowHigherAlign - The slot alignment is not a cap;
> +/// an argument type with an alignment greater than the slot size
> +/// will be emitted on a higher-alignment address, potentially
> +/// leaving one or more empty slots behind as padding. If this
> +/// is false, the returned address might be less-aligned than
> +/// DirectAlign.
> +static Address emitVoidPtrDirectVAArg(CodeGenFunction &CGF,
> + Address VAListAddr,
> + llvm::Type *DirectTy,
> + CharUnits DirectSize,
> + CharUnits DirectAlign,
> + CharUnits SlotSize,
> + bool AllowHigherAlign) {
> + // Cast the element type to i8* if necessary. Some platforms define
> + // va_list as a struct containing an i8* instead of just an i8*.
> + if (VAListAddr.getElementType() != CGF.Int8PtrTy)
> + VAListAddr = CGF.Builder.CreateElementBitCast(VAListAddr, CGF.Int8PtrTy);
> +
> + llvm::Value *Ptr = CGF.Builder.CreateLoad(VAListAddr, "argp.cur");
> +
> + // If the CC aligns values higher than the slot size, do so if needed.
> + Address Addr = Address::invalid();
> + if (AllowHigherAlign && DirectAlign > SlotSize) {
> + llvm::Value *PtrAsInt = Ptr;
> + PtrAsInt = CGF.Builder.CreatePtrToInt(PtrAsInt, CGF.IntPtrTy);
> + PtrAsInt = CGF.Builder.CreateAdd(PtrAsInt,
> + llvm::ConstantInt::get(CGF.IntPtrTy, DirectAlign.getQuantity() - 1));
> + PtrAsInt = CGF.Builder.CreateAnd(PtrAsInt,
> + llvm::ConstantInt::get(CGF.IntPtrTy, -DirectAlign.getQuantity()));
> + Addr = Address(CGF.Builder.CreateIntToPtr(PtrAsInt, Ptr->getType(),
> + "argp.cur.aligned"),
> + DirectAlign);
> + } else {
> + Addr = Address(Ptr, SlotSize);
> + }
> +
> + // Advance the pointer past the argument, then store that back.
> + CharUnits FullDirectSize = DirectSize.RoundUpToAlignment(SlotSize);
> + llvm::Value *NextPtr =
> + CGF.Builder.CreateConstInBoundsByteGEP(Addr.getPointer(), FullDirectSize,
> + "argp.next");
> + CGF.Builder.CreateStore(NextPtr, VAListAddr);
> +
> + // If the argument is smaller than a slot, and this is a big-endian
> + // target, the argument will be right-adjusted in its slot.
> + if (DirectSize < SlotSize && CGF.CGM.getDataLayout().isBigEndian()) {
> + Addr = CGF.Builder.CreateConstInBoundsByteGEP(Addr, SlotSize - DirectSize);
> + }
> +
> + Addr = CGF.Builder.CreateElementBitCast(Addr, DirectTy);
> + return Addr;
> +}
> +
> +/// Emit va_arg for a platform using the common void* representation,
> +/// where arguments are simply emitted in an array of slots on the stack.
> +///
> +/// \param IsIndirect - Values of this type are passed indirectly.
> +/// \param ValueInfo - The size and alignment of this type, generally
> +/// computed with getContext().getTypeInfoInChars(ValueTy).
> +/// \param SlotSizeAndAlign - The size and alignment of a stack slot.
> +/// Each argument will be allocated to a multiple of this number of
> +/// slots, and all the slots will be aligned to this value.
> +/// \param AllowHigherAlign - The slot alignment is not a cap;
> +/// an argument type with an alignment greater than the slot size
> +/// will be emitted on a higher-alignment address, potentially
> +/// leaving one or more empty slots behind as padding.
> +static Address emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType ValueTy, bool IsIndirect,
> + std::pair<CharUnits, CharUnits> ValueInfo,
> + CharUnits SlotSizeAndAlign,
> + bool AllowHigherAlign) {
> + // The size and alignment of the value that was passed directly.
> + CharUnits DirectSize, DirectAlign;
> + if (IsIndirect) {
> + DirectSize = CGF.getPointerSize();
> + DirectAlign = CGF.getPointerAlign();
> + } else {
> + DirectSize = ValueInfo.first;
> + DirectAlign = ValueInfo.second;
> + }
> +
> + // Cast the address we've calculated to the right type.
> + llvm::Type *DirectTy = CGF.ConvertTypeForMem(ValueTy);
> + if (IsIndirect)
> + DirectTy = DirectTy->getPointerTo(0);
> +
> + Address Addr = emitVoidPtrDirectVAArg(CGF, VAListAddr, DirectTy,
> + DirectSize, DirectAlign,
> + SlotSizeAndAlign,
> + AllowHigherAlign);
> +
> + if (IsIndirect) {
> + Addr = Address(CGF.Builder.CreateLoad(Addr), ValueInfo.second);
> + }
> +
> + return Addr;
> +
> +}
> +
> +static Address emitMergePHI(CodeGenFunction &CGF,
> + Address Addr1, llvm::BasicBlock *Block1,
> + Address Addr2, llvm::BasicBlock *Block2,
> + const llvm::Twine &Name = "") {
> + assert(Addr1.getType() == Addr2.getType());
> + llvm::PHINode *PHI = CGF.Builder.CreatePHI(Addr1.getType(), 2, Name);
> + PHI->addIncoming(Addr1.getPointer(), Block1);
> + PHI->addIncoming(Addr2.getPointer(), Block2);
> + CharUnits Align = std::min(Addr1.getAlignment(), Addr2.getAlignment());
> + return Address(PHI, Align);
> +}
> +
> TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
>
> // If someone can figure out a general rule for this, that would be great.
> @@ -394,8 +526,8 @@ public:
> I.info = classifyArgumentType(I.type);
> }
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -404,9 +536,9 @@ public:
> : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
> };
>
> -llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - return nullptr;
> +Address DefaultABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + return Address::invalid();
> }
>
> ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
> @@ -416,9 +548,9 @@ ABIArgInfo DefaultABIInfo::classifyArgum
> // Records with non-trivial destructors/copy-constructors should not be
> // passed by value.
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(Ty);
> }
>
> // Treat an enum type as its underlying type.
> @@ -434,7 +566,7 @@ ABIArgInfo DefaultABIInfo::classifyRetur
> return ABIArgInfo::getIgnore();
>
> if (isAggregateTypeForABI(RetTy))
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
>
> // Treat an enum type as its underlying type.
> if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
> @@ -482,10 +614,8 @@ ABIArgInfo WebAssemblyABIInfo::classifyA
> if (isAggregateTypeForABI(Ty)) {
> // Records with non-trivial destructors/copy-constructors should not be
> // passed by value.
> - unsigned TypeAlign = getContext().getTypeAlignInChars(Ty).getQuantity();
> if (auto RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(TypeAlign,
> - RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
> // Ignore empty structs/unions.
> if (isEmptyRecord(getContext(), Ty, true))
> return ABIArgInfo::getIgnore();
> @@ -494,7 +624,7 @@ ABIArgInfo WebAssemblyABIInfo::classifyA
> // though watch out for things like bitfields.
> if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
> return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
> - return ABIArgInfo::getIndirect(TypeAlign);
> + return getNaturalAlignIndirect(Ty);
> }
>
> // Otherwise just do the default thing.
> @@ -536,8 +666,8 @@ class PNaClABIInfo : public ABIInfo {
> ABIArgInfo classifyArgumentType(QualType RetTy) const;
>
> void computeInfo(CGFunctionInfo &FI) const override;
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF,
> + Address VAListAddr, QualType Ty) const override;
> };
>
> class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -554,17 +684,17 @@ void PNaClABIInfo::computeInfo(CGFunctio
> I.info = classifyArgumentType(I.type);
> }
>
> -llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - return nullptr;
> +Address PNaClABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + return Address::invalid();
> }
>
> /// \brief Classify argument of given type \p Ty.
> ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
> if (isAggregateTypeForABI(Ty)) {
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty);
> } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
> // Treat an enum type as its underlying type.
> Ty = EnumTy->getDecl()->getIntegerType();
> @@ -583,7 +713,7 @@ ABIArgInfo PNaClABIInfo::classifyReturnT
>
> // In the PNaCl ABI we always return records/structures on the stack.
> if (isAggregateTypeForABI(RetTy))
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
>
> // Treat an enum type as its underlying type.
> if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
> @@ -687,7 +817,7 @@ class X86_32ABIInfo : public ABIInfo {
> /// such that the argument will be passed in memory.
> ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
>
> - ABIArgInfo getIndirectReturnResult(CCState &State) const;
> + ABIArgInfo getIndirectReturnResult(QualType Ty, CCState &State) const;
>
> /// \brief Return the alignment to use for the given type on the stack.
> unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
> @@ -702,14 +832,14 @@ class X86_32ABIInfo : public ABIInfo {
> void rewriteWithInAlloca(CGFunctionInfo &FI) const;
>
> void addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
> - unsigned &StackOffset, ABIArgInfo &Info,
> + CharUnits &StackOffset, ABIArgInfo &Info,
> QualType Type) const;
>
> public:
>
> void computeInfo(CGFunctionInfo &FI) const override;
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
>
> X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w,
> unsigned r)
> @@ -893,14 +1023,14 @@ bool X86_32ABIInfo::shouldReturnTypeInRe
> return true;
> }
>
> -ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const {
> +ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(QualType RetTy, CCState &State) const {
> // If the return value is indirect, then the hidden argument is consuming one
> // integer register.
> if (State.FreeRegs) {
> --State.FreeRegs;
> - return ABIArgInfo::getIndirectInReg(/*Align=*/0, /*ByVal=*/false);
> + return getNaturalAlignIndirectInReg(RetTy);
> }
> - return ABIArgInfo::getIndirect(/*Align=*/0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(RetTy, /*ByVal=*/false);
> }
>
> ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
> @@ -935,7 +1065,7 @@ ABIArgInfo X86_32ABIInfo::classifyReturn
> return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
> Size));
>
> - return getIndirectReturnResult(State);
> + return getIndirectReturnResult(RetTy, State);
> }
>
> return ABIArgInfo::getDirect();
> @@ -945,12 +1075,12 @@ ABIArgInfo X86_32ABIInfo::classifyReturn
> if (const RecordType *RT = RetTy->getAs<RecordType>()) {
> // Structures with flexible arrays are always indirect.
> if (RT->getDecl()->hasFlexibleArrayMember())
> - return getIndirectReturnResult(State);
> + return getIndirectReturnResult(RetTy, State);
> }
>
> // If specified, structs and unions are always indirect.
> if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
> - return getIndirectReturnResult(State);
> + return getIndirectReturnResult(RetTy, State);
>
> // Small structures which are register sized are generally returned
> // in a register.
> @@ -972,7 +1102,7 @@ ABIArgInfo X86_32ABIInfo::classifyReturn
> return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
> }
>
> - return getIndirectReturnResult(State);
> + return getIndirectReturnResult(RetTy, State);
> }
>
> // Treat an enum type as its underlying type.
> @@ -1038,21 +1168,22 @@ ABIArgInfo X86_32ABIInfo::getIndirectRes
> if (!ByVal) {
> if (State.FreeRegs) {
> --State.FreeRegs; // Non-byval indirects just use one pointer.
> - return ABIArgInfo::getIndirectInReg(0, false);
> + return getNaturalAlignIndirectInReg(Ty);
> }
> - return ABIArgInfo::getIndirect(0, false);
> + return getNaturalAlignIndirect(Ty, false);
> }
>
> // Compute the byval alignment.
> unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
> unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
> if (StackAlign == 0)
> - return ABIArgInfo::getIndirect(4, /*ByVal=*/true);
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(4), /*ByVal=*/true);
>
> // If the stack alignment is less than the type alignment, realign the
> // argument.
> bool Realign = TypeAlign > StackAlign;
> - return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, Realign);
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(StackAlign),
> + /*ByVal=*/true, Realign);
> }
>
> X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
> @@ -1259,22 +1390,23 @@ void X86_32ABIInfo::computeInfo(CGFuncti
>
> void
> X86_32ABIInfo::addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
> - unsigned &StackOffset,
> - ABIArgInfo &Info, QualType Type) const {
> - assert(StackOffset % 4U == 0 && "unaligned inalloca struct");
> + CharUnits &StackOffset, ABIArgInfo &Info,
> + QualType Type) const {
> + // Arguments are always 4-byte-aligned.
> + CharUnits FieldAlign = CharUnits::fromQuantity(4);
> +
> + assert(StackOffset.isMultipleOf(FieldAlign) && "unaligned inalloca struct");
> Info = ABIArgInfo::getInAlloca(FrameFields.size());
> FrameFields.push_back(CGT.ConvertTypeForMem(Type));
> - StackOffset += getContext().getTypeSizeInChars(Type).getQuantity();
> + StackOffset += getContext().getTypeSizeInChars(Type);
>
> - // Insert padding bytes to respect alignment. For x86_32, each argument is 4
> - // byte aligned.
> - if (StackOffset % 4U) {
> - unsigned OldOffset = StackOffset;
> - StackOffset = llvm::RoundUpToAlignment(StackOffset, 4U);
> - unsigned NumBytes = StackOffset - OldOffset;
> - assert(NumBytes);
> + // Insert padding bytes to respect alignment.
> + CharUnits FieldEnd = StackOffset;
> + StackOffset = FieldEnd.RoundUpToAlignment(FieldAlign);
> + if (StackOffset != FieldEnd) {
> + CharUnits NumBytes = StackOffset - FieldEnd;
> llvm::Type *Ty = llvm::Type::getInt8Ty(getVMContext());
> - Ty = llvm::ArrayType::get(Ty, NumBytes);
> + Ty = llvm::ArrayType::get(Ty, NumBytes.getQuantity());
> FrameFields.push_back(Ty);
> }
> }
> @@ -1305,7 +1437,10 @@ void X86_32ABIInfo::rewriteWithInAlloca(
> // Build a packed struct type for all of the arguments in memory.
> SmallVector<llvm::Type *, 6> FrameFields;
>
> - unsigned StackOffset = 0;
> + // The stack alignment is always 4.
> + CharUnits StackAlign = CharUnits::fromQuantity(4);
> +
> + CharUnits StackOffset;
> CGFunctionInfo::arg_iterator I = FI.arg_begin(), E = FI.arg_end();
>
> // Put 'this' into the struct before 'sret', if necessary.
> @@ -1337,47 +1472,25 @@ void X86_32ABIInfo::rewriteWithInAlloca(
> }
>
> FI.setArgStruct(llvm::StructType::get(getVMContext(), FrameFields,
> - /*isPacked=*/true));
> + /*isPacked=*/true),
> + StackAlign);
> }
>
> -llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> +Address X86_32ABIInfo::EmitVAArg(CodeGenFunction &CGF,
> + Address VAListAddr, QualType Ty) const {
>
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
> - "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> -
> - // Compute if the address needs to be aligned
> - unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity();
> - Align = getTypeStackAlignInBytes(Ty, Align);
> - Align = std::max(Align, 4U);
> - if (Align > 4) {
> - // addr = (addr + align - 1) & -align;
> - llvm::Value *Offset =
> - llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
> - Addr = CGF.Builder.CreateGEP(Addr, Offset);
> - llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr,
> - CGF.Int32Ty);
> - llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align);
> - Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
> - Addr->getType(),
> - "ap.cur.aligned");
> - }
> -
> - llvm::Type *PTy =
> - llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
> -
> - uint64_t Offset =
> - llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> + auto TypeInfo = getContext().getTypeInfoInChars(Ty);
>
> - return AddrTyped;
> + // x86-32 changes the alignment of certain arguments on the stack.
> + //
> + // Just messing with TypeInfo like this works because we never pass
> + // anything indirectly.
> + TypeInfo.second = CharUnits::fromQuantity(
> + getTypeStackAlignInBytes(Ty, TypeInfo.second.getQuantity()));
> +
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false,
> + TypeInfo, CharUnits::fromQuantity(4),
> + /*AllowHigherAlign*/ true);
> }
>
> bool X86_32TargetCodeGenInfo::isStructReturnInRegABI(
> @@ -1449,8 +1562,9 @@ bool X86_32TargetCodeGenInfo::initDwarfE
> } else {
> // 9 is %eflags, which doesn't get a size on Darwin for some
> // reason.
> - Builder.CreateStore(
> - Four8, Builder.CreateConstInBoundsGEP1_32(CGF.Int8Ty, Address, 9));
> + Builder.CreateAlignedStore(
> + Four8, Builder.CreateConstInBoundsGEP1_32(CGF.Int8Ty, Address, 9),
> + CharUnits::One());
>
> // 11-16 are st(0..5). Not sure why we stop at 5.
> // These have size 12, which is sizeof(long double) on
> @@ -1619,8 +1733,8 @@ public:
>
> void computeInfo(CGFunctionInfo &FI) const override;
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
>
> bool has64BitPointers() const {
> return Has64BitPointers;
> @@ -1638,8 +1752,8 @@ public:
>
> void computeInfo(CGFunctionInfo &FI) const override;
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
>
> bool isHomogeneousAggregateBaseType(QualType Ty) const override {
> // FIXME: Assumes vectorcall is in use.
> @@ -2257,7 +2371,7 @@ ABIArgInfo X86_64ABIInfo::getIndirectRet
> ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
> }
>
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(Ty);
> }
>
> bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const {
> @@ -2291,7 +2405,7 @@ ABIArgInfo X86_64ABIInfo::getIndirectRes
> }
>
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> // Compute the byval alignment. We specify the alignment of the byval in all
> // cases so that the mid-level optimizer knows the alignment of the byval.
> @@ -2328,7 +2442,7 @@ ABIArgInfo X86_64ABIInfo::getIndirectRes
> Size));
> }
>
> - return ABIArgInfo::getIndirect(Align);
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(Align));
> }
>
> /// The ABI specifies that a value should be passed in a full vector XMM/YMM
> @@ -2912,11 +3026,10 @@ void X86_64ABIInfo::computeInfo(CGFuncti
> }
> }
>
> -static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
> - QualType Ty,
> - CodeGenFunction &CGF) {
> - llvm::Value *overflow_arg_area_p = CGF.Builder.CreateStructGEP(
> - nullptr, VAListAddr, 2, "overflow_arg_area_p");
> +static Address EmitX86_64VAArgFromMemory(CodeGenFunction &CGF,
> + Address VAListAddr, QualType Ty) {
> + Address overflow_arg_area_p = CGF.Builder.CreateStructGEP(
> + VAListAddr, 2, CharUnits::fromQuantity(8), "overflow_arg_area_p");
> llvm::Value *overflow_arg_area =
> CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
>
> @@ -2924,7 +3037,7 @@ static llvm::Value *EmitVAArgFromMemory(
> // byte boundary if alignment needed by type exceeds 8 byte boundary.
> // It isn't stated explicitly in the standard, but in practice we use
> // alignment greater than 16 where necessary.
> - uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
> + uint64_t Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity();
> if (Align > 8) {
> // overflow_arg_area = (overflow_arg_area + align - 1) & -align;
> llvm::Value *Offset =
> @@ -2958,11 +3071,11 @@ static llvm::Value *EmitVAArgFromMemory(
> CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
>
> // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
> - return Res;
> + return Address(Res, CharUnits::fromQuantity(Align));
> }
>
> -llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> +Address X86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> // Assume that va_list type is correct; should be pointer to LLVM type:
> // struct {
> // i32 gp_offset;
> @@ -2972,14 +3085,14 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
> // };
> unsigned neededInt, neededSSE;
>
> - Ty = CGF.getContext().getCanonicalType(Ty);
> + Ty = getContext().getCanonicalType(Ty);
> ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE,
> /*isNamedArg*/false);
>
> // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
> // in the registers. If not go to step 7.
> if (!neededInt && !neededSSE)
> - return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
> + return EmitX86_64VAArgFromMemory(CGF, VAListAddr, Ty);
>
> // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
> // general purpose registers needed to pass type and num_fp to hold
> @@ -2993,11 +3106,12 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
> // register save space).
>
> llvm::Value *InRegs = nullptr;
> - llvm::Value *gp_offset_p = nullptr, *gp_offset = nullptr;
> - llvm::Value *fp_offset_p = nullptr, *fp_offset = nullptr;
> + Address gp_offset_p = Address::invalid(), fp_offset_p = Address::invalid();
> + llvm::Value *gp_offset = nullptr, *fp_offset = nullptr;
> if (neededInt) {
> gp_offset_p =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "gp_offset_p");
> + CGF.Builder.CreateStructGEP(VAListAddr, 0, CharUnits::Zero(),
> + "gp_offset_p");
> gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
> InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
> InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
> @@ -3005,7 +3119,8 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
>
> if (neededSSE) {
> fp_offset_p =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 1, "fp_offset_p");
> + CGF.Builder.CreateStructGEP(VAListAddr, 1, CharUnits::fromQuantity(4),
> + "fp_offset_p");
> fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
> llvm::Value *FitsInFP =
> llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
> @@ -3033,14 +3148,17 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
> // simple assembling of a structure from scattered addresses has many more
> // loads than necessary. Can we clean this up?
> llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
> - llvm::Value *RegAddr = CGF.Builder.CreateLoad(
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3), "reg_save_area");
> + llvm::Value *RegSaveArea = CGF.Builder.CreateLoad(
> + CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(16)),
> + "reg_save_area");
> +
> + Address RegAddr = Address::invalid();
> if (neededInt && neededSSE) {
> // FIXME: Cleanup.
> assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
> llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
> - llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
> - Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
> + Address Tmp = CGF.CreateMemTemp(Ty);
> + Tmp = CGF.Builder.CreateElementBitCast(Tmp, ST);
> assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
> llvm::Type *TyLo = ST->getElementType(0);
> llvm::Type *TyHi = ST->getElementType(1);
> @@ -3048,57 +3166,77 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
> "Unexpected ABI info for mixed regs");
> llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
> llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
> - llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
> - llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
> + llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegSaveArea, gp_offset);
> + llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegSaveArea, fp_offset);
> llvm::Value *RegLoAddr = TyLo->isFPOrFPVectorTy() ? FPAddr : GPAddr;
> llvm::Value *RegHiAddr = TyLo->isFPOrFPVectorTy() ? GPAddr : FPAddr;
> +
> + // Copy the first element.
> llvm::Value *V =
> - CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
> - CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0));
> - V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
> - CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1));
> + CGF.Builder.CreateDefaultAlignedLoad(
> + CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
> + CGF.Builder.CreateStore(V,
> + CGF.Builder.CreateStructGEP(Tmp, 0, CharUnits::Zero()));
> +
> + // Copy the second element.
> + V = CGF.Builder.CreateDefaultAlignedLoad(
> + CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
> + CharUnits Offset = CharUnits::fromQuantity(
> + getDataLayout().getStructLayout(ST)->getElementOffset(1));
> + CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1, Offset));
>
> - RegAddr = CGF.Builder.CreateBitCast(Tmp,
> - llvm::PointerType::getUnqual(LTy));
> + RegAddr = CGF.Builder.CreateElementBitCast(Tmp, LTy);
> } else if (neededInt) {
> - RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
> - RegAddr = CGF.Builder.CreateBitCast(RegAddr,
> - llvm::PointerType::getUnqual(LTy));
> + RegAddr = Address(CGF.Builder.CreateGEP(RegSaveArea, gp_offset),
> + CharUnits::fromQuantity(8));
> + RegAddr = CGF.Builder.CreateElementBitCast(RegAddr, LTy);
>
> // Copy to a temporary if necessary to ensure the appropriate alignment.
> std::pair<CharUnits, CharUnits> SizeAlign =
> - CGF.getContext().getTypeInfoInChars(Ty);
> + getContext().getTypeInfoInChars(Ty);
> uint64_t TySize = SizeAlign.first.getQuantity();
> - unsigned TyAlign = SizeAlign.second.getQuantity();
> - if (TyAlign > 8) {
> - llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
> - CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, 8, false);
> + CharUnits TyAlign = SizeAlign.second;
> +
> + // Copy into a temporary if the type is more aligned than the
> + // register save area.
> + if (TyAlign.getQuantity() > 8) {
> + Address Tmp = CGF.CreateMemTemp(Ty);
> + CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, false);
> RegAddr = Tmp;
> }
> +
> } else if (neededSSE == 1) {
> - RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
> - RegAddr = CGF.Builder.CreateBitCast(RegAddr,
> - llvm::PointerType::getUnqual(LTy));
> + RegAddr = Address(CGF.Builder.CreateGEP(RegSaveArea, fp_offset),
> + CharUnits::fromQuantity(16));
> + RegAddr = CGF.Builder.CreateElementBitCast(RegAddr, LTy);
> } else {
> assert(neededSSE == 2 && "Invalid number of needed registers!");
> // SSE registers are spaced 16 bytes apart in the register save
> // area, we need to collect the two eightbytes together.
> - llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
> - llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
> + // The ABI isn't explicit about this, but it seems reasonable
> + // to assume that the slots are 16-byte aligned, since the stack is
> + // naturally 16-byte aligned and the prologue is expected to store
> + // all the SSE registers to the RSA.
> + Address RegAddrLo = Address(CGF.Builder.CreateGEP(RegSaveArea, fp_offset),
> + CharUnits::fromQuantity(16));
> + Address RegAddrHi =
> + CGF.Builder.CreateConstInBoundsByteGEP(RegAddrLo,
> + CharUnits::fromQuantity(16));
> llvm::Type *DoubleTy = CGF.DoubleTy;
> - llvm::Type *DblPtrTy =
> - llvm::PointerType::getUnqual(DoubleTy);
> llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, nullptr);
> - llvm::Value *V, *Tmp = CGF.CreateMemTemp(Ty);
> - Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
> - V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
> - DblPtrTy));
> - CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0));
> - V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
> - DblPtrTy));
> - CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1));
> - RegAddr = CGF.Builder.CreateBitCast(Tmp,
> - llvm::PointerType::getUnqual(LTy));
> + llvm::Value *V;
> + Address Tmp = CGF.CreateMemTemp(Ty);
> + Tmp = CGF.Builder.CreateElementBitCast(Tmp, ST);
> + V = CGF.Builder.CreateLoad(
> + CGF.Builder.CreateElementBitCast(RegAddrLo, DoubleTy));
> + CGF.Builder.CreateStore(V,
> + CGF.Builder.CreateStructGEP(Tmp, 0, CharUnits::Zero()));
> + V = CGF.Builder.CreateLoad(
> + CGF.Builder.CreateElementBitCast(RegAddrHi, DoubleTy));
> + CGF.Builder.CreateStore(V,
> + CGF.Builder.CreateStructGEP(Tmp, 1, CharUnits::fromQuantity(8)));
> +
> + RegAddr = CGF.Builder.CreateElementBitCast(Tmp, LTy);
> }
>
> // AMD64-ABI 3.5.7p5: Step 5. Set:
> @@ -3119,15 +3257,13 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(ll
> // Emit code to load the value if it was passed in memory.
>
> CGF.EmitBlock(InMemBlock);
> - llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
> + Address MemAddr = EmitX86_64VAArgFromMemory(CGF, VAListAddr, Ty);
>
> // Return the appropriate result.
>
> CGF.EmitBlock(ContBlock);
> - llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2,
> - "vaarg.addr");
> - ResAddr->addIncoming(RegAddr, InRegBlock);
> - ResAddr->addIncoming(MemAddr, InMemBlock);
> + Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock, MemAddr, InMemBlock,
> + "vaarg.addr");
> return ResAddr;
> }
>
> @@ -3148,11 +3284,11 @@ ABIArgInfo WinX86_64ABIInfo::classify(Qu
> if (RT) {
> if (!IsReturnType) {
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
> }
>
> if (RT->getDecl()->hasFlexibleArrayMember())
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> // FIXME: mingw-w64-gcc emits 128-bit struct as i128
> if (Width == 128 && getTarget().getTriple().isWindowsGNUEnvironment())
> @@ -3171,7 +3307,8 @@ ABIArgInfo WinX86_64ABIInfo::classify(Qu
> return ABIArgInfo::getDirect();
> return ABIArgInfo::getExpand();
> }
> - return ABIArgInfo::getIndirect(Align, /*ByVal=*/false);
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(Align),
> + /*ByVal=*/false);
> }
>
>
> @@ -3187,7 +3324,7 @@ ABIArgInfo WinX86_64ABIInfo::classify(Qu
> // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
> // not 1, 2, 4, or 8 bytes, must be passed by reference."
> if (Width > 64 || !llvm::isPowerOf2_64(Width))
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> // Otherwise, coerce it to a small integer.
> return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Width));
> @@ -3217,26 +3354,12 @@ void WinX86_64ABIInfo::computeInfo(CGFun
> I.info = classify(I.type, FreeSSERegs, false);
> }
>
> -llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> -
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
> - "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> - llvm::Type *PTy =
> - llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
> -
> - uint64_t Offset =
> - llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> -
> - return AddrTyped;
> +Address WinX86_64ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
> + CGF.getContext().getTypeInfoInChars(Ty),
> + CharUnits::fromQuantity(8),
> + /*allowHigherAlign*/ false);
> }
>
> // PowerPC-32
> @@ -3246,8 +3369,8 @@ class PPC32_SVR4_ABIInfo : public Defaul
> public:
> PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -3266,64 +3389,50 @@ public:
>
> }
>
> -llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
> - QualType Ty,
> - CodeGenFunction &CGF) const {
> +Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
> + QualType Ty) const {
> if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
> // TODO: Implement this. For now ignore.
> (void)CTy;
> - return nullptr;
> + return Address::invalid();
> }
>
> + // struct __va_list_tag {
> + // unsigned char gpr;
> + // unsigned char fpr;
> + // unsigned short reserved;
> + // void *overflow_arg_area;
> + // void *reg_save_area;
> + // };
> +
> bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
> bool isInt =
> Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
> - llvm::Type *CharPtr = CGF.Int8PtrTy;
> - llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy;
> +
> + // All aggregates are passed indirectly? That doesn't seem consistent
> + // with the argument-lowering code.
> + bool isIndirect = Ty->isAggregateType();
>
> CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr");
> - llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty);
> - llvm::Value *FPRPtrAsInt =
> - Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1));
> - llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr);
> - llvm::Value *OverflowAreaPtrAsInt =
> - Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3));
> - llvm::Value *OverflowAreaPtr =
> - Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr);
> - llvm::Value *RegsaveAreaPtrAsInt =
> - Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4));
> - llvm::Value *RegsaveAreaPtr =
> - Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr);
> - llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr");
> - // Align GPR when TY is i64.
> - if (isI64) {
> - llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1));
> - llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1));
> - llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1));
> - GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR);
> - }
> - llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr");
> - llvm::Value *OverflowArea =
> - Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area");
> - llvm::Value *OverflowAreaAsInt =
> - Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty);
> - llvm::Value *RegsaveArea =
> - Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area");
> - llvm::Value *RegsaveAreaAsInt =
> - Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty);
>
> - llvm::Value *CC =
> - Builder.CreateICmpULT(isInt ? GPR : FPR, Builder.getInt8(8), "cond");
> + // The calling convention either uses 1-2 GPRs or 1 FPR.
> + Address NumRegsAddr = Address::invalid();
> + if (isInt) {
> + NumRegsAddr = Builder.CreateStructGEP(VAList, 0, CharUnits::Zero(), "gpr");
> + } else {
> + NumRegsAddr = Builder.CreateStructGEP(VAList, 1, CharUnits::One(), "fpr");
> + }
>
> - llvm::Value *RegConstant =
> - Builder.CreateMul(isInt ? GPR : FPR, Builder.getInt8(isInt ? 4 : 8));
> + llvm::Value *NumRegs = Builder.CreateLoad(NumRegsAddr, "numUsedRegs");
>
> - llvm::Value *OurReg = Builder.CreateAdd(
> - RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty));
> + // "Align" the register count when TY is i64.
> + if (isI64) {
> + NumRegs = Builder.CreateAdd(NumRegs, Builder.getInt8(1));
> + NumRegs = Builder.CreateAnd(NumRegs, Builder.getInt8((uint8_t) ~1U));
> + }
>
> - if (Ty->isFloatingType())
> - OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32));
> + llvm::Value *CC =
> + Builder.CreateICmpULT(NumRegs, Builder.getInt8(8), "cond");
>
> llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
> llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
> @@ -3331,39 +3440,84 @@ llvm::Value *PPC32_SVR4_ABIInfo::EmitVAA
>
> Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
>
> - CGF.EmitBlock(UsingRegs);
> + llvm::Type *DirectTy = CGF.ConvertType(Ty);
> + if (isIndirect) DirectTy = DirectTy->getPointerTo(0);
>
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy);
> - // Increase the GPR/FPR indexes.
> - if (isInt) {
> - GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1));
> - Builder.CreateStore(GPR, GPRPtr);
> - } else {
> - FPR = Builder.CreateAdd(FPR, Builder.getInt8(1));
> - Builder.CreateStore(FPR, FPRPtr);
> - }
> - CGF.EmitBranch(Cont);
> -
> - CGF.EmitBlock(UsingOverflow);
> + // Case 1: consume registers.
> + Address RegAddr = Address::invalid();
> + {
> + CGF.EmitBlock(UsingRegs);
> +
> + Address RegSaveAreaPtr =
> + Builder.CreateStructGEP(VAList, 4, CharUnits::fromQuantity(8));
> + RegAddr = Address(Builder.CreateLoad(RegSaveAreaPtr),
> + CharUnits::fromQuantity(8));
> + assert(RegAddr.getElementType() == CGF.Int8Ty);
> +
> + // Floating-point registers start after the general-purpose registers.
> + if (!isInt) {
> + RegAddr = Builder.CreateConstInBoundsByteGEP(RegAddr,
> + CharUnits::fromQuantity(32));
> + }
> +
> + // Get the address of the saved value by scaling the number of
> + // registers we've used by the number of
> + CharUnits RegSize = CharUnits::fromQuantity(isInt ? 4 : 8);
> + llvm::Value *RegOffset =
> + Builder.CreateMul(NumRegs, Builder.getInt8(RegSize.getQuantity()));
> + RegAddr = Address(Builder.CreateInBoundsGEP(CGF.Int8Ty,
> + RegAddr.getPointer(), RegOffset),
> + RegAddr.getAlignment().alignmentOfArrayElement(RegSize));
> + RegAddr = Builder.CreateElementBitCast(RegAddr, DirectTy);
> +
> + // Increase the used-register count.
> + NumRegs = Builder.CreateAdd(NumRegs, Builder.getInt8(isI64 ? 2 : 1));
> + Builder.CreateStore(NumRegs, NumRegsAddr);
> +
> + CGF.EmitBranch(Cont);
> + }
> +
> + // Case 2: consume space in the overflow area.
> + Address MemAddr = Address::invalid();
> + {
> + CGF.EmitBlock(UsingOverflow);
> +
> + // Everything in the overflow area is rounded up to a size of at least 4.
> + CharUnits OverflowAreaAlign = CharUnits::fromQuantity(4);
> +
> + CharUnits Size;
> + if (!isIndirect) {
> + auto TypeInfo = CGF.getContext().getTypeInfoInChars(Ty);
> + Size = TypeInfo.first.RoundUpToAlignment(OverflowAreaAlign);
> + } else {
> + Size = CGF.getPointerSize();
> + }
>
> - // Increase the overflow area.
> - llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy);
> - OverflowAreaAsInt =
> - Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8));
> - Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr),
> - OverflowAreaPtr);
> - CGF.EmitBranch(Cont);
> + Address OverflowAreaAddr =
> + Builder.CreateStructGEP(VAList, 3, CharUnits::fromQuantity(4));
> + Address OverflowArea(Builder.CreateLoad(OverflowAreaAddr),
> + OverflowAreaAlign);
> +
> + // The current address is the address of the varargs element.
> + // FIXME: do we not need to round up to alignment?
> + MemAddr = Builder.CreateElementBitCast(OverflowArea, DirectTy);
> +
> + // Increase the overflow area.
> + OverflowArea = Builder.CreateConstInBoundsByteGEP(OverflowArea, Size);
> + Builder.CreateStore(OverflowArea.getPointer(), OverflowAreaAddr);
> + CGF.EmitBranch(Cont);
> + }
>
> CGF.EmitBlock(Cont);
>
> - llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr");
> - Result->addIncoming(Result1, UsingRegs);
> - Result->addIncoming(Result2, UsingOverflow);
> -
> - if (Ty->isAggregateType()) {
> - llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr");
> - return Builder.CreateLoad(AGGPtr, false, "aggr");
> + // Merge the cases with a phi.
> + Address Result = emitMergePHI(CGF, RegAddr, UsingRegs, MemAddr, UsingOverflow,
> + "vaarg.addr");
> +
> + // Load the pointer if the argument was passed indirectly.
> + if (isIndirect) {
> + Result = Address(Builder.CreateLoad(Result, "aggr"),
> + getContext().getTypeAlignInChars(Ty));
> }
>
> return Result;
> @@ -3459,7 +3613,7 @@ public:
> : DefaultABIInfo(CGT), Kind(Kind), HasQPX(HasQPX) {}
>
> bool isPromotableTypeForABI(QualType Ty) const;
> - bool isAlignedParamType(QualType Ty, bool &Align32) const;
> + CharUnits getParamTypeAlignment(QualType Ty) const;
>
> ABIArgInfo classifyReturnType(QualType RetTy) const;
> ABIArgInfo classifyArgumentType(QualType Ty) const;
> @@ -3496,8 +3650,8 @@ public:
> }
> }
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -3557,12 +3711,9 @@ PPC64_SVR4_ABIInfo::isPromotableTypeForA
> return false;
> }
>
> -/// isAlignedParamType - Determine whether a type requires 16-byte
> -/// alignment in the parameter area.
> -bool
> -PPC64_SVR4_ABIInfo::isAlignedParamType(QualType Ty, bool &Align32) const {
> - Align32 = false;
> -
> +/// isAlignedParamType - Determine whether a type requires 16-byte or
> +/// higher alignment in the parameter area. Always returns at least 8.
> +CharUnits PPC64_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
> // Complex types are passed just like their elements.
> if (const ComplexType *CTy = Ty->getAs<ComplexType>())
> Ty = CTy->getElementType();
> @@ -3571,11 +3722,11 @@ PPC64_SVR4_ABIInfo::isAlignedParamType(Q
> // passed via reference, smaller types are not aligned).
> if (IsQPXVectorTy(Ty)) {
> if (getContext().getTypeSize(Ty) > 128)
> - Align32 = true;
> + return CharUnits::fromQuantity(32);
>
> - return true;
> + return CharUnits::fromQuantity(16);
> } else if (Ty->isVectorType()) {
> - return getContext().getTypeSize(Ty) == 128;
> + return CharUnits::fromQuantity(getContext().getTypeSize(Ty) == 128 ? 16 : 8);
> }
>
> // For single-element float/vector structs, we consider the whole type
> @@ -3600,22 +3751,22 @@ PPC64_SVR4_ABIInfo::isAlignedParamType(Q
> // With special case aggregates, only vector base types need alignment.
> if (AlignAsType && IsQPXVectorTy(AlignAsType)) {
> if (getContext().getTypeSize(AlignAsType) > 128)
> - Align32 = true;
> + return CharUnits::fromQuantity(32);
>
> - return true;
> + return CharUnits::fromQuantity(16);
> } else if (AlignAsType) {
> - return AlignAsType->isVectorType();
> + return CharUnits::fromQuantity(AlignAsType->isVectorType() ? 16 : 8);
> }
>
> // Otherwise, we only need alignment for any aggregate type that
> // has an alignment requirement of >= 16 bytes.
> if (isAggregateTypeForABI(Ty) && getContext().getTypeAlign(Ty) >= 128) {
> if (HasQPX && getContext().getTypeAlign(Ty) >= 256)
> - Align32 = true;
> - return true;
> + return CharUnits::fromQuantity(32);
> + return CharUnits::fromQuantity(16);
> }
>
> - return false;
> + return CharUnits::fromQuantity(8);
> }
>
> /// isHomogeneousAggregate - Return true if a type is an ELFv2 homogeneous
> @@ -3748,7 +3899,7 @@ PPC64_SVR4_ABIInfo::classifyArgumentType
> if (Ty->isVectorType() && !IsQPXVectorTy(Ty)) {
> uint64_t Size = getContext().getTypeSize(Ty);
> if (Size > 128)
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
> else if (Size < 128) {
> llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
> return ABIArgInfo::getDirect(CoerceTy);
> @@ -3757,12 +3908,10 @@ PPC64_SVR4_ABIInfo::classifyArgumentType
>
> if (isAggregateTypeForABI(Ty)) {
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> - bool Align32;
> - uint64_t ABIAlign = isAlignedParamType(Ty, Align32) ?
> - (Align32 ? 32 : 16) : 8;
> - uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8;
> + uint64_t ABIAlign = getParamTypeAlignment(Ty).getQuantity();
> + uint64_t TyAlign = getContext().getTypeAlignInChars(Ty).getQuantity();
>
> // ELFv2 homogeneous aggregates are passed as array types.
> const Type *Base = nullptr;
> @@ -3800,7 +3949,8 @@ PPC64_SVR4_ABIInfo::classifyArgumentType
> }
>
> // All other aggregates are passed ByVal.
> - return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true,
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(ABIAlign),
> + /*ByVal=*/true,
> /*Realign=*/TyAlign > ABIAlign);
> }
>
> @@ -3821,7 +3971,7 @@ PPC64_SVR4_ABIInfo::classifyReturnType(Q
> if (RetTy->isVectorType() && !IsQPXVectorTy(RetTy)) {
> uint64_t Size = getContext().getTypeSize(RetTy);
> if (Size > 128)
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> else if (Size < 128) {
> llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
> return ABIArgInfo::getDirect(CoerceTy);
> @@ -3856,7 +4006,7 @@ PPC64_SVR4_ABIInfo::classifyReturnType(Q
> }
>
> // All other aggregates are returned indirectly.
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> return (isPromotableTypeForABI(RetTy) ?
> @@ -3864,47 +4014,12 @@ PPC64_SVR4_ABIInfo::classifyReturnType(Q
> }
>
> // Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine.
> -llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
> - QualType Ty,
> - CodeGenFunction &CGF) const {
> - llvm::Type *BP = CGF.Int8PtrTy;
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> -
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> -
> - // Handle types that require 16-byte alignment in the parameter save area.
> - bool Align32;
> - if (isAlignedParamType(Ty, Align32)) {
> - llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
> - AddrAsInt = Builder.CreateAdd(AddrAsInt,
> - Builder.getInt64(Align32 ? 31 : 15));
> - AddrAsInt = Builder.CreateAnd(AddrAsInt,
> - Builder.getInt64(Align32 ? -32 : -16));
> - Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align");
> - }
> -
> - // Update the va_list pointer. The pointer should be bumped by the
> - // size of the object. We can trust getTypeSize() except for a complex
> - // type whose base type is smaller than a doubleword. For these, the
> - // size of the object is 16 bytes; see below for further explanation.
> - unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8;
> - QualType BaseTy;
> - unsigned CplxBaseSize = 0;
> -
> - if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
> - BaseTy = CTy->getElementType();
> - CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8;
> - if (CplxBaseSize < 8)
> - SizeInBytes = 16;
> - }
> +Address PPC64_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + auto TypeInfo = getContext().getTypeInfoInChars(Ty);
> + TypeInfo.second = getParamTypeAlignment(Ty);
>
> - unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> + CharUnits SlotSize = CharUnits::fromQuantity(8);
>
> // If we have a complex type and the base type is smaller than 8 bytes,
> // the ABI calls for the real and imaginary parts to be right-adjusted
> @@ -3912,44 +4027,40 @@ llvm::Value *PPC64_SVR4_ABIInfo::EmitVAA
> // pointer to a structure with the two parts packed tightly. So generate
> // loads of the real and imaginary parts relative to the va_list pointer,
> // and store them to a temporary structure.
> - if (CplxBaseSize && CplxBaseSize < 8) {
> - llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
> - llvm::Value *ImagAddr = RealAddr;
> - if (CGF.CGM.getDataLayout().isBigEndian()) {
> - RealAddr =
> - Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize));
> - ImagAddr =
> - Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize));
> - } else {
> - ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(8));
> + if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
> + CharUnits EltSize = TypeInfo.first / 2;
> + if (EltSize < SlotSize) {
> + Address Addr = emitVoidPtrDirectVAArg(CGF, VAListAddr, CGF.Int8Ty,
> + SlotSize * 2, SlotSize,
> + SlotSize, /*AllowHigher*/ true);
> +
> + Address RealAddr = Addr;
> + Address ImagAddr = RealAddr;
> + if (CGF.CGM.getDataLayout().isBigEndian()) {
> + RealAddr = CGF.Builder.CreateConstInBoundsByteGEP(RealAddr,
> + SlotSize - EltSize);
> + ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(ImagAddr,
> + 2 * SlotSize - EltSize);
> + } else {
> + ImagAddr = CGF.Builder.CreateConstInBoundsByteGEP(RealAddr, SlotSize);
> + }
> +
> + llvm::Type *EltTy = CGF.ConvertTypeForMem(CTy->getElementType());
> + RealAddr = CGF.Builder.CreateElementBitCast(RealAddr, EltTy);
> + ImagAddr = CGF.Builder.CreateElementBitCast(ImagAddr, EltTy);
> + llvm::Value *Real = CGF.Builder.CreateLoad(RealAddr, ".vareal");
> + llvm::Value *Imag = CGF.Builder.CreateLoad(ImagAddr, ".vaimag");
> +
> + Address Temp = CGF.CreateMemTemp(Ty, "vacplx");
> + CGF.EmitStoreOfComplex({Real, Imag}, CGF.MakeAddrLValue(Temp, Ty),
> + /*init*/ true);
> + return Temp;
> }
> - llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy));
> - RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy);
> - ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy);
> - llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal");
> - llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag");
> - llvm::AllocaInst *Ptr =
> - CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), "vacplx");
> - llvm::Value *RealPtr =
> - Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 0, ".real");
> - llvm::Value *ImagPtr =
> - Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 1, ".imag");
> - Builder.CreateStore(Real, RealPtr, false);
> - Builder.CreateStore(Imag, ImagPtr, false);
> - return Ptr;
> - }
> -
> - // If the argument is smaller than 8 bytes, it is right-adjusted in
> - // its doubleword slot. Adjust the pointer to pick it up from the
> - // correct offset.
> - if (SizeInBytes < 8 && CGF.CGM.getDataLayout().isBigEndian()) {
> - llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
> - AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes));
> - Addr = Builder.CreateIntToPtr(AddrAsInt, BP);
> }
>
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - return Builder.CreateBitCast(Addr, PTy);
> + // Otherwise, just use the general rule.
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false,
> + TypeInfo, SlotSize, /*AllowHigher*/ true);
> }
>
> static bool
> @@ -4047,14 +4158,14 @@ private:
> it.info = classifyArgumentType(it.type);
> }
>
> - llvm::Value *EmitDarwinVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const;
> + Address EmitDarwinVAArg(Address VAListAddr, QualType Ty,
> + CodeGenFunction &CGF) const;
>
> - llvm::Value *EmitAAPCSVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const;
> + Address EmitAAPCSVAArg(Address VAListAddr, QualType Ty,
> + CodeGenFunction &CGF) const;
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override {
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override {
> return isDarwinPCS() ? EmitDarwinVAArg(VAListAddr, Ty, CGF)
> : EmitAAPCSVAArg(VAListAddr, Ty, CGF);
> }
> @@ -4097,7 +4208,7 @@ ABIArgInfo AArch64ABIInfo::classifyArgum
> llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 4);
> return ABIArgInfo::getDirect(ResType);
> }
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
> }
>
> if (!isAggregateTypeForABI(Ty)) {
> @@ -4113,8 +4224,8 @@ ABIArgInfo AArch64ABIInfo::classifyArgum
> // Structures with either a non-trivial destructor or a non-trivial
> // copy constructor are always indirect.
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/RAA ==
> - CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/RAA ==
> + CGCXXABI::RAA_DirectInMemory);
> }
>
> // Empty records are always ignored on Darwin, but actually passed in C++ mode
> @@ -4149,7 +4260,7 @@ ABIArgInfo AArch64ABIInfo::classifyArgum
> return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
> }
>
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
> }
>
> ABIArgInfo AArch64ABIInfo::classifyReturnType(QualType RetTy) const {
> @@ -4158,7 +4269,7 @@ ABIArgInfo AArch64ABIInfo::classifyRetur
>
> // Large vector types should be returned via memory.
> if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
>
> if (!isAggregateTypeForABI(RetTy)) {
> // Treat an enum type as its underlying type.
> @@ -4194,7 +4305,7 @@ ABIArgInfo AArch64ABIInfo::classifyRetur
> return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
> }
>
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> /// isIllegalVectorType - check whether the vector type is legal for AArch64.
> @@ -4232,7 +4343,7 @@ bool AArch64ABIInfo::isHomogeneousAggreg
> return Members <= 4;
> }
>
> -llvm::Value *AArch64ABIInfo::EmitAAPCSVAArg(llvm::Value *VAListAddr,
> +Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr,
> QualType Ty,
> CodeGenFunction &CGF) const {
> ABIArgInfo AI = classifyArgumentType(Ty);
> @@ -4266,24 +4377,32 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
> llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack");
> llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
> - auto &Ctx = CGF.getContext();
>
> - llvm::Value *reg_offs_p = nullptr, *reg_offs = nullptr;
> + auto TyInfo = getContext().getTypeInfoInChars(Ty);
> + CharUnits TyAlign = TyInfo.second;
> +
> + Address reg_offs_p = Address::invalid();
> + llvm::Value *reg_offs = nullptr;
> int reg_top_index;
> - int RegSize = IsIndirect ? 8 : getContext().getTypeSize(Ty) / 8;
> + CharUnits reg_top_offset;
> + int RegSize = IsIndirect ? 8 : TyInfo.first.getQuantity();
> if (!IsFPR) {
> // 3 is the field number of __gr_offs
> reg_offs_p =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "gr_offs_p");
> + CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(24),
> + "gr_offs_p");
> reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs");
> reg_top_index = 1; // field number for __gr_top
> + reg_top_offset = CharUnits::fromQuantity(8);
> RegSize = llvm::RoundUpToAlignment(RegSize, 8);
> } else {
> // 4 is the field number of __vr_offs.
> reg_offs_p =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 4, "vr_offs_p");
> + CGF.Builder.CreateStructGEP(VAListAddr, 4, CharUnits::fromQuantity(28),
> + "vr_offs_p");
> reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs");
> reg_top_index = 2; // field number for __vr_top
> + reg_top_offset = CharUnits::fromQuantity(16);
> RegSize = 16 * NumRegs;
> }
>
> @@ -4308,8 +4427,8 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> // Integer arguments may need to correct register alignment (for example a
> // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we
> // align __gr_offs to calculate the potential address.
> - if (!IsFPR && !IsIndirect && Ctx.getTypeAlign(Ty) > 64) {
> - int Align = Ctx.getTypeAlign(Ty) / 8;
> + if (!IsFPR && !IsIndirect && TyAlign.getQuantity() > 8) {
> + int Align = TyAlign.getQuantity();
>
> reg_offs = CGF.Builder.CreateAdd(
> reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, Align - 1),
> @@ -4320,6 +4439,9 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> }
>
> // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list.
> + // The fact that this is done unconditionally reflects the fact that
> + // allocating an argument to the stack also uses up all the remaining
> + // registers of the appropriate kind.
> llvm::Value *NewOffset = nullptr;
> NewOffset = CGF.Builder.CreateAdd(
> reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, RegSize), "new_reg_offs");
> @@ -4341,13 +4463,14 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> // registers. First start the appropriate block:
> CGF.EmitBlock(InRegBlock);
>
> - llvm::Value *reg_top_p = nullptr, *reg_top = nullptr;
> - reg_top_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, reg_top_index,
> - "reg_top_p");
> + llvm::Value *reg_top = nullptr;
> + Address reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index,
> + reg_top_offset, "reg_top_p");
> reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top");
> - llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs);
> - llvm::Value *RegAddr = nullptr;
> - llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty));
> + Address BaseAddr(CGF.Builder.CreateInBoundsGEP(reg_top, reg_offs),
> + CharUnits::fromQuantity(IsFPR ? 16 : 8));
> + Address RegAddr = Address::invalid();
> + llvm::Type *MemTy = CGF.ConvertTypeForMem(Ty);
>
> if (IsIndirect) {
> // If it's been passed indirectly (actually a struct), whatever we find from
> @@ -4364,43 +4487,45 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> // qN+1, ...). We reload and store into a temporary local variable
> // contiguously.
> assert(!IsIndirect && "Homogeneous aggregates should be passed directly");
> + auto BaseTyInfo = getContext().getTypeInfoInChars(QualType(Base, 0));
> llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0));
> llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers);
> - llvm::AllocaInst *Tmp = CGF.CreateTempAlloca(HFATy);
> + Address Tmp = CGF.CreateTempAlloca(HFATy,
> + std::max(TyAlign, BaseTyInfo.second));
> +
> + // On big-endian platforms, the value will be right-aligned in its slot.
> int Offset = 0;
> + if (CGF.CGM.getDataLayout().isBigEndian() &&
> + BaseTyInfo.first.getQuantity() < 16)
> + Offset = 16 - BaseTyInfo.first.getQuantity();
>
> - if (CGF.CGM.getDataLayout().isBigEndian() && Ctx.getTypeSize(Base) < 128)
> - Offset = 16 - Ctx.getTypeSize(Base) / 8;
> for (unsigned i = 0; i < NumMembers; ++i) {
> - llvm::Value *BaseOffset =
> - llvm::ConstantInt::get(CGF.Int32Ty, 16 * i + Offset);
> - llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset);
> - LoadAddr = CGF.Builder.CreateBitCast(
> - LoadAddr, llvm::PointerType::getUnqual(BaseTy));
> - llvm::Value *StoreAddr =
> - CGF.Builder.CreateStructGEP(Tmp->getAllocatedType(), Tmp, i);
> + CharUnits BaseOffset = CharUnits::fromQuantity(16 * i + Offset);
> + Address LoadAddr =
> + CGF.Builder.CreateConstInBoundsByteGEP(BaseAddr, BaseOffset);
> + LoadAddr = CGF.Builder.CreateElementBitCast(LoadAddr, BaseTy);
> +
> + Address StoreAddr =
> + CGF.Builder.CreateConstArrayGEP(Tmp, i, BaseTyInfo.first);
>
> llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr);
> CGF.Builder.CreateStore(Elem, StoreAddr);
> }
>
> - RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy);
> + RegAddr = CGF.Builder.CreateElementBitCast(Tmp, MemTy);
> } else {
> - // Otherwise the object is contiguous in memory
> - unsigned BeAlign = reg_top_index == 2 ? 16 : 8;
> - if (CGF.CGM.getDataLayout().isBigEndian() &&
> - (IsHFA || !isAggregateTypeForABI(Ty)) &&
> - Ctx.getTypeSize(Ty) < (BeAlign * 8)) {
> - int Offset = BeAlign - Ctx.getTypeSize(Ty) / 8;
> - BaseAddr = CGF.Builder.CreatePtrToInt(BaseAddr, CGF.Int64Ty);
> + // Otherwise the object is contiguous in memory.
>
> - BaseAddr = CGF.Builder.CreateAdd(
> - BaseAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be");
> -
> - BaseAddr = CGF.Builder.CreateIntToPtr(BaseAddr, CGF.Int8PtrTy);
> + // It might be right-aligned in its slot.
> + CharUnits SlotSize = BaseAddr.getAlignment();
> + if (CGF.CGM.getDataLayout().isBigEndian() && !IsIndirect &&
> + (IsHFA || !isAggregateTypeForABI(Ty)) &&
> + TyInfo.first < SlotSize) {
> + CharUnits Offset = SlotSize - TyInfo.first;
> + BaseAddr = CGF.Builder.CreateConstInBoundsByteGEP(BaseAddr, Offset);
> }
>
> - RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy);
> + RegAddr = CGF.Builder.CreateElementBitCast(BaseAddr, MemTy);
> }
>
> CGF.EmitBranch(ContBlock);
> @@ -4410,55 +4535,51 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> //=======================================
> CGF.EmitBlock(OnStackBlock);
>
> - llvm::Value *stack_p = nullptr, *OnStackAddr = nullptr;
> - stack_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "stack_p");
> - OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack");
> + Address stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0,
> + CharUnits::Zero(), "stack_p");
> + llvm::Value *OnStackPtr = CGF.Builder.CreateLoad(stack_p, "stack");
>
> - // Again, stack arguments may need realigmnent. In this case both integer and
> + // Again, stack arguments may need realignment. In this case both integer and
> // floating-point ones might be affected.
> - if (!IsIndirect && Ctx.getTypeAlign(Ty) > 64) {
> - int Align = Ctx.getTypeAlign(Ty) / 8;
> + if (!IsIndirect && TyAlign.getQuantity() > 8) {
> + int Align = TyAlign.getQuantity();
>
> - OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty);
> + OnStackPtr = CGF.Builder.CreatePtrToInt(OnStackPtr, CGF.Int64Ty);
>
> - OnStackAddr = CGF.Builder.CreateAdd(
> - OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Align - 1),
> + OnStackPtr = CGF.Builder.CreateAdd(
> + OnStackPtr, llvm::ConstantInt::get(CGF.Int64Ty, Align - 1),
> "align_stack");
> - OnStackAddr = CGF.Builder.CreateAnd(
> - OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, -Align),
> + OnStackPtr = CGF.Builder.CreateAnd(
> + OnStackPtr, llvm::ConstantInt::get(CGF.Int64Ty, -Align),
> "align_stack");
>
> - OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy);
> + OnStackPtr = CGF.Builder.CreateIntToPtr(OnStackPtr, CGF.Int8PtrTy);
> }
> + Address OnStackAddr(OnStackPtr,
> + std::max(CharUnits::fromQuantity(8), TyAlign));
>
> - uint64_t StackSize;
> + // All stack slots are multiples of 8 bytes.
> + CharUnits StackSlotSize = CharUnits::fromQuantity(8);
> + CharUnits StackSize;
> if (IsIndirect)
> - StackSize = 8;
> + StackSize = StackSlotSize;
> else
> - StackSize = Ctx.getTypeSize(Ty) / 8;
> + StackSize = TyInfo.first.RoundUpToAlignment(StackSlotSize);
>
> - // All stack slots are 8 bytes
> - StackSize = llvm::RoundUpToAlignment(StackSize, 8);
> -
> - llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize);
> + llvm::Value *StackSizeC = CGF.Builder.getSize(StackSize);
> llvm::Value *NewStack =
> - CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, "new_stack");
> + CGF.Builder.CreateInBoundsGEP(OnStackPtr, StackSizeC, "new_stack");
>
> // Write the new value of __stack for the next call to va_arg
> CGF.Builder.CreateStore(NewStack, stack_p);
>
> if (CGF.CGM.getDataLayout().isBigEndian() && !isAggregateTypeForABI(Ty) &&
> - Ctx.getTypeSize(Ty) < 64) {
> - int Offset = 8 - Ctx.getTypeSize(Ty) / 8;
> - OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty);
> -
> - OnStackAddr = CGF.Builder.CreateAdd(
> - OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be");
> -
> - OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy);
> + TyInfo.first < StackSlotSize) {
> + CharUnits Offset = StackSlotSize - TyInfo.first;
> + OnStackAddr = CGF.Builder.CreateConstInBoundsByteGEP(OnStackAddr, Offset);
> }
>
> - OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy);
> + OnStackAddr = CGF.Builder.CreateElementBitCast(OnStackAddr, MemTy);
>
> CGF.EmitBranch(ContBlock);
>
> @@ -4467,75 +4588,48 @@ llvm::Value *AArch64ABIInfo::EmitAAPCSVA
> //=======================================
> CGF.EmitBlock(ContBlock);
>
> - llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr");
> - ResAddr->addIncoming(RegAddr, InRegBlock);
> - ResAddr->addIncoming(OnStackAddr, OnStackBlock);
> + Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock,
> + OnStackAddr, OnStackBlock, "vaargs.addr");
>
> if (IsIndirect)
> - return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr");
> + return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"),
> + TyInfo.second);
>
> return ResAddr;
> }
>
> -llvm::Value *AArch64ABIInfo::EmitDarwinVAArg(llvm::Value *VAListAddr,
> - QualType Ty,
> - CodeGenFunction &CGF) const {
> - // We do not support va_arg for aggregates or illegal vector types.
> - // Lower VAArg here for these cases and use the LLVM va_arg instruction for
> - // other cases.
> +Address AArch64ABIInfo::EmitDarwinVAArg(Address VAListAddr, QualType Ty,
> + CodeGenFunction &CGF) const {
> + // The backend's lowering doesn't support va_arg for aggregates or
> + // illegal vector types. Lower VAArg here for these cases and use
> + // the LLVM va_arg instruction for everything else.
> if (!isAggregateTypeForABI(Ty) && !isIllegalVectorType(Ty))
> - return nullptr;
> + return Address::invalid();
>
> - uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8;
> - uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
> + CharUnits SlotSize = CharUnits::fromQuantity(8);
>
> - const Type *Base = nullptr;
> - uint64_t Members = 0;
> - bool isHA = isHomogeneousAggregate(Ty, Base, Members);
> -
> - bool isIndirect = false;
> - // Arguments bigger than 16 bytes which aren't homogeneous aggregates should
> - // be passed indirectly.
> - if (Size > 16 && !isHA) {
> - isIndirect = true;
> - Size = 8;
> - Align = 8;
> + // Empty records are ignored for parameter passing purposes.
> + if (isEmptyRecord(getContext(), Ty, true)) {
> + Address Addr(CGF.Builder.CreateLoad(VAListAddr, "ap.cur"), SlotSize);
> + Addr = CGF.Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(Ty));
> + return Addr;
> }
>
> - llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
> - llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
> + // The size of the actual thing passed, which might end up just
> + // being a pointer for indirect types.
> + auto TyInfo = getContext().getTypeInfoInChars(Ty);
>
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> -
> - if (isEmptyRecord(getContext(), Ty, true)) {
> - // These are ignored for parameter passing purposes.
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - return Builder.CreateBitCast(Addr, PTy);
> - }
> -
> - const uint64_t MinABIAlign = 8;
> - if (Align > MinABIAlign) {
> - llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
> - Addr = Builder.CreateGEP(Addr, Offset);
> - llvm::Value *AsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
> - llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~(Align - 1));
> - llvm::Value *Aligned = Builder.CreateAnd(AsInt, Mask);
> - Addr = Builder.CreateIntToPtr(Aligned, BP, "ap.align");
> - }
> -
> - uint64_t Offset = llvm::RoundUpToAlignment(Size, MinABIAlign);
> - llvm::Value *NextAddr = Builder.CreateGEP(
> - Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> -
> - if (isIndirect)
> - Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP));
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
> + // Arguments bigger than 16 bytes which aren't homogeneous
> + // aggregates should be passed indirectly.
> + bool IsIndirect = false;
> + if (TyInfo.first.getQuantity() > 16) {
> + const Type *Base = nullptr;
> + uint64_t Members = 0;
> + IsIndirect = !isHomogeneousAggregate(Ty, Base, Members);
> + }
>
> - return AddrTyped;
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, IsIndirect,
> + TyInfo, SlotSize, /*AllowHigherAlign*/ true);
> }
>
> //===----------------------------------------------------------------------===//
> @@ -4596,8 +4690,8 @@ private:
>
> void computeInfo(CGFunctionInfo &FI) const override;
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
>
> llvm::CallingConv::ID getLLVMDefaultCC() const;
> llvm::CallingConv::ID getABIDefaultCC() const;
> @@ -4788,7 +4882,7 @@ ABIArgInfo ARMABIInfo::classifyArgumentT
> llvm::Type::getInt32Ty(getVMContext()), 4);
> return ABIArgInfo::getDirect(ResType);
> }
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
> }
>
> // __fp16 gets passed as if it were an int or float, but with the top 16 bits
> @@ -4812,7 +4906,7 @@ ABIArgInfo ARMABIInfo::classifyArgumentT
> }
>
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
> }
>
> // Ignore empty records.
> @@ -4842,8 +4936,9 @@ ABIArgInfo ARMABIInfo::classifyArgumentT
> ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
>
> if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) {
> - return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true,
> - /*Realign=*/TyAlign > ABIAlign);
> + return ABIArgInfo::getIndirect(CharUnits::fromQuantity(ABIAlign),
> + /*ByVal=*/true,
> + /*Realign=*/TyAlign > ABIAlign);
> }
>
> // Otherwise, pass by coercing to a structure of the appropriate size.
> @@ -4956,7 +5051,7 @@ ABIArgInfo ARMABIInfo::classifyReturnTyp
>
> // Large vector types should be returned via memory.
> if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) {
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> // __fp16 gets returned as if it were an int or float, but with the top 16
> @@ -5003,7 +5098,7 @@ ABIArgInfo ARMABIInfo::classifyReturnTyp
> }
>
> // Otherwise return in memory.
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> // Otherwise this is an AAPCS variant.
> @@ -5038,7 +5133,7 @@ ABIArgInfo ARMABIInfo::classifyReturnTyp
> return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
> }
>
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> /// isIllegalVector - check whether Ty is an illegal vector type.
> @@ -5077,80 +5172,40 @@ bool ARMABIInfo::isHomogeneousAggregateS
> return Members <= 4;
> }
>
> -llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - llvm::Type *BP = CGF.Int8PtrTy;
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> -
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> +Address ARMABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + CharUnits SlotSize = CharUnits::fromQuantity(4);
>
> + // Empty records are ignored for parameter passing purposes.
> if (isEmptyRecord(getContext(), Ty, true)) {
> - // These are ignored for parameter passing purposes.
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - return Builder.CreateBitCast(Addr, PTy);
> + Address Addr(CGF.Builder.CreateLoad(VAListAddr), SlotSize);
> + Addr = CGF.Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(Ty));
> + return Addr;
> }
>
> - uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8;
> - uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8;
> + auto TyInfo = getContext().getTypeInfoInChars(Ty);
> + CharUnits TyAlignForABI = TyInfo.second;
> +
> + // Use indirect if size of the illegal vector is bigger than 16 bytes.
> bool IsIndirect = false;
> + if (TyInfo.first > CharUnits::fromQuantity(16) && isIllegalVectorType(Ty)) {
> + IsIndirect = true;
>
> + // Otherwise, bound the type's ABI alignment.
> // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for
> // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte.
> - if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
> - getABIKind() == ARMABIInfo::AAPCS)
> - TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
> - else
> - TyAlign = 4;
> - // Use indirect if size of the illegal vector is bigger than 16 bytes.
> - if (isIllegalVectorType(Ty) && Size > 16) {
> - IsIndirect = true;
> - Size = 4;
> - TyAlign = 4;
> + // Our callers should be prepared to handle an under-aligned address.
> + } else if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
> + getABIKind() == ARMABIInfo::AAPCS) {
> + TyAlignForABI = std::max(TyAlignForABI, CharUnits::fromQuantity(4));
> + TyAlignForABI = std::min(TyAlignForABI, CharUnits::fromQuantity(8));
> + } else {
> + TyAlignForABI = CharUnits::fromQuantity(4);
> }
> + TyInfo.second = TyAlignForABI;
>
> - // Handle address alignment for ABI alignment > 4 bytes.
> - if (TyAlign > 4) {
> - assert((TyAlign & (TyAlign - 1)) == 0 &&
> - "Alignment is not power of 2!");
> - llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty);
> - AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1));
> - AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1)));
> - Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align");
> - }
> -
> - uint64_t Offset =
> - llvm::RoundUpToAlignment(Size, 4);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> -
> - if (IsIndirect)
> - Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP));
> - else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) {
> - // We can't directly cast ap.cur to pointer to a vector type, since ap.cur
> - // may not be correctly aligned for the vector type. We create an aligned
> - // temporary space and copy the content over from ap.cur to the temporary
> - // space. This is necessary if the natural alignment of the type is greater
> - // than the ABI alignment.
> - llvm::Type *I8PtrTy = Builder.getInt8PtrTy();
> - CharUnits CharSize = getContext().getTypeSizeInChars(Ty);
> - llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty),
> - "var.align");
> - llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy);
> - llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy);
> - Builder.CreateMemCpy(Dst, Src,
> - llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()),
> - TyAlign, false);
> - Addr = AlignedTemp; //The content is in aligned location.
> - }
> - llvm::Type *PTy =
> - llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
> -
> - return AddrTyped;
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, IsIndirect, TyInfo,
> + SlotSize, /*AllowHigherAlign*/ true);
> }
>
> //===----------------------------------------------------------------------===//
> @@ -5167,8 +5222,8 @@ public:
> ABIArgInfo classifyArgumentType(QualType Ty) const;
>
> void computeInfo(CGFunctionInfo &FI) const override;
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CFG) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -5207,7 +5262,7 @@ ABIArgInfo NVPTXABIInfo::classifyArgumen
>
> // Return aggregates type as indirect by value
> if (isAggregateTypeForABI(Ty))
> - return ABIArgInfo::getIndirect(0, /* byval */ true);
> + return getNaturalAlignIndirect(Ty, /* byval */ true);
>
> return (Ty->isPromotableIntegerType() ?
> ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
> @@ -5226,8 +5281,8 @@ void NVPTXABIInfo::computeInfo(CGFunctio
> FI.setEffectiveCallingConvention(getRuntimeCC());
> }
>
> -llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CFG) const {
> +Address NVPTXABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> llvm_unreachable("NVPTX does not support varargs");
> }
>
> @@ -5328,8 +5383,8 @@ public:
> I.info = classifyArgumentType(I.type);
> }
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -5430,8 +5485,8 @@ QualType SystemZABIInfo::GetSingleElemen
> return Ty;
> }
>
> -llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> +Address SystemZABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> // Assume that va_list type is correct; should be pointer to LLVM type:
> // struct {
> // i64 __gpr;
> @@ -5443,59 +5498,69 @@ llvm::Value *SystemZABIInfo::EmitVAArg(l
> // Every non-vector argument occupies 8 bytes and is passed by preference
> // in either GPRs or FPRs. Vector arguments occupy 8 or 16 bytes and are
> // always passed on the stack.
> - Ty = CGF.getContext().getCanonicalType(Ty);
> + Ty = getContext().getCanonicalType(Ty);
> + auto TyInfo = getContext().getTypeInfoInChars(Ty);
> llvm::Type *ArgTy = CGF.ConvertTypeForMem(Ty);
> - llvm::Type *APTy = llvm::PointerType::getUnqual(ArgTy);
> + llvm::Type *DirectTy = ArgTy;
> ABIArgInfo AI = classifyArgumentType(Ty);
> bool IsIndirect = AI.isIndirect();
> bool InFPRs = false;
> bool IsVector = false;
> - unsigned UnpaddedBitSize;
> + CharUnits UnpaddedSize;
> + CharUnits DirectAlign;
> if (IsIndirect) {
> - APTy = llvm::PointerType::getUnqual(APTy);
> - UnpaddedBitSize = 64;
> + DirectTy = llvm::PointerType::getUnqual(DirectTy);
> + UnpaddedSize = DirectAlign = CharUnits::fromQuantity(8);
> } else {
> if (AI.getCoerceToType())
> ArgTy = AI.getCoerceToType();
> InFPRs = ArgTy->isFloatTy() || ArgTy->isDoubleTy();
> IsVector = ArgTy->isVectorTy();
> - UnpaddedBitSize = getContext().getTypeSize(Ty);
> + UnpaddedSize = TyInfo.first;
> + DirectAlign = TyInfo.second;
> }
> - unsigned PaddedBitSize = (IsVector && UnpaddedBitSize > 64) ? 128 : 64;
> - assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size.");
> + CharUnits PaddedSize = CharUnits::fromQuantity(8);
> + if (IsVector && UnpaddedSize > PaddedSize)
> + PaddedSize = CharUnits::fromQuantity(16);
> + assert((UnpaddedSize <= PaddedSize) && "Invalid argument size.");
>
> - unsigned PaddedSize = PaddedBitSize / 8;
> - unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8;
> + CharUnits Padding = (PaddedSize - UnpaddedSize);
>
> llvm::Type *IndexTy = CGF.Int64Ty;
> - llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize);
> + llvm::Value *PaddedSizeV =
> + llvm::ConstantInt::get(IndexTy, PaddedSize.getQuantity());
>
> if (IsVector) {
> // Work out the address of a vector argument on the stack.
> // Vector arguments are always passed in the high bits of a
> // single (8 byte) or double (16 byte) stack slot.
> - llvm::Value *OverflowArgAreaPtr =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 2,
> + Address OverflowArgAreaPtr =
> + CGF.Builder.CreateStructGEP(VAListAddr, 2, CharUnits::fromQuantity(16),
> "overflow_arg_area_ptr");
> - llvm::Value *OverflowArgArea =
> - CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area");
> - llvm::Value *MemAddr =
> - CGF.Builder.CreateBitCast(OverflowArgArea, APTy, "mem_addr");
> + Address OverflowArgArea =
> + Address(CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"),
> + TyInfo.second);
> + Address MemAddr =
> + CGF.Builder.CreateElementBitCast(OverflowArgArea, DirectTy, "mem_addr");
>
> // Update overflow_arg_area_ptr pointer
> llvm::Value *NewOverflowArgArea =
> - CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area");
> + CGF.Builder.CreateGEP(OverflowArgArea.getPointer(), PaddedSizeV,
> + "overflow_arg_area");
> CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
>
> return MemAddr;
> }
>
> - unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding;
> + assert(PaddedSize.getQuantity() == 8);
> +
> + unsigned MaxRegs, RegCountField, RegSaveIndex;
> + CharUnits RegPadding;
> if (InFPRs) {
> MaxRegs = 4; // Maximum of 4 FPR arguments
> RegCountField = 1; // __fpr
> RegSaveIndex = 16; // save offset for f0
> - RegPadding = 0; // floats are passed in the high bits of an FPR
> + RegPadding = CharUnits(); // floats are passed in the high bits of an FPR
> } else {
> MaxRegs = 5; // Maximum of 5 GPR arguments
> RegCountField = 0; // __gpr
> @@ -5503,8 +5568,9 @@ llvm::Value *SystemZABIInfo::EmitVAArg(l
> RegPadding = Padding; // values are passed in the low bits of a GPR
> }
>
> - llvm::Value *RegCountPtr = CGF.Builder.CreateStructGEP(
> - nullptr, VAListAddr, RegCountField, "reg_count_ptr");
> + Address RegCountPtr = CGF.Builder.CreateStructGEP(
> + VAListAddr, RegCountField, RegCountField * CharUnits::fromQuantity(8),
> + "reg_count_ptr");
> llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count");
> llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs);
> llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV,
> @@ -5522,17 +5588,20 @@ llvm::Value *SystemZABIInfo::EmitVAArg(l
> llvm::Value *ScaledRegCount =
> CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count");
> llvm::Value *RegBase =
> - llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding);
> + llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize.getQuantity()
> + + RegPadding.getQuantity());
> llvm::Value *RegOffset =
> CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset");
> - llvm::Value *RegSaveAreaPtr =
> - CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "reg_save_area_ptr");
> + Address RegSaveAreaPtr =
> + CGF.Builder.CreateStructGEP(VAListAddr, 3, CharUnits::fromQuantity(24),
> + "reg_save_area_ptr");
> llvm::Value *RegSaveArea =
> CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area");
> - llvm::Value *RawRegAddr =
> - CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr");
> - llvm::Value *RegAddr =
> - CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr");
> + Address RawRegAddr(CGF.Builder.CreateGEP(RegSaveArea, RegOffset,
> + "raw_reg_addr"),
> + PaddedSize);
> + Address RegAddr =
> + CGF.Builder.CreateElementBitCast(RawRegAddr, DirectTy, "reg_addr");
>
> // Update the register count
> llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1);
> @@ -5545,30 +5614,31 @@ llvm::Value *SystemZABIInfo::EmitVAArg(l
> CGF.EmitBlock(InMemBlock);
>
> // Work out the address of a stack argument.
> - llvm::Value *OverflowArgAreaPtr = CGF.Builder.CreateStructGEP(
> - nullptr, VAListAddr, 2, "overflow_arg_area_ptr");
> - llvm::Value *OverflowArgArea =
> - CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area");
> - llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding);
> - llvm::Value *RawMemAddr =
> - CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr");
> - llvm::Value *MemAddr =
> - CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr");
> + Address OverflowArgAreaPtr = CGF.Builder.CreateStructGEP(
> + VAListAddr, 2, CharUnits::fromQuantity(16), "overflow_arg_area_ptr");
> + Address OverflowArgArea =
> + Address(CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"),
> + PaddedSize);
> + Address RawMemAddr =
> + CGF.Builder.CreateConstByteGEP(OverflowArgArea, Padding, "raw_mem_addr");
> + Address MemAddr =
> + CGF.Builder.CreateElementBitCast(RawMemAddr, DirectTy, "mem_addr");
>
> // Update overflow_arg_area_ptr pointer
> llvm::Value *NewOverflowArgArea =
> - CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area");
> + CGF.Builder.CreateGEP(OverflowArgArea.getPointer(), PaddedSizeV,
> + "overflow_arg_area");
> CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
> CGF.EmitBranch(ContBlock);
>
> // Return the appropriate result.
> CGF.EmitBlock(ContBlock);
> - llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr");
> - ResAddr->addIncoming(RegAddr, InRegBlock);
> - ResAddr->addIncoming(MemAddr, InMemBlock);
> + Address ResAddr = emitMergePHI(CGF, RegAddr, InRegBlock,
> + MemAddr, InMemBlock, "va_arg.addr");
>
> if (IsIndirect)
> - return CGF.Builder.CreateLoad(ResAddr, "indirect_arg");
> + ResAddr = Address(CGF.Builder.CreateLoad(ResAddr, "indirect_arg"),
> + TyInfo.second);
>
> return ResAddr;
> }
> @@ -5579,7 +5649,7 @@ ABIArgInfo SystemZABIInfo::classifyRetur
> if (isVectorArgumentType(RetTy))
> return ABIArgInfo::getDirect();
> if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64)
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> return (isPromotableIntegerType(RetTy) ?
> ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
> }
> @@ -5587,7 +5657,7 @@ ABIArgInfo SystemZABIInfo::classifyRetur
> ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
> // Handle the generic C++ ABI.
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> // Integers and enums are extended to full register width.
> if (isPromotableIntegerType(Ty))
> @@ -5604,7 +5674,7 @@ ABIArgInfo SystemZABIInfo::classifyArgum
>
> // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly.
> if (Size != 8 && Size != 16 && Size != 32 && Size != 64)
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> // Handle small structures.
> if (const RecordType *RT = Ty->getAs<RecordType>()) {
> @@ -5612,7 +5682,7 @@ ABIArgInfo SystemZABIInfo::classifyArgum
> // fail the size test above.
> const RecordDecl *RD = RT->getDecl();
> if (RD->hasFlexibleArrayMember())
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> // The structure is passed as an unextended integer, a float, or a double.
> llvm::Type *PassTy;
> @@ -5629,7 +5699,7 @@ ABIArgInfo SystemZABIInfo::classifyArgum
>
> // Non-structure compounds are passed indirectly.
> if (isCompoundType(Ty))
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> return ABIArgInfo::getDirect(nullptr);
> }
> @@ -5694,8 +5764,8 @@ public:
> ABIArgInfo classifyReturnType(QualType RetTy) const;
> ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
> void computeInfo(CGFunctionInfo &FI) const override;
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> bool shouldSignExtUnsignedType(QualType Ty) const override;
> };
>
> @@ -5834,7 +5904,7 @@ MipsABIInfo::classifyArgumentType(QualTy
>
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
> Offset = OrigOffset + MinABIStackAlignInBytes;
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
> }
>
> // If we have reached here, aggregates are passed directly by coercing to
> @@ -5928,7 +5998,7 @@ ABIArgInfo MipsABIInfo::classifyReturnTy
> }
> }
>
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
> }
>
> // Treat an enum type as its underlying type.
> @@ -5951,52 +6021,55 @@ void MipsABIInfo::computeInfo(CGFunction
> I.info = classifyArgumentType(I.type, Offset);
> }
>
> -llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - llvm::Type *BP = CGF.Int8PtrTy;
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> +Address MipsABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType OrigTy) const {
> + QualType Ty = OrigTy;
>
> // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64.
> // Pointers are also promoted in the same way but this only matters for N32.
> unsigned SlotSizeInBits = IsO32 ? 32 : 64;
> unsigned PtrWidth = getTarget().getPointerWidth(0);
> + bool DidPromote = false;
> if ((Ty->isIntegerType() &&
> - CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) ||
> + getContext().getIntWidth(Ty) < SlotSizeInBits) ||
> (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) {
> - Ty = CGF.getContext().getIntTypeForBitwidth(SlotSizeInBits,
> - Ty->isSignedIntegerType());
> + DidPromote = true;
> + Ty = getContext().getIntTypeForBitwidth(SlotSizeInBits,
> + Ty->isSignedIntegerType());
> }
>
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> - int64_t TypeAlign =
> - std::min(getContext().getTypeAlign(Ty) / 8, StackAlignInBytes);
> - llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped;
> - llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty;
> -
> - if (TypeAlign > MinABIStackAlignInBytes) {
> - llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy);
> - llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1);
> - llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign);
> - llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc);
> - llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask);
> - AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy);
> - }
> - else
> - AddrTyped = Builder.CreateBitCast(Addr, PTy);
> + auto TyInfo = getContext().getTypeInfoInChars(Ty);
> +
> + // The alignment of things in the argument area is never larger than
> + // StackAlignInBytes.
> + TyInfo.second =
> + std::min(TyInfo.second, CharUnits::fromQuantity(StackAlignInBytes));
>
> - llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP);
> - TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes);
> - unsigned ArgSizeInBits = CGF.getContext().getTypeSize(Ty);
> - uint64_t Offset = llvm::RoundUpToAlignment(ArgSizeInBits / 8, TypeAlign);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> + // MinABIStackAlignInBytes is the size of argument slots on the stack.
> + CharUnits ArgSlotSize = CharUnits::fromQuantity(MinABIStackAlignInBytes);
>
> - return AddrTyped;
> + Address Addr = emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
> + TyInfo, ArgSlotSize, /*AllowHigherAlign*/ true);
> +
> +
> + // If there was a promotion, "unpromote" into a temporary.
> + // TODO: can we just use a pointer into a subset of the original slot?
> + if (DidPromote) {
> + Address Temp = CGF.CreateMemTemp(OrigTy, "vaarg.promotion-temp");
> + llvm::Value *Promoted = CGF.Builder.CreateLoad(Addr);
> +
> + // Truncate down to the right width.
> + llvm::Type *IntTy = (OrigTy->isIntegerType() ? Temp.getElementType()
> + : CGF.IntPtrTy);
> + llvm::Value *V = CGF.Builder.CreateTrunc(Promoted, IntTy);
> + if (OrigTy->isPointerType())
> + V = CGF.Builder.CreateIntToPtr(V, Temp.getElementType());
> +
> + CGF.Builder.CreateStore(V, Temp);
> + Addr = Temp;
> + }
> +
> + return Addr;
> }
>
> bool MipsABIInfo::shouldSignExtUnsignedType(QualType Ty) const {
> @@ -6118,8 +6191,8 @@ private:
>
> void computeInfo(CGFunctionInfo &FI) const override;
>
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -6156,11 +6229,11 @@ ABIArgInfo HexagonABIInfo::classifyArgum
> return ABIArgInfo::getIgnore();
>
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> uint64_t Size = getContext().getTypeSize(Ty);
> if (Size > 64)
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/true);
> // Pass in the smallest viable integer type.
> else if (Size > 32)
> return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
> @@ -6178,7 +6251,7 @@ ABIArgInfo HexagonABIInfo::classifyRetur
>
> // Large vector types should be returned via memory.
> if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64)
> - return ABIArgInfo::getIndirect(0);
> + return getNaturalAlignIndirect(RetTy);
>
> if (!isAggregateTypeForABI(RetTy)) {
> // Treat an enum type as its underlying type.
> @@ -6206,30 +6279,16 @@ ABIArgInfo HexagonABIInfo::classifyRetur
> return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
> }
>
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
> + return getNaturalAlignIndirect(RetTy, /*ByVal=*/true);
> }
>
> -llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> - // FIXME: Need to handle alignment
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> -
> - CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
> - "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> - llvm::Type *PTy =
> - llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
> - llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
> -
> - uint64_t Offset =
> - llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
> - llvm::Value *NextAddr =
> - Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
> - "ap.next");
> - Builder.CreateStore(NextAddr, VAListAddrAsBPP);
> -
> - return AddrTyped;
> +Address HexagonABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> + // FIXME: Someone needs to audit that this handle alignment correctly.
> + return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*indirect*/ false,
> + getContext().getTypeInfoInChars(Ty),
> + CharUnits::fromQuantity(4),
> + /*AllowHigherAlign*/ true);
> }
>
> //===----------------------------------------------------------------------===//
> @@ -6306,8 +6365,8 @@ public:
> private:
> ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const;
> void computeInfo(CGFunctionInfo &FI) const override;
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
>
> // Coercion type builder for structs passed in registers. The coercion type
> // serves two purposes:
> @@ -6427,7 +6486,7 @@ SparcV9ABIInfo::classifyType(QualType Ty
> // Anything too big to fit in registers is passed with an explicit indirect
> // pointer / sret pointer.
> if (Size > SizeLimit)
> - return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
> + return getNaturalAlignIndirect(Ty, /*ByVal=*/false);
>
> // Treat an enum type as its underlying type.
> if (const EnumType *EnumTy = Ty->getAs<EnumType>())
> @@ -6444,7 +6503,7 @@ SparcV9ABIInfo::classifyType(QualType Ty
> // If a C++ object has either a non-trivial copy constructor or a non-trivial
> // destructor, it is passed with an explicit indirect pointer / sret pointer.
> if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
> - return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
> + return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
>
> // This is a small aggregate type that should be passed in registers.
> // Build a coercion type from the LLVM struct type.
> @@ -6465,55 +6524,59 @@ SparcV9ABIInfo::classifyType(QualType Ty
> return ABIArgInfo::getDirect(CoerceTy);
> }
>
> -llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> +Address SparcV9ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> ABIArgInfo AI = classifyType(Ty, 16 * 8);
> llvm::Type *ArgTy = CGT.ConvertType(Ty);
> if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
> AI.setCoerceToType(ArgTy);
>
> - llvm::Type *BPP = CGF.Int8PtrPtrTy;
> + CharUnits SlotSize = CharUnits::fromQuantity(8);
> +
> CGBuilderTy &Builder = CGF.Builder;
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
> - llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
> + Address Addr(Builder.CreateLoad(VAListAddr, "ap.cur"), SlotSize);
> llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
> - llvm::Value *ArgAddr;
> - unsigned Stride;
>
> + auto TypeInfo = getContext().getTypeInfoInChars(Ty);
> +
> + Address ArgAddr = Address::invalid();
> + CharUnits Stride;
> switch (AI.getKind()) {
> case ABIArgInfo::Expand:
> case ABIArgInfo::InAlloca:
> llvm_unreachable("Unsupported ABI kind for va_arg");
>
> - case ABIArgInfo::Extend:
> - Stride = 8;
> - ArgAddr = Builder
> - .CreateConstGEP1_32(Addr, 8 - getDataLayout().getTypeAllocSize(ArgTy),
> - "extend");
> + case ABIArgInfo::Extend: {
> + Stride = SlotSize;
> + CharUnits Offset = SlotSize - TypeInfo.first;
> + ArgAddr = Builder.CreateConstInBoundsByteGEP(Addr, Offset, "extend");
> break;
> + }
>
> - case ABIArgInfo::Direct:
> - Stride = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
> + case ABIArgInfo::Direct: {
> + auto AllocSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
> + Stride = CharUnits::fromQuantity(AllocSize).RoundUpToAlignment(SlotSize);
> ArgAddr = Addr;
> break;
> + }
>
> case ABIArgInfo::Indirect:
> - Stride = 8;
> - ArgAddr = Builder.CreateBitCast(Addr,
> - llvm::PointerType::getUnqual(ArgPtrTy),
> - "indirect");
> - ArgAddr = Builder.CreateLoad(ArgAddr, "indirect.arg");
> + Stride = SlotSize;
> + ArgAddr = Builder.CreateElementBitCast(Addr, ArgPtrTy, "indirect");
> + ArgAddr = Address(Builder.CreateLoad(ArgAddr, "indirect.arg"),
> + TypeInfo.second);
> break;
>
> case ABIArgInfo::Ignore:
> - return llvm::UndefValue::get(ArgPtrTy);
> + return Address(llvm::UndefValue::get(ArgPtrTy), TypeInfo.second);
> }
>
> // Update VAList.
> - Addr = Builder.CreateConstGEP1_32(Addr, Stride, "ap.next");
> - Builder.CreateStore(Addr, VAListAddrAsBPP);
> + llvm::Value *NextPtr =
> + Builder.CreateConstInBoundsByteGEP(Addr.getPointer(), Stride, "ap.next");
> + Builder.CreateStore(NextPtr, VAListAddr);
>
> - return Builder.CreatePointerCast(ArgAddr, ArgPtrTy, "arg.addr");
> + return Builder.CreateBitCast(ArgAddr, ArgPtrTy, "arg.addr");
> }
>
> void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const {
> @@ -6673,8 +6736,8 @@ public:
> class XCoreABIInfo : public DefaultABIInfo {
> public:
> XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
> - llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const override;
> + Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const override;
> };
>
> class XCoreTargetCodeGenInfo : public TargetCodeGenInfo {
> @@ -6688,52 +6751,53 @@ public:
>
> } // End anonymous namespace.
>
> -llvm::Value *XCoreABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
> - CodeGenFunction &CGF) const {
> +Address XCoreABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
> + QualType Ty) const {
> CGBuilderTy &Builder = CGF.Builder;
>
> // Get the VAList.
> - llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr,
> - CGF.Int8PtrPtrTy);
> - llvm::Value *AP = Builder.CreateLoad(VAListAddrAsBPP);
> + CharUnits SlotSize = CharUnits::fromQuantity(4);
> + Address AP(Builder.CreateLoad(VAListAddr), SlotSize);
>
> // Handle the argument.
> ABIArgInfo AI = classifyArgumentType(Ty);
> + CharUnits TypeAlign = getContext().getTypeAlignInChars(Ty);
> llvm::Type *ArgTy = CGT.ConvertType(Ty);
> if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
> AI.setCoerceToType(ArgTy);
> llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
> - llvm::Value *Val;
> - uint64_t ArgSize = 0;
> +
> + Address Val = Address::invalid();
> + CharUnits ArgSize = CharUnits::Zero();
> switch (AI.getKind()) {
> case ABIArgInfo::Expand:
> case ABIArgInfo::InAlloca:
> llvm_unreachable("Unsupported ABI kind for va_arg");
> case ABIArgInfo::Ignore:
> - Val = llvm::UndefValue::get(ArgPtrTy);
> - ArgSize = 0;
> + Val = Address(llvm::UndefValue::get(ArgPtrTy), TypeAlign);
> + ArgSize = CharUnits::Zero();
> break;
> case ABIArgInfo::Extend:
> case ABIArgInfo::Direct:
> - Val = Builder.CreatePointerCast(AP, ArgPtrTy);
> - ArgSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
> - if (ArgSize < 4)
> - ArgSize = 4;
> + Val = Builder.CreateBitCast(AP, ArgPtrTy);
> + ArgSize = CharUnits::fromQuantity(
> + getDataLayout().getTypeAllocSize(AI.getCoerceToType()));
> + ArgSize = ArgSize.RoundUpToAlignment(SlotSize);
> break;
> case ABIArgInfo::Indirect:
> - llvm::Value *ArgAddr;
> - ArgAddr = Builder.CreateBitCast(AP, llvm::PointerType::getUnqual(ArgPtrTy));
> - ArgAddr = Builder.CreateLoad(ArgAddr);
> - Val = Builder.CreatePointerCast(ArgAddr, ArgPtrTy);
> - ArgSize = 4;
> + Val = Builder.CreateElementBitCast(AP, ArgPtrTy);
> + Val = Address(Builder.CreateLoad(Val), TypeAlign);
> + ArgSize = SlotSize;
> break;
> }
>
> // Increment the VAList.
> - if (ArgSize) {
> - llvm::Value *APN = Builder.CreateConstGEP1_32(AP, ArgSize);
> - Builder.CreateStore(APN, VAListAddrAsBPP);
> + if (!ArgSize.isZero()) {
> + llvm::Value *APN =
> + Builder.CreateConstInBoundsByteGEP(AP.getPointer(), ArgSize);
> + Builder.CreateStore(APN, VAListAddr);
> }
> +
> return Val;
> }
>
>
> Modified: cfe/trunk/test/CodeGen/aarch64-varargs.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-varargs.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/aarch64-varargs.c (original)
> +++ cfe/trunk/test/CodeGen/aarch64-varargs.c Tue Sep 8 03:05:57 2015
> @@ -23,21 +23,19 @@ int simple_int(void) {
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 1)
> -// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> -// CHECK-BE: [[REG_ADDR_VAL:%[0-9]+]] = ptrtoint i8* [[REG_ADDR]] to i64
> -// CHECK-BE: [[REG_ADDR_VAL_ALIGNED:%[a-z_0-9]*]] = add i64 [[REG_ADDR_VAL]], 4
> -// CHECK-BE: [[REG_ADDR:%[0-9]+]] = inttoptr i64 [[REG_ADDR_VAL_ALIGNED]] to i8*
> -// CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to i32*
> +// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> +// CHECK-BE: [[REG_ADDR_ALIGNED:%[0-9]+]] = getelementptr inbounds i8, i8* [[REG_ADDR]], i64 4
> +// CHECK-BE: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR_ALIGNED]] to i32*
> +// CHECK-LE: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to i32*
> // CHECK: br label %[[VAARG_END:[a-z._0-9]+]]
>
> // CHECK: [[VAARG_ON_STACK]]
> // CHECK: [[STACK:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[STACK]], i32 8
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[STACK]], i64 8
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> -// CHECK-BE: [[STACK_VAL:%[0-9]+]] = ptrtoint i8* [[STACK]] to i64
> -// CHECK-BE: [[STACK_VAL_ALIGNED:%[a-z_0-9]*]] = add i64 [[STACK_VAL]], 4
> -// CHECK-BE: [[STACK:%[0-9]+]] = inttoptr i64 [[STACK_VAL_ALIGNED]] to i8*
> -// CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to i32*
> +// CHECK-BE: [[STACK_ALIGNED:%[a-z_0-9]*]] = getelementptr inbounds i8, i8* [[STACK]], i64 4
> +// CHECK-BE: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK_ALIGNED]] to i32*
> +// CHECK-LE: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to i32*
> // CHECK: br label %[[VAARG_END]]
>
> // CHECK: [[VAARG_END]]
> @@ -63,7 +61,7 @@ __int128 aligned_int(void) {
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 1)
> -// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[ALIGNED_REGOFFS]]
> +// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[ALIGNED_REGOFFS]]
> // CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to i128*
> // CHECK: br label %[[VAARG_END:[a-z._0-9]+]]
>
> @@ -73,7 +71,7 @@ __int128 aligned_int(void) {
> // CHECK: [[ALIGN_STACK:%[a-z_0-9]+]] = add i64 [[STACKINT]], 15
> // CHECK: [[ALIGNED_STACK_INT:%[a-z_0-9]+]] = and i64 [[ALIGN_STACK]], -16
> // CHECK: [[ALIGNED_STACK_PTR:%[a-z_0-9]+]] = inttoptr i64 [[ALIGNED_STACK_INT]] to i8*
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[ALIGNED_STACK_PTR]], i32 16
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[ALIGNED_STACK_PTR]], i64 16
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[ALIGNED_STACK_PTR]] to i128*
> // CHECK: br label %[[VAARG_END]]
> @@ -104,14 +102,14 @@ struct bigstruct simple_indirect(void) {
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 1)
> -// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> +// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> // CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to %struct.bigstruct**
> // CHECK: br label %[[VAARG_END:[a-z._0-9]+]]
>
> // CHECK: [[VAARG_ON_STACK]]
> // CHECK: [[STACK:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK-NOT: and i64
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[STACK]], i32 8
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[STACK]], i64 8
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to %struct.bigstruct**
> // CHECK: br label %[[VAARG_END]]
> @@ -141,13 +139,13 @@ struct aligned_bigstruct simple_aligned_
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 1)
> -// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> +// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[GR_OFFS]]
> // CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to %struct.aligned_bigstruct**
> // CHECK: br label %[[VAARG_END:[a-z._0-9]+]]
>
> // CHECK: [[VAARG_ON_STACK]]
> // CHECK: [[STACK:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[STACK]], i32 8
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[STACK]], i64 8
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to %struct.aligned_bigstruct**
> // CHECK: br label %[[VAARG_END]]
> @@ -172,16 +170,15 @@ double simple_double(void) {
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 2)
> -// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[VR_OFFS]]
> -// CHECK-BE: [[REG_ADDR_VAL:%[0-9]+]] = ptrtoint i8* [[REG_ADDR]] to i64
> -// CHECK-BE: [[REG_ADDR_VAL_ALIGNED:%[a-z_0-9]*]] = add i64 [[REG_ADDR_VAL]], 8
> -// CHECK-BE: [[REG_ADDR:%[0-9]+]] = inttoptr i64 [[REG_ADDR_VAL_ALIGNED]] to i8*
> -// CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to double*
> +// CHECK: [[REG_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[VR_OFFS]]
> +// CHECK-BE: [[REG_ADDR_ALIGNED:%[a-z_0-9]*]] = getelementptr inbounds i8, i8* [[REG_ADDR]], i64 8
> +// CHECK-BE: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR_ALIGNED]] to double*
> +// CHECK-LE: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast i8* [[REG_ADDR]] to double*
> // CHECK: br label %[[VAARG_END:[a-z._0-9]+]]
>
> // CHECK: [[VAARG_ON_STACK]]
> // CHECK: [[STACK:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[STACK]], i32 8
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[STACK]], i64 8
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to double*
> // CHECK: br label %[[VAARG_END]]
> @@ -211,17 +208,17 @@ struct hfa simple_hfa(void) {
>
> // CHECK: [[VAARG_IN_REG]]
> // CHECK: [[REG_TOP:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 2)
> -// CHECK: [[FIRST_REG:%[a-z_0-9]+]] = getelementptr i8, i8* [[REG_TOP]], i32 [[VR_OFFS]]
> -// CHECK-LE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[FIRST_REG]], i32 0
> -// CHECK-BE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[FIRST_REG]], i32 12
> +// CHECK: [[FIRST_REG:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[REG_TOP]], i32 [[VR_OFFS]]
> +// CHECK-LE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[FIRST_REG]], i64 0
> +// CHECK-BE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[FIRST_REG]], i64 12
> // CHECK: [[EL_TYPED:%[a-z_0-9]+]] = bitcast i8* [[EL_ADDR]] to float*
> -// CHECK: [[EL_TMPADDR:%[a-z_0-9]+]] = getelementptr inbounds [2 x float], [2 x float]* %[[TMP_HFA:[a-z_.0-9]+]], i32 0, i32 0
> +// CHECK: [[EL_TMPADDR:%[a-z_0-9]+]] = getelementptr inbounds [2 x float], [2 x float]* %[[TMP_HFA:[a-z_.0-9]+]], i64 0, i64 0
> // CHECK: [[EL:%[a-z_0-9]+]] = load float, float* [[EL_TYPED]]
> // CHECK: store float [[EL]], float* [[EL_TMPADDR]]
> -// CHECK-LE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[FIRST_REG]], i32 16
> -// CHECK-BE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr i8, i8* [[FIRST_REG]], i32 28
> +// CHECK-LE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[FIRST_REG]], i64 16
> +// CHECK-BE: [[EL_ADDR:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[FIRST_REG]], i64 28
> // CHECK: [[EL_TYPED:%[a-z_0-9]+]] = bitcast i8* [[EL_ADDR]] to float*
> -// CHECK: [[EL_TMPADDR:%[a-z_0-9]+]] = getelementptr inbounds [2 x float], [2 x float]* %[[TMP_HFA]], i32 0, i32 1
> +// CHECK: [[EL_TMPADDR:%[a-z_0-9]+]] = getelementptr inbounds [2 x float], [2 x float]* %[[TMP_HFA]], i64 0, i64 1
> // CHECK: [[EL:%[a-z_0-9]+]] = load float, float* [[EL_TYPED]]
> // CHECK: store float [[EL]], float* [[EL_TMPADDR]]
> // CHECK: [[FROMREG_ADDR:%[a-z_0-9]+]] = bitcast [2 x float]* %[[TMP_HFA]] to %struct.hfa*
> @@ -229,7 +226,7 @@ struct hfa simple_hfa(void) {
>
> // CHECK: [[VAARG_ON_STACK]]
> // CHECK: [[STACK:%[a-z_0-9]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> -// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr i8, i8* [[STACK]], i32 8
> +// CHECK: [[NEW_STACK:%[a-z_0-9]+]] = getelementptr inbounds i8, i8* [[STACK]], i64 8
> // CHECK: store i8* [[NEW_STACK]], i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0)
> // CHECK: [[FROMSTACK_ADDR:%[a-z_0-9]+]] = bitcast i8* [[STACK]] to %struct.hfa*
> // CHECK: br label %[[VAARG_END]]
>
> Modified: cfe/trunk/test/CodeGen/arm-abi-vector.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-abi-vector.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm-abi-vector.c (original)
> +++ cfe/trunk/test/CodeGen/arm-abi-vector.c Tue Sep 8 03:05:57 2015
> @@ -14,18 +14,20 @@ typedef __attribute__(( ext_vector_type(
> // Passing legal vector types as varargs.
> double varargs_vec_2i(int fixed, ...) {
> // CHECK: varargs_vec_2i
> -// CHECK: alloca <2 x i32>, align 8
> -// CHECK: [[ALIGN:%.*]] = and i32 [[VAR:%.*]], -8
> +// CHECK: [[VAR:%.*]] = alloca <2 x i32>, align 8
> +// CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 8
> -// CHECK: bitcast i8* [[AP_ALIGN]] to <2 x i32>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 8
> +// CHECK: [[AP_CAST:%.*]] = bitcast i8* [[AP_ALIGN]] to <2 x i32>*
> +// CHECK: [[VEC:%.*]] = load <2 x i32>, <2 x i32>* [[AP_CAST]], align 8
> +// CHECK: store <2 x i32> [[VEC]], <2 x i32>* [[VAR]], align 8
> // APCS-GNU: varargs_vec_2i
> -// APCS-GNU: alloca <2 x i32>, align 8
> -// APCS-GNU: [[VAR_ALIGN:%.*]] = alloca <2 x i32>
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 8
> -// APCS-GNU: bitcast <2 x i32>* [[VAR_ALIGN]] to i8*
> -// APCS-GNU: call void @llvm.memcpy
> -// APCS-GNU: load <2 x i32>, <2 x i32>* [[VAR_ALIGN]]
> +// APCS-GNU: [[VAR:%.*]] = alloca <2 x i32>, align 8
> +// APCS-GNU: [[AP:%.*]] = load i8*,
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP]], i32 8
> +// APCS-GNU: [[AP_CAST:%.*]] = bitcast i8* [[AP]] to <2 x i32>*
> +// APCS-GNU: [[VEC:%.*]] = load <2 x i32>, <2 x i32>* [[AP_CAST]], align 4
> +// APCS-GNU: store <2 x i32> [[VEC]], <2 x i32>* [[VAR]], align 8
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -46,11 +48,11 @@ double test_2i(__int2 *in) {
> double varargs_vec_3c(int fixed, ...) {
> // CHECK: varargs_vec_3c
> // CHECK: alloca <3 x i8>, align 4
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP:%.*]], i32 4
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP:%.*]], i32 4
> // CHECK: bitcast i8* [[AP]] to <3 x i8>*
> // APCS-GNU: varargs_vec_3c
> // APCS-GNU: alloca <3 x i8>, align 4
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP:%.*]], i32 4
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP:%.*]], i32 4
> // APCS-GNU: bitcast i8* [[AP]] to <3 x i8>*
> va_list ap;
> double sum = fixed;
> @@ -71,18 +73,20 @@ double test_3c(__char3 *in) {
>
> double varargs_vec_5c(int fixed, ...) {
> // CHECK: varargs_vec_5c
> -// CHECK: alloca <5 x i8>, align 8
> +// CHECK: [[VAR:%.*]] = alloca <5 x i8>, align 8
> // CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 8
> -// CHECK: bitcast i8* [[AP_ALIGN]] to <5 x i8>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 8
> +// CHECK: [[AP_CAST:%.*]] = bitcast i8* [[AP_ALIGN]] to <5 x i8>*
> +// CHECK: [[VEC:%.*]] = load <5 x i8>, <5 x i8>* [[AP_CAST]], align 8
> +// CHECK: store <5 x i8> [[VEC]], <5 x i8>* [[VAR]], align 8
> // APCS-GNU: varargs_vec_5c
> -// APCS-GNU: alloca <5 x i8>, align 8
> -// APCS-GNU: [[VAR_ALIGN:%.*]] = alloca <5 x i8>
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 8
> -// APCS-GNU: bitcast <5 x i8>* [[VAR_ALIGN]] to i8*
> -// APCS-GNU: call void @llvm.memcpy
> -// APCS-GNU: load <5 x i8>, <5 x i8>* [[VAR_ALIGN]]
> +// APCS-GNU: [[VAR:%.*]] = alloca <5 x i8>, align 8
> +// APCS-GNU: [[AP:%.*]] = load i8*,
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP]], i32 8
> +// APCS-GNU: [[AP_CAST:%.*]] = bitcast i8* [[AP]] to <5 x i8>*
> +// APCS-GNU: [[VEC:%.*]] = load <5 x i8>, <5 x i8>* [[AP_CAST]], align 4
> +// APCS-GNU: store <5 x i8> [[VEC]], <5 x i8>* [[VAR]], align 8
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -102,21 +106,20 @@ double test_5c(__char5 *in) {
>
> double varargs_vec_9c(int fixed, ...) {
> // CHECK: varargs_vec_9c
> -// CHECK: alloca <9 x i8>, align 16
> -// CHECK: [[VAR_ALIGN:%.*]] = alloca <9 x i8>
> +// CHECK: [[VAR:%.*]] = alloca <9 x i8>, align 16
> // CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> -// CHECK: bitcast <9 x i8>* [[VAR_ALIGN]] to i8*
> -// CHECK: call void @llvm.memcpy
> -// CHECK: load <9 x i8>, <9 x i8>* [[VAR_ALIGN]]
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_CAST:%.*]] = bitcast i8* [[AP_ALIGN]] to <9 x i8>*
> +// CHECK: [[T0:%.*]] = load <9 x i8>, <9 x i8>* [[AP_CAST]], align 8
> +// CHECK: store <9 x i8> [[T0]], <9 x i8>* [[VAR]], align 16
> // APCS-GNU: varargs_vec_9c
> -// APCS-GNU: alloca <9 x i8>, align 16
> -// APCS-GNU: [[VAR_ALIGN:%.*]] = alloca <9 x i8>
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 16
> -// APCS-GNU: bitcast <9 x i8>* [[VAR_ALIGN]] to i8*
> -// APCS-GNU: call void @llvm.memcpy
> -// APCS-GNU: load <9 x i8>, <9 x i8>* [[VAR_ALIGN]]
> +// APCS-GNU: [[VAR:%.*]] = alloca <9 x i8>, align 16
> +// APCS-GNU: [[AP:%.*]] = load i8*,
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP]], i32 16
> +// APCS-GNU: [[AP_CAST:%.*]] = bitcast i8* [[AP]] to <9 x i8>*
> +// APCS-GNU: [[VEC:%.*]] = load <9 x i8>, <9 x i8>* [[AP_CAST]], align 4
> +// APCS-GNU: store <9 x i8> [[VEC]], <9 x i8>* [[VAR]], align 16
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -136,15 +139,13 @@ double test_9c(__char9 *in) {
>
> double varargs_vec_19c(int fixed, ...) {
> // CHECK: varargs_vec_19c
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP:%.*]], i32 4
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <19 x i8>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP:%.*]], i32 4
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP]] to <19 x i8>**
> +// CHECK: [[VAR2:%.*]] = load <19 x i8>*, <19 x i8>** [[VAR]]
> // APCS-GNU: varargs_vec_19c
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP:%.*]], i32 4
> -// APCS-GNU: [[VAR:%.*]] = bitcast i8* [[AP]] to i8**
> -// APCS-GNU: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// APCS-GNU: bitcast i8* [[VAR2]] to <19 x i8>*
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP:%.*]], i32 4
> +// APCS-GNU: [[VAR:%.*]] = bitcast i8* [[AP]] to <19 x i8>**
> +// APCS-GNU: [[VAR2:%.*]] = load <19 x i8>*, <19 x i8>** [[VAR]]
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -167,15 +168,14 @@ double varargs_vec_3s(int fixed, ...) {
> // CHECK: alloca <3 x i16>, align 8
> // CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 8
> // CHECK: bitcast i8* [[AP_ALIGN]] to <3 x i16>*
> // APCS-GNU: varargs_vec_3s
> -// APCS-GNU: alloca <3 x i16>, align 8
> -// APCS-GNU: [[VAR_ALIGN:%.*]] = alloca <3 x i16>
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 8
> -// APCS-GNU: bitcast <3 x i16>* [[VAR_ALIGN]] to i8*
> -// APCS-GNU: call void @llvm.memcpy
> -// APCS-GNU: load <3 x i16>, <3 x i16>* [[VAR_ALIGN]]
> +// APCS-GNU: [[VAR:%.*]] = alloca <3 x i16>, align 8
> +// APCS-GNU: [[AP:%.*]] = load i8*,
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP]], i32 8
> +// APCS-GNU: [[AP_CAST:%.*]] = bitcast i8* [[AP]] to <3 x i16>*
> +// APCS-GNU: [[VEC:%.*]] = load <3 x i16>, <3 x i16>* [[AP_CAST]], align 4
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -195,21 +195,19 @@ double test_3s(__short3 *in) {
>
> double varargs_vec_5s(int fixed, ...) {
> // CHECK: varargs_vec_5s
> -// CHECK: alloca <5 x i16>, align 16
> -// CHECK: [[VAR_ALIGN:%.*]] = alloca <5 x i16>
> +// CHECK: [[VAR_ALIGN:%.*]] = alloca <5 x i16>, align 16
> // CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> -// CHECK: bitcast <5 x i16>* [[VAR_ALIGN]] to i8*
> -// CHECK: call void @llvm.memcpy
> -// CHECK: load <5 x i16>, <5 x i16>* [[VAR_ALIGN]]
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_CAST:%.*]] = bitcast i8* [[AP_ALIGN]] to <5 x i16>*
> +// CHECK: [[VEC:%.*]] = load <5 x i16>, <5 x i16>* [[AP_CAST]], align 8
> +// CHECK: store <5 x i16> [[VEC]], <5 x i16>* [[VAR_ALIGN]], align 16
> // APCS-GNU: varargs_vec_5s
> -// APCS-GNU: alloca <5 x i16>, align 16
> -// APCS-GNU: [[VAR_ALIGN:%.*]] = alloca <5 x i16>
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 16
> -// APCS-GNU: bitcast <5 x i16>* [[VAR_ALIGN]] to i8*
> -// APCS-GNU: call void @llvm.memcpy
> -// APCS-GNU: load <5 x i16>, <5 x i16>* [[VAR_ALIGN]]
> +// APCS-GNU: [[VAR:%.*]] = alloca <5 x i16>, align 16
> +// APCS-GNU: [[AP:%.*]] = load i8*,
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP]], i32 16
> +// APCS-GNU: [[AP_CAST:%.*]] = bitcast i8* [[AP]] to <5 x i16>*
> +// APCS-GNU: [[VEC:%.*]] = load <5 x i16>, <5 x i16>* [[AP_CAST]], align 4
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -238,11 +236,11 @@ double varargs_struct(int fixed, ...) {
> // CHECK: varargs_struct
> // CHECK: [[ALIGN:%.*]] = and i32 {{%.*}}, -8
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i32 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i32 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to %struct.StructWithVec*
> // APCS-GNU: varargs_struct
> // APCS-GNU: [[VAR_ALIGN:%.*]] = alloca %struct.StructWithVec
> -// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr i8, i8* {{%.*}}, i32 16
> +// APCS-GNU: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* {{%.*}}, i32 16
> // APCS-GNU: bitcast %struct.StructWithVec* [[VAR_ALIGN]] to i8*
> // APCS-GNU: call void @llvm.memcpy
> va_list ap;
>
> Modified: cfe/trunk/test/CodeGen/arm-arguments.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-arguments.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm-arguments.c (original)
> +++ cfe/trunk/test/CodeGen/arm-arguments.c Tue Sep 8 03:05:57 2015
> @@ -159,13 +159,13 @@ struct s30 f30() {}
> struct s31 { char x; };
> void f31(struct s31 s) { }
> // AAPCS: @f31([1 x i32] %s.coerce)
> -// AAPCS: %s = alloca %struct.s31, align 4
> -// AAPCS: alloca [1 x i32]
> -// AAPCS: store [1 x i32] %s.coerce, [1 x i32]*
> +// AAPCS: %s = alloca %struct.s31, align 1
> +// AAPCS: [[TEMP:%.*]] = alloca [1 x i32], align 4
> +// AAPCS: store [1 x i32] %s.coerce, [1 x i32]* [[TEMP]], align 4
> // APCS-GNU: @f31([1 x i32] %s.coerce)
> -// APCS-GNU: %s = alloca %struct.s31, align 4
> -// APCS-GNU: alloca [1 x i32]
> -// APCS-GNU: store [1 x i32] %s.coerce, [1 x i32]*
> +// APCS-GNU: %s = alloca %struct.s31, align 1
> +// APCS-GNU: [[TEMP:%.*]] = alloca [1 x i32], align 4
> +// APCS-GNU: store [1 x i32] %s.coerce, [1 x i32]* [[TEMP]], align 4
>
> // PR13562
> struct s32 { double x; };
>
> Modified: cfe/trunk/test/CodeGen/arm64-abi-vector.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-abi-vector.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm64-abi-vector.c (original)
> +++ cfe/trunk/test/CodeGen/arm64-abi-vector.c Tue Sep 8 03:05:57 2015
> @@ -16,7 +16,7 @@ typedef __attribute__(( ext_vector_type(
> double varargs_vec_3c(int fixed, ...) {
> // CHECK: varargs_vec_3c
> // CHECK: alloca <3 x i8>, align 4
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <3 x i8>*
> va_list ap;
> double sum = fixed;
> @@ -36,7 +36,7 @@ double test_3c(__char3 *in) {
> double varargs_vec_4c(int fixed, ...) {
> // CHECK: varargs_vec_4c
> // CHECK: alloca <4 x i8>, align 4
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <4 x i8>*
> va_list ap;
> double sum = fixed;
> @@ -56,7 +56,7 @@ double test_4c(__char4 *in) {
> double varargs_vec_5c(int fixed, ...) {
> // CHECK: varargs_vec_5c
> // CHECK: alloca <5 x i8>, align 8
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <5 x i8>*
> va_list ap;
> double sum = fixed;
> @@ -78,7 +78,7 @@ double varargs_vec_9c(int fixed, ...) {
> // CHECK: alloca <9 x i8>, align 16
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <9 x i8>*
> va_list ap;
> double sum = fixed;
> @@ -97,10 +97,9 @@ double test_9c(__char9 *in) {
>
> double varargs_vec_19c(int fixed, ...) {
> // CHECK: varargs_vec_19c
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <19 x i8>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <19 x i8>**
> +// CHECK: [[VAR2:%.*]] = load <19 x i8>*, <19 x i8>** [[VAR]]
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -119,7 +118,7 @@ double test_19c(__char19 *in) {
> double varargs_vec_3s(int fixed, ...) {
> // CHECK: varargs_vec_3s
> // CHECK: alloca <3 x i16>, align 8
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <3 x i16>*
> va_list ap;
> double sum = fixed;
> @@ -141,7 +140,7 @@ double varargs_vec_5s(int fixed, ...) {
> // CHECK: alloca <5 x i16>, align 16
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <5 x i16>*
> va_list ap;
> double sum = fixed;
> @@ -163,7 +162,7 @@ double varargs_vec_3i(int fixed, ...) {
> // CHECK: alloca <3 x i32>, align 16
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <3 x i32>*
> va_list ap;
> double sum = fixed;
> @@ -183,10 +182,9 @@ double test_3i(__int3 *in) {
> double varargs_vec_5i(int fixed, ...) {
> // CHECK: varargs_vec_5i
> // CHECK: alloca <5 x i32>, align 16
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <5 x i32>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <5 x i32>**
> +// CHECK: [[VAR2:%.*]] = load <5 x i32>*, <5 x i32>** [[VAR]]
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -205,10 +203,9 @@ double test_5i(__int5 *in) {
> double varargs_vec_3d(int fixed, ...) {
> // CHECK: varargs_vec_3d
> // CHECK: alloca <3 x double>, align 16
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <3 x double>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <3 x double>**
> +// CHECK: [[VAR2:%.*]] = load <3 x double>*, <3 x double>** [[VAR]]
> va_list ap;
> double sum = fixed;
> va_start(ap, fixed);
> @@ -230,52 +227,49 @@ double varargs_vec(int fixed, ...) {
> double sum = fixed;
> va_start(ap, fixed);
> __char3 c3 = va_arg(ap, __char3);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <3 x i8>*
> sum = sum + c3.x + c3.y;
> __char5 c5 = va_arg(ap, __char5);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <5 x i8>*
> sum = sum + c5.x + c5.y;
> __char9 c9 = va_arg(ap, __char9);
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <9 x i8>*
> sum = sum + c9.x + c9.y;
> __char19 c19 = va_arg(ap, __char19);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <19 x i8>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <19 x i8>**
> +// CHECK: [[VAR2:%.*]] = load <19 x i8>*, <19 x i8>** [[VAR]]
> sum = sum + c19.x + c19.y;
> __short3 s3 = va_arg(ap, __short3);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> // CHECK: bitcast i8* [[AP_CUR]] to <3 x i16>*
> sum = sum + s3.x + s3.y;
> __short5 s5 = va_arg(ap, __short5);
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <5 x i16>*
> sum = sum + s5.x + s5.y;
> __int3 i3 = va_arg(ap, __int3);
> // CHECK: [[ALIGN:%.*]] = and i64 {{%.*}}, -16
> // CHECK: [[AP_ALIGN:%.*]] = inttoptr i64 [[ALIGN]] to i8*
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_ALIGN]], i32 16
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_ALIGN]], i64 16
> // CHECK: bitcast i8* [[AP_ALIGN]] to <3 x i32>*
> sum = sum + i3.x + i3.y;
> __int5 i5 = va_arg(ap, __int5);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <5 x i32>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <5 x i32>**
> +// CHECK: [[VAR2:%.*]] = load <5 x i32>*, <5 x i32>** [[VAR]]
> sum = sum + i5.x + i5.y;
> __double3 d3 = va_arg(ap, __double3);
> -// CHECK: [[AP_NEXT:%.*]] = getelementptr i8, i8* [[AP_CUR:%.*]], i32 8
> -// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to i8**
> -// CHECK: [[VAR2:%.*]] = load i8*, i8** [[VAR]]
> -// CHECK: bitcast i8* [[VAR2]] to <3 x double>*
> +// CHECK: [[AP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[AP_CUR:%.*]], i64 8
> +// CHECK: [[VAR:%.*]] = bitcast i8* [[AP_CUR]] to <3 x double>**
> +// CHECK: [[VAR2:%.*]] = load <3 x double>*, <3 x double>** [[VAR]]
> sum = sum + d3.x + d3.y;
> va_end(ap);
> return sum;
>
> Modified: cfe/trunk/test/CodeGen/arm64-arguments.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-arguments.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm64-arguments.c (original)
> +++ cfe/trunk/test/CodeGen/arm64-arguments.c Tue Sep 8 03:05:57 2015
> @@ -117,7 +117,7 @@ struct s30 f30() {}
> struct s31 { char x; };
> void f31(struct s31 s) { }
> // CHECK: define void @f31(i64 %s.coerce)
> -// CHECK: %s = alloca %struct.s31, align 8
> +// CHECK: %s = alloca %struct.s31, align 1
> // CHECK: trunc i64 %s.coerce to i8
> // CHECK: store i8 %{{.*}},
>
> @@ -273,10 +273,10 @@ typedef struct s38 s38_no_align;
> __attribute__ ((noinline))
> int f38(int i, s38_no_align s1, s38_no_align s2) {
> // CHECK: define i32 @f38(i32 %i, i64 %s1.coerce, i64 %s2.coerce)
> -// CHECK: %s1 = alloca %struct.s38, align 8
> -// CHECK: %s2 = alloca %struct.s38, align 8
> -// CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 8
> -// CHECK: store i64 %s2.coerce, i64* %{{.*}}, align 8
> +// CHECK: %s1 = alloca %struct.s38, align 4
> +// CHECK: %s2 = alloca %struct.s38, align 4
> +// CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4
> +// CHECK: store i64 %s2.coerce, i64* %{{.*}}, align 4
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s1, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s2, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s1, i32 0, i32 1
> @@ -297,10 +297,10 @@ __attribute__ ((noinline))
> int f38_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8,
> int i9, s38_no_align s1, s38_no_align s2) {
> // CHECK: define i32 @f38_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i64 %s1.coerce, i64 %s2.coerce)
> -// CHECK: %s1 = alloca %struct.s38, align 8
> -// CHECK: %s2 = alloca %struct.s38, align 8
> -// CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 8
> -// CHECK: store i64 %s2.coerce, i64* %{{.*}}, align 8
> +// CHECK: %s1 = alloca %struct.s38, align 4
> +// CHECK: %s2 = alloca %struct.s38, align 4
> +// CHECK: store i64 %s1.coerce, i64* %{{.*}}, align 4
> +// CHECK: store i64 %s2.coerce, i64* %{{.*}}, align 4
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s1, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s2, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s38, %struct.s38* %s1, i32 0, i32 1
> @@ -381,10 +381,10 @@ typedef struct s40 s40_no_align;
> __attribute__ ((noinline))
> int f40(int i, s40_no_align s1, s40_no_align s2) {
> // CHECK: define i32 @f40(i32 %i, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce)
> -// CHECK: %s1 = alloca %struct.s40, align 8
> -// CHECK: %s2 = alloca %struct.s40, align 8
> -// CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 8
> -// CHECK: store [2 x i64] %s2.coerce, [2 x i64]* %{{.*}}, align 8
> +// CHECK: %s1 = alloca %struct.s40, align 4
> +// CHECK: %s2 = alloca %struct.s40, align 4
> +// CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4
> +// CHECK: store [2 x i64] %s2.coerce, [2 x i64]* %{{.*}}, align 4
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s1, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s2, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s1, i32 0, i32 1
> @@ -405,10 +405,10 @@ __attribute__ ((noinline))
> int f40_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8,
> int i9, s40_no_align s1, s40_no_align s2) {
> // CHECK: define i32 @f40_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, [2 x i64] %s1.coerce, [2 x i64] %s2.coerce)
> -// CHECK: %s1 = alloca %struct.s40, align 8
> -// CHECK: %s2 = alloca %struct.s40, align 8
> -// CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 8
> -// CHECK: store [2 x i64] %s2.coerce, [2 x i64]* %{{.*}}, align 8
> +// CHECK: %s1 = alloca %struct.s40, align 4
> +// CHECK: %s2 = alloca %struct.s40, align 4
> +// CHECK: store [2 x i64] %s1.coerce, [2 x i64]* %{{.*}}, align 4
> +// CHECK: store [2 x i64] %s2.coerce, [2 x i64]* %{{.*}}, align 4
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s1, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s2, i32 0, i32 0
> // CHECK: getelementptr inbounds %struct.s40, %struct.s40* %s1, i32 0, i32 1
> @@ -629,7 +629,7 @@ float test_hfa(int n, ...) {
> // CHECK: [[CURLIST:%.*]] = load i8*, i8** [[THELIST]]
>
> // HFA is not indirect, so occupies its full 16 bytes on the stack.
> -// CHECK: [[NEXTLIST:%.*]] = getelementptr i8, i8* [[CURLIST]], i32 16
> +// CHECK: [[NEXTLIST:%.*]] = getelementptr inbounds i8, i8* [[CURLIST]], i64 16
> // CHECK: store i8* [[NEXTLIST]], i8** [[THELIST]]
>
> // CHECK: bitcast i8* [[CURLIST]] to %struct.HFA*
> @@ -656,12 +656,11 @@ float test_toobig_hfa(int n, ...) {
>
> // TooBigHFA is not actually an HFA, so gets passed indirectly. Only 8 bytes
> // of stack consumed.
> -// CHECK: [[NEXTLIST:%.*]] = getelementptr i8, i8* [[CURLIST]], i32 8
> +// CHECK: [[NEXTLIST:%.*]] = getelementptr inbounds i8, i8* [[CURLIST]], i64 8
> // CHECK: store i8* [[NEXTLIST]], i8** [[THELIST]]
>
> -// CHECK: [[HFAPTRPTR:%.*]] = bitcast i8* [[CURLIST]] to i8**
> -// CHECK: [[HFAPTR:%.*]] = load i8*, i8** [[HFAPTRPTR]]
> -// CHECK: bitcast i8* [[HFAPTR]] to %struct.TooBigHFA*
> +// CHECK: [[HFAPTRPTR:%.*]] = bitcast i8* [[CURLIST]] to %struct.TooBigHFA**
> +// CHECK: [[HFAPTR:%.*]] = load %struct.TooBigHFA*, %struct.TooBigHFA** [[HFAPTRPTR]]
> __builtin_va_list thelist;
> __builtin_va_start(thelist, n);
> struct TooBigHFA h = __builtin_va_arg(thelist, struct TooBigHFA);
> @@ -679,12 +678,12 @@ int32x4_t test_hva(int n, ...) {
>
> // HVA is not indirect, so occupies its full 16 bytes on the stack. but it
> // must be properly aligned.
> -// CHECK: [[ALIGN0:%.*]] = getelementptr i8, i8* [[CURLIST]], i32 15
> -// CHECK: [[ALIGN1:%.*]] = ptrtoint i8* [[ALIGN0]] to i64
> +// CHECK: [[ALIGN0:%.*]] = ptrtoint i8* [[CURLIST]] to i64
> +// CHECK: [[ALIGN1:%.*]] = add i64 [[ALIGN0]], 15
> // CHECK: [[ALIGN2:%.*]] = and i64 [[ALIGN1]], -16
> // CHECK: [[ALIGNED_LIST:%.*]] = inttoptr i64 [[ALIGN2]] to i8*
>
> -// CHECK: [[NEXTLIST:%.*]] = getelementptr i8, i8* [[ALIGNED_LIST]], i32 32
> +// CHECK: [[NEXTLIST:%.*]] = getelementptr inbounds i8, i8* [[ALIGNED_LIST]], i64 32
> // CHECK: store i8* [[NEXTLIST]], i8** [[THELIST]]
>
> // CHECK: bitcast i8* [[ALIGNED_LIST]] to %struct.HVA*
> @@ -705,12 +704,11 @@ int32x4_t test_toobig_hva(int n, ...) {
>
> // TooBigHVA is not actually an HVA, so gets passed indirectly. Only 8 bytes
> // of stack consumed.
> -// CHECK: [[NEXTLIST:%.*]] = getelementptr i8, i8* [[CURLIST]], i32 8
> +// CHECK: [[NEXTLIST:%.*]] = getelementptr inbounds i8, i8* [[CURLIST]], i64 8
> // CHECK: store i8* [[NEXTLIST]], i8** [[THELIST]]
>
> -// CHECK: [[HVAPTRPTR:%.*]] = bitcast i8* [[CURLIST]] to i8**
> -// CHECK: [[HVAPTR:%.*]] = load i8*, i8** [[HVAPTRPTR]]
> -// CHECK: bitcast i8* [[HVAPTR]] to %struct.TooBigHVA*
> +// CHECK: [[HVAPTRPTR:%.*]] = bitcast i8* [[CURLIST]] to %struct.TooBigHVA**
> +// CHECK: [[HVAPTR:%.*]] = load %struct.TooBigHVA*, %struct.TooBigHVA** [[HVAPTRPTR]]
> __builtin_va_list thelist;
> __builtin_va_start(thelist, n);
> struct TooBigHVA h = __builtin_va_arg(thelist, struct TooBigHVA);
>
> Modified: cfe/trunk/test/CodeGen/arm64-be-hfa-vararg.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-be-hfa-vararg.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm64-be-hfa-vararg.c (original)
> +++ cfe/trunk/test/CodeGen/arm64-be-hfa-vararg.c Tue Sep 8 03:05:57 2015
> @@ -4,7 +4,15 @@
>
> // A single member HFA must be aligned just like a non-HFA register argument.
> double callee(int a, ...) {
> -// CHECK: = add i64 %{{.*}}, 8
> +// CHECK: [[REGPP:%.*]] = getelementptr inbounds %struct.__va_list, %struct.__va_list* [[VA:%.*]], i32 0, i32 2
> +// CHECK: [[REGP:%.*]] = load i8*, i8** [[REGPP]], align 8
> +// CHECK: [[OFFSET0:%.*]] = getelementptr inbounds i8, i8* [[REGP]], i32 {{.*}}
> +// CHECK: [[OFFSET1:%.*]] = getelementptr inbounds i8, i8* [[OFFSET0]], i64 8
> +
> +// CHECK: [[MEMPP:%.*]] = getelementptr inbounds %struct.__va_list, %struct.__va_list* [[VA:%.*]], i32 0, i32 0
> +// CHECK: [[MEMP:%.*]] = load i8*, i8** [[MEMPP]], align 8
> +// CHECK: [[NEXTP:%.*]] = getelementptr inbounds i8, i8* [[MEMP]], i64 8
> +// CHECK: store i8* [[NEXTP]], i8** [[MEMPP]], align 8
> va_list vl;
> va_start(vl, a);
> double result = va_arg(vl, struct { double a; }).a;
>
> Modified: cfe/trunk/test/CodeGen/atomic-arm64.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/atomic-arm64.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/atomic-arm64.c (original)
> +++ cfe/trunk/test/CodeGen/atomic-arm64.c Tue Sep 8 03:05:57 2015
> @@ -21,7 +21,7 @@ extern _Atomic(void*) a_pointer;
> extern _Atomic(pointer_pair_t) a_pointer_pair;
> extern _Atomic(pointer_quad_t) a_pointer_quad;
>
> -// CHECK: define void @test0()
> +// CHECK-LABEL:define void @test0()
> // CHECK: [[TEMP:%.*]] = alloca i8, align 1
> // CHECK-NEXT: store i8 1, i8* [[TEMP]]
> // CHECK-NEXT: [[T0:%.*]] = load i8, i8* [[TEMP]], align 1
> @@ -30,7 +30,7 @@ void test0() {
> __c11_atomic_store(&a_bool, 1, memory_order_seq_cst);
> }
>
> -// CHECK: define void @test1()
> +// CHECK-LABEL:define void @test1()
> // CHECK: [[TEMP:%.*]] = alloca float, align 4
> // CHECK-NEXT: store float 3.000000e+00, float* [[TEMP]]
> // CHECK-NEXT: [[T0:%.*]] = bitcast float* [[TEMP]] to i32*
> @@ -40,7 +40,7 @@ void test1() {
> __c11_atomic_store(&a_float, 3, memory_order_seq_cst);
> }
>
> -// CHECK: define void @test2()
> +// CHECK-LABEL:define void @test2()
> // CHECK: [[TEMP:%.*]] = alloca i8*, align 8
> // CHECK-NEXT: store i8* @a_bool, i8** [[TEMP]]
> // CHECK-NEXT: [[T0:%.*]] = bitcast i8** [[TEMP]] to i64*
> @@ -50,18 +50,18 @@ void test2() {
> __c11_atomic_store(&a_pointer, &a_bool, memory_order_seq_cst);
> }
>
> -// CHECK: define void @test3(
> +// CHECK-LABEL:define void @test3(
> // CHECK: [[PAIR:%.*]] = alloca [[PAIR_T:%.*]], align 8
> // CHECK-NEXT: [[TEMP:%.*]] = alloca [[PAIR_T]], align 8
> // CHECK: llvm.memcpy
> // CHECK-NEXT: [[T0:%.*]] = bitcast [[PAIR_T]]* [[TEMP]] to i128*
> -// CHECK-NEXT: [[T1:%.*]] = load i128, i128* [[T0]], align 16
> +// CHECK-NEXT: [[T1:%.*]] = load i128, i128* [[T0]], align 8
> // CHECK-NEXT: store atomic i128 [[T1]], i128* bitcast ([[PAIR_T]]* @a_pointer_pair to i128*) seq_cst, align 16
> void test3(pointer_pair_t pair) {
> __c11_atomic_store(&a_pointer_pair, pair, memory_order_seq_cst);
> }
>
> -// CHECK: define void @test4([[QUAD_T:%.*]]*
> +// CHECK-LABEL:define void @test4(
> // CHECK: [[TEMP:%.*]] = alloca [[QUAD_T:%.*]], align 8
> // CHECK-NEXT: [[T0:%.*]] = bitcast [[QUAD_T]]* [[TEMP]] to i8*
> // CHECK-NEXT: [[T1:%.*]] = bitcast [[QUAD_T]]* {{%.*}} to i8*
>
> Modified: cfe/trunk/test/CodeGen/block-byref-aggr.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/block-byref-aggr.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/block-byref-aggr.c (original)
> +++ cfe/trunk/test/CodeGen/block-byref-aggr.c Tue Sep 8 03:05:57 2015
> @@ -16,7 +16,7 @@ void test0() {
> // CHECK: [[A:%.*]] = alloca [[BYREF:%.*]], align 8
> // CHECK-NEXT: [[TEMP:%.*]] = alloca [[AGG]], align 4
> // CHECK: [[RESULT:%.*]] = call i32 @makeAgg()
> -// CHECK-NEXT: [[T0:%.*]] = getelementptr [[AGG]], [[AGG]]* [[TEMP]], i32 0, i32 0
> +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[TEMP]], i32 0, i32 0
> // CHECK-NEXT: store i32 [[RESULT]], i32* [[T0]]
> // Check that we properly assign into the forwarding pointer.
> // CHECK-NEXT: [[A_FORWARDING:%.*]] = getelementptr inbounds [[BYREF]], [[BYREF]]* [[A]], i32 0, i32 1
> @@ -42,7 +42,7 @@ void test1() {
> // CHECK-NEXT: [[B:%.*]] = alloca [[B_BYREF:%.*]], align 8
> // CHECK-NEXT: [[TEMP:%.*]] = alloca [[AGG]], align 4
> // CHECK: [[RESULT:%.*]] = call i32 @makeAgg()
> -// CHECK-NEXT: [[T0:%.*]] = getelementptr [[AGG]], [[AGG]]* [[TEMP]], i32 0, i32 0
> +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[TEMP]], i32 0, i32 0
> // CHECK-NEXT: store i32 [[RESULT]], i32* [[T0]]
> // Check that we properly assign into the forwarding pointer, first for b:
> // CHECK-NEXT: [[B_FORWARDING:%.*]] = getelementptr inbounds [[B_BYREF]], [[B_BYREF]]* [[B]], i32 0, i32 1
>
> Modified: cfe/trunk/test/CodeGen/c11atomics-ios.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/c11atomics-ios.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/c11atomics-ios.c (original)
> +++ cfe/trunk/test/CodeGen/c11atomics-ios.c Tue Sep 8 03:05:57 2015
> @@ -103,21 +103,21 @@ void testStruct(_Atomic(S) *fp) {
>
> // CHECK-NEXT: [[P:%.*]] = load [[S]]*, [[S]]** [[FP]]
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T0]], align 8
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T0]], align 4
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 3
> // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
> __c11_atomic_init(fp, (S){1,2,3,4});
>
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T0]], align 8
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T0]], align 4
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 3
> // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
> _Atomic(S) x = (S){1,2,3,4};
> @@ -157,29 +157,29 @@ void testPromotedStruct(_Atomic(PS) *fp)
> // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 8, i32 8, i1 false)
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[P]], i32 0, i32 0
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T1]], align 8
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T1]], align 4
> __c11_atomic_init(fp, (PS){1,2,3});
>
> // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[X]] to i8*
> // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T0]], i8 0, i32 8, i32 8, i1 false)
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[X]], i32 0, i32 0
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T1]], align 8
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T1]], align 4
> _Atomic(PS) x = (PS){1,2,3};
>
> // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]]
> // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i64*
> // CHECK-NEXT: [[T2:%.*]] = load atomic i64, i64* [[T1]] seq_cst, align 8
> // CHECK-NEXT: [[T3:%.*]] = bitcast [[APS]]* [[TMP0]] to i64*
> -// CHECK-NEXT: store i64 [[T2]], i64* [[T3]], align 2
> +// CHECK-NEXT: store i64 [[T2]], i64* [[T3]], align 8
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP0]], i32 0, i32 0
> // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8*
> // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8*
>
> Modified: cfe/trunk/test/CodeGen/c11atomics.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/c11atomics.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/c11atomics.c (original)
> +++ cfe/trunk/test/CodeGen/c11atomics.c Tue Sep 8 03:05:57 2015
> @@ -254,21 +254,21 @@ void testStruct(_Atomic(S) *fp) {
>
> // CHECK-NEXT: [[P:%.*]] = load [[S]]*, [[S]]** [[FP]]
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T0]], align 8
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T0]], align 4
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 3
> // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
> __c11_atomic_init(fp, (S){1,2,3,4});
>
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T0]], align 8
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T0]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T0]], align 4
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 3
> // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
> _Atomic(S) x = (S){1,2,3,4};
> @@ -310,22 +310,22 @@ void testPromotedStruct(_Atomic(PS) *fp)
> // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 8, i32 8, i1 false)
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[P]], i32 0, i32 0
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T1]], align 8
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T1]], align 4
> __c11_atomic_init(fp, (PS){1,2,3});
>
> // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[X]] to i8*
> // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T0]], i8 0, i32 8, i32 8, i1 false)
> // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[X]], i32 0, i32 0
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
> -// CHECK-NEXT: store i16 1, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 1, i16* [[T1]], align 8
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
> // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
> -// CHECK-NEXT: store i16 3, i16* [[T1]], align 2
> +// CHECK-NEXT: store i16 3, i16* [[T1]], align 4
> _Atomic(PS) x = (PS){1,2,3};
>
> // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]]
>
> Modified: cfe/trunk/test/CodeGen/catch-undef-behavior.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/catch-undef-behavior.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/catch-undef-behavior.c (original)
> +++ cfe/trunk/test/CodeGen/catch-undef-behavior.c Tue Sep 8 03:05:57 2015
> @@ -269,7 +269,7 @@ int long_double_int_overflow(long double
> // CHECK-COMMON: %[[INBOUNDS:.*]] = and i1 %[[GE]], %[[LE]]
> // CHECK-COMMON-NEXT: br i1 %[[INBOUNDS]]
>
> - // CHECK-UBSAN: store x86_fp80 %[[F]], x86_fp80* %[[ALLOCA:.*]], !nosanitize
> + // CHECK-UBSAN: store x86_fp80 %[[F]], x86_fp80* %[[ALLOCA:.*]], align 16, !nosanitize
> // CHECK-UBSAN: %[[ARG:.*]] = ptrtoint x86_fp80* %[[ALLOCA]] to i64
> // CHECK-UBSAN: call void @__ubsan_handle_float_cast_overflow(i8* bitcast ({{.*}} @[[LINE_1300]] to i8*), i64 %[[ARG]]
>
>
> Modified: cfe/trunk/test/CodeGen/exprs.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/exprs.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/exprs.c (original)
> +++ cfe/trunk/test/CodeGen/exprs.c Tue Sep 8 03:05:57 2015
> @@ -127,9 +127,10 @@ int f11(long X) {
> return A[X];
>
> // CHECK: [[Xaddr:%[^ ]+]] = alloca i64, align 8
> -// CHECK: load {{.*}}, {{.*}}* [[Xaddr]]
> -// CHECK-NEXT: getelementptr inbounds [100 x i32], [100 x i32]* %A, i32 0,
> -// CHECK-NEXT: load i32, i32*
> +// CHECK: [[A:%.*]] = alloca [100 x i32], align
> +// CHECK: [[X:%.*]] = load {{.*}}, {{.*}}* [[Xaddr]]
> +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[A]], i64 0, i64 [[X]]
> +// CHECK-NEXT: load i32, i32* [[T0]], align 4
> }
>
> int f12() {
>
> Modified: cfe/trunk/test/CodeGen/ext-vector-member-alignment.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ext-vector-member-alignment.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ext-vector-member-alignment.c (original)
> +++ cfe/trunk/test/CodeGen/ext-vector-member-alignment.c Tue Sep 8 03:05:57 2015
> @@ -14,14 +14,12 @@ void func(struct struct1* p, float *a, f
> *a = p->position.y;
> *b = p->position[0];
> p->position[2] = c;
> - // FIXME: We should be able to come up with a more aggressive alignment
> - // estimate.
> // CHECK: @func
> - // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 1
> - // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 1
> - // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 1
> - // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 1
> - // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 1
> - // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 1
> + // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 4
> + // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 4
> + // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 4
> + // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 4
> + // CHECK: load <4 x float>, <4 x float>* {{%.*}}, align 4
> + // CHECK: store <4 x float> {{%.*}}, <4 x float>* {{%.*}}, align 4
> // CHECK: ret void
> }
>
> Modified: cfe/trunk/test/CodeGen/mips-varargs.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/mips-varargs.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/mips-varargs.c (original)
> +++ cfe/trunk/test/CodeGen/mips-varargs.c Tue Sep 8 03:05:57 2015
> @@ -1,9 +1,9 @@
> -// RUN: %clang_cc1 -triple mips-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
> -// RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
> -// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW
> -// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW
> -// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW
> -// RUN: %clang_cc1 -triple mips64el-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW
> +// RUN: %clang_cc1 -triple mips-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
> +// RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32
> +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW
> +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW
> +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW
> +// RUN: %clang_cc1 -triple mips64el-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW
>
> #include <stdarg.h>
>
> @@ -24,75 +24,31 @@ int test_i32(char *fmt, ...) {
> // O32: %va = alloca i8*, align [[PTRALIGN:4]]
> // N32: %va = alloca i8*, align [[PTRALIGN:4]]
> // N64: %va = alloca i8*, align [[PTRALIGN:8]]
> +// ALL: [[V:%.*]] = alloca i32, align 4
> +// NEW: [[PROMOTION_TEMP:%.*]] = alloca i32, align 4
> //
> -// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> -// ALL: call void @llvm.va_start(i8* [[VA1]])
> -//
> -// O32: [[TMP0:%.+]] = bitcast i8** %va to i32**
> -// O32: [[AP_CUR:%.+]] = load i32*, i32** [[TMP0]], align [[PTRALIGN]]
> -// NEW: [[TMP0:%.+]] = bitcast i8** %va to i64**
> -// NEW: [[AP_CUR:%.+]] = load i64*, i64** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[AP_NEXT:%.+]] = getelementptr i32, i32* [[AP_CUR]], i32 1
> -// NEW: [[AP_NEXT:%.+]] = getelementptr i64, i64* [[AP_CUR]], {{i32|i64}} 1
> -//
> -// O32: store i32* [[AP_NEXT]], i32** [[TMP0]], align [[PTRALIGN]]
> -// NEW: store i64* [[AP_NEXT]], i64** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[ARG1:%.+]] = load i32, i32* [[AP_CUR]], align 4
> -// NEW: [[TMP2:%.+]] = load i64, i64* [[AP_CUR]], align 8
> -// NEW: [[ARG1:%.+]] = trunc i64 [[TMP2]] to i32
> +// ALL: [[VA:%.+]] = bitcast i8** %va to i8*
> +// ALL: call void @llvm.va_start(i8* [[VA]])
> +// ALL: [[AP_CUR:%.+]] = load i8*, i8** %va, align [[PTRALIGN]]
> +// O32: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T:i32]] [[CHUNKSIZE:4]]
> +// NEW: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T:i32|i64]] [[CHUNKSIZE:8]]
> //
> -// ALL: call void @llvm.va_end(i8* [[VA1]])
> -// ALL: ret i32 [[ARG1]]
> -// ALL: }
> -
> -int test_i32_2args(char *fmt, ...) {
> - va_list va;
> -
> - va_start(va, fmt);
> - int v1 = va_arg(va, int);
> - int v2 = va_arg(va, int);
> - va_end(va);
> -
> - return v1 + v2;
> -}
> -
> -// ALL-LABEL: define i32 @test_i32_2args(i8*{{.*}} %fmt, ...)
> +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
> //
> -// ALL: %va = alloca i8*, align [[PTRALIGN]]
> -// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> -// ALL: call void @llvm.va_start(i8* [[VA1]])
> +// O32: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to [[CHUNK_T:i32]]*
> +// O32: [[ARG:%.+]] = load i32, i32* [[AP_CAST]], align [[CHUNKALIGN:4]]
> //
> -// O32: [[TMP0:%.+]] = bitcast i8** %va to i32**
> -// O32: [[AP_CUR:%.+]] = load i32*, i32** [[TMP0]], align [[PTRALIGN]]
> -// NEW: [[TMP0:%.+]] = bitcast i8** %va to i64**
> -// NEW: [[AP_CUR:%.+]] = load i64*, i64** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[AP_NEXT1:%.+]] = getelementptr i32, i32* [[AP_CUR]], i32 1
> -// NEW: [[AP_NEXT1:%.+]] = getelementptr i64, i64* [[AP_CUR]], [[INTPTR_T:i32|i64]] 1
> -//
> -// O32: store i32* [[AP_NEXT1]], i32** [[TMP0]], align [[PTRALIGN]]
> -// FIXME: N32 optimised this store out. Why only for this ABI?
> -// N64: store i64* [[AP_NEXT1]], i64** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[ARG1:%.+]] = load i32, i32* [[AP_CUR]], align 4
> -// NEW: [[TMP3:%.+]] = load i64, i64* [[AP_CUR]], align 8
> -// NEW: [[ARG1:%.+]] = trunc i64 [[TMP3]] to i32
> -//
> -// O32: [[AP_NEXT2:%.+]] = getelementptr i32, i32* [[AP_CUR]], i32 2
> -// NEW: [[AP_NEXT2:%.+]] = getelementptr i64, i64* [[AP_CUR]], [[INTPTR_T]] 2
> -//
> -// O32: store i32* [[AP_NEXT2]], i32** [[TMP0]], align [[PTRALIGN]]
> -// NEW: store i64* [[AP_NEXT2]], i64** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[ARG2:%.+]] = load i32, i32* [[AP_NEXT1]], align 4
> -// NEW: [[TMP4:%.+]] = load i64, i64* [[AP_NEXT1]], align 8
> -// NEW: [[ARG2:%.+]] = trunc i64 [[TMP4]] to i32
> +// N32: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to [[CHUNK_T:i64]]*
> +// N32: [[TMP:%.+]] = load i64, i64* [[AP_CAST]], align [[CHUNKALIGN:8]]
> +// N64: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to [[CHUNK_T:i64]]*
> +// N64: [[TMP:%.+]] = load i64, i64* [[AP_CAST]], align [[CHUNKALIGN:8]]
> +// NEW: [[TMP2:%.+]] = trunc i64 [[TMP]] to i32
> +// NEW: store i32 [[TMP2]], i32* [[PROMOTION_TEMP]], align 4
> +// NEW: [[ARG:%.+]] = load i32, i32* [[PROMOTION_TEMP]], align 4
> +// ALL: store i32 [[ARG]], i32* [[V]], align 4
> //
> +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> // ALL: call void @llvm.va_end(i8* [[VA1]])
> -// ALL: [[ADD:%.+]] = add nsw i32 [[ARG2]], [[ARG1]]
> -// ALL: ret i32 [[ADD]]
> // ALL: }
>
> long long test_i64(char *fmt, ...) {
> @@ -108,32 +64,25 @@ long long test_i64(char *fmt, ...) {
> // ALL-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...)
> //
> // ALL: %va = alloca i8*, align [[PTRALIGN]]
> -// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> -// ALL: call void @llvm.va_start(i8* [[VA1]])
> -//
> -// O32: [[TMP0:%.+]] = bitcast i8** %va to i32*
> -// O32: [[AP_CUR:%.+]] = load [[INTPTR_T:i32]], i32* [[TMP0]], align [[PTRALIGN]]
> -// NEW: [[TMP0:%.+]] = bitcast i8** %va to i64**
> -// NEW: [[AP_CUR:%.+]] = load i64*, i64** [[TMP0]], align [[PTRALIGN]]
> +// ALL: [[VA:%.+]] = bitcast i8** %va to i8*
> +// ALL: call void @llvm.va_start(i8* [[VA]])
> +// ALL: [[AP_CUR:%.+]] = load i8*, i8** %va, align [[PTRALIGN]]
> //
> // i64 is 8-byte aligned, while this is within O32's stack alignment there's no
> // guarantee that the offset is still 8-byte aligned after earlier reads.
> -// O32: [[PTR1:%.+]] = add i32 [[AP_CUR]], 7
> -// O32: [[PTR2:%.+]] = and i32 [[PTR1]], -8
> -// O32: [[PTR3:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i64*
> -// O32: [[PTR4:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i8*
> -//
> -// O32: [[AP_NEXT:%.+]] = getelementptr i8, i8* [[PTR4]], [[INTPTR_T]] 8
> -// NEW: [[AP_NEXT:%.+]] = getelementptr i64, i64* [[AP_CUR]], [[INTPTR_T:i32|i64]] 1
> +// O32: [[TMP1:%.+]] = ptrtoint i8* [[AP_CUR]] to i32
> +// O32: [[TMP2:%.+]] = add i32 [[TMP1]], 7
> +// O32: [[TMP3:%.+]] = and i32 [[TMP2]], -8
> +// O32: [[AP_CUR:%.+]] = inttoptr i32 [[TMP3]] to i8*
> //
> -// O32: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
> -// NEW: store i64* [[AP_NEXT]], i64** [[TMP0]], align [[PTRALIGN]]
> +// ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T]] 8
> +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
> //
> -// O32: [[ARG1:%.+]] = load i64, i64* [[PTR3]], align 8
> -// NEW: [[ARG1:%.+]] = load i64, i64* [[AP_CUR]], align 8
> +// ALL: [[AP_CAST:%.*]] = bitcast i8* [[AP_CUR]] to i64*
> +// ALL: [[ARG:%.+]] = load i64, i64* [[AP_CAST]], align 8
> //
> +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> // ALL: call void @llvm.va_end(i8* [[VA1]])
> -// ALL: ret i64 [[ARG1]]
> // ALL: }
>
> char *test_ptr(char *fmt, ...) {
> @@ -148,41 +97,30 @@ char *test_ptr(char *fmt, ...) {
>
> // ALL-LABEL: define i8* @test_ptr(i8*{{.*}} %fmt, ...)
> //
> -// O32: %va = alloca i8*, align [[PTRALIGN:4]]
> -// N32: %va = alloca i8*, align [[PTRALIGN:4]]
> -// N64: %va = alloca i8*, align [[PTRALIGN:8]]
> -//
> -// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> -// ALL: call void @llvm.va_start(i8* [[VA1]])
> +// ALL: %va = alloca i8*, align [[PTRALIGN]]
> +// ALL: [[V:%.*]] = alloca i8*, align [[PTRALIGN]]
> +// N32: [[AP_CAST:%.+]] = alloca i8*, align 4
> +// ALL: [[VA:%.+]] = bitcast i8** %va to i8*
> +// ALL: call void @llvm.va_start(i8* [[VA]])
> +// ALL: [[AP_CUR:%.+]] = load i8*, i8** %va, align [[PTRALIGN]]
> +// ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T]] [[CHUNKSIZE]]
> +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
> //
> -// O32: [[TMP0:%.+]] = bitcast i8** %va to i8***
> -// O32: [[AP_CUR:%.+]] = load i8**, i8*** [[TMP0]], align [[PTRALIGN]]
> -// N32 differs because the vararg is not a N32 pointer. It's been promoted to 64-bit.
> -// N32: [[TMP0:%.+]] = bitcast i8** %va to i64**
> -// N32: [[AP_CUR:%.+]] = load i64*, i64** [[TMP0]], align [[PTRALIGN]]
> -// N64: [[TMP0:%.+]] = bitcast i8** %va to i8***
> -// N64: [[AP_CUR:%.+]] = load i8**, i8*** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[AP_NEXT:%.+]] = getelementptr i8*, i8** [[AP_CUR]], i32 1
> -// N32 differs because the vararg is not a N32 pointer. It's been promoted to 64-bit.
> -// N32: [[AP_NEXT:%.+]] = getelementptr i64, i64* [[AP_CUR]], {{i32|i64}} 1
> -// N64: [[AP_NEXT:%.+]] = getelementptr i8*, i8** [[AP_CUR]], {{i32|i64}} 1
> -//
> -// O32: store i8** [[AP_NEXT]], i8*** [[TMP0]], align [[PTRALIGN]]
> -// N32 differs because the vararg is not a N32 pointer. It's been promoted to 64-bit.
> -// N32: store i64* [[AP_NEXT]], i64** [[TMP0]], align [[PTRALIGN]]
> -// N64: store i8** [[AP_NEXT]], i8*** [[TMP0]], align [[PTRALIGN]]
> -//
> -// O32: [[ARG1:%.+]] = load i8*, i8** [[AP_CUR]], align 4
> -// N32 differs because the vararg is not a N32 pointer. It's been promoted to
> -// 64-bit so we must truncate the excess and bitcast to a N32 pointer.
> -// N32: [[TMP2:%.+]] = load i64, i64* [[AP_CUR]], align 8
> +// When the chunk size matches the pointer size, this is easy.
> +// O32: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to i8**
> +// N64: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to i8**
> +// Otherwise we need a promotion temporary.
> +// N32: [[TMP1:%.+]] = bitcast i8* [[AP_CUR]] to i64*
> +// N32: [[TMP2:%.+]] = load i64, i64* [[TMP1]], align 8
> // N32: [[TMP3:%.+]] = trunc i64 [[TMP2]] to i32
> -// N32: [[ARG1:%.+]] = inttoptr i32 [[TMP3]] to i8*
> -// N64: [[ARG1:%.+]] = load i8*, i8** [[AP_CUR]], align 8
> +// N32: [[PTR:%.+]] = inttoptr i32 [[TMP3]] to i8*
> +// N32: store i8* [[PTR]], i8** [[AP_CAST]], align 4
> //
> +// ALL: [[ARG:%.+]] = load i8*, i8** [[AP_CAST]], align [[PTRALIGN]]
> +// ALL: store i8* [[ARG]], i8** [[V]], align [[PTRALIGN]]
> +//
> +// ALL: [[VA:%.+]] = bitcast i8** %va to i8*
> // ALL: call void @llvm.va_end(i8* [[VA1]])
> -// ALL: ret i8* [[ARG1]]
> // ALL: }
>
> int test_v4i32(char *fmt, ...) {
> @@ -198,31 +136,33 @@ int test_v4i32(char *fmt, ...) {
> // ALL-LABEL: define i32 @test_v4i32(i8*{{.*}} %fmt, ...)
> //
> // ALL: %va = alloca i8*, align [[PTRALIGN]]
> +// ALL: [[V]] = alloca <4 x i32>, align 16
> // ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> // ALL: call void @llvm.va_start(i8* [[VA1]])
> -//
> -// O32: [[TMP0:%.+]] = bitcast i8** %va to i32*
> -// N32: [[TMP0:%.+]] = bitcast i8** %va to i32*
> -// N64: [[TMP0:%.+]] = bitcast i8** %va to i64*
> -//
> -// O32: [[PTR0:%.+]] = load [[INTPTR_T:i32]], i32* [[TMP0]], align [[PTRALIGN]]
> -// N32: [[PTR0:%.+]] = load [[INTPTR_T:i32]], i32* [[TMP0]], align [[PTRALIGN]]
> -// N64: [[PTR0:%.+]] = load [[INTPTR_T:i64]], i64* [[TMP0]], align [[PTRALIGN]]
> +// ALL: [[AP_CUR:%.+]] = load i8*, i8** %va, align [[PTRALIGN]]
> //
> // Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of
> // 8-bytes since the base of the stack is 8-byte aligned.
> -// O32: [[PTR1:%.+]] = add i32 [[PTR0]], 7
> -// O32: [[PTR2:%.+]] = and i32 [[PTR1]], -8
> +// O32: [[TMP1:%.+]] = ptrtoint i8* [[AP_CUR]] to i32
> +// O32: [[TMP2:%.+]] = add i32 [[TMP1]], 7
> +// O32: [[TMP3:%.+]] = and i32 [[TMP2]], -8
> +// O32: [[AP_CUR:%.+]] = inttoptr i32 [[TMP3]] to i8*
> +//
> +// NEW: [[TMP1:%.+]] = ptrtoint i8* [[AP_CUR]] to [[INTPTR_T]]
> +// NEW: [[TMP2:%.+]] = add [[INTPTR_T]] [[TMP1]], 15
> +// NEW: [[TMP3:%.+]] = and [[INTPTR_T]] [[TMP2]], -16
> +// NEW: [[AP_CUR:%.+]] = inttoptr [[INTPTR_T]] [[TMP3]] to i8*
> //
> -// NEW: [[PTR1:%.+]] = add [[INTPTR_T]] [[PTR0]], 15
> -// NEW: [[PTR2:%.+]] = and [[INTPTR_T]] [[PTR1]], -16
> -//
> -// ALL: [[PTR3:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to <4 x i32>*
> -// ALL: [[PTR4:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i8*
> -// ALL: [[AP_NEXT:%.+]] = getelementptr i8, i8* [[PTR4]], [[INTPTR_T]] 16
> +// ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T]] 16
> // ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
> -// ALL: [[PTR5:%.+]] = load <4 x i32>, <4 x i32>* [[PTR3]], align 16
> +//
> +// ALL: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to <4 x i32>*
> +// O32: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 8
> +// N64: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 16
> +// ALL: store <4 x i32> [[ARG]], <4 x i32>* [[V]], align 16
> +//
> +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
> // ALL: call void @llvm.va_end(i8* [[VA1]])
> -// ALL: [[VECEXT:%.+]] = extractelement <4 x i32> [[PTR5]], i32 0
> +// ALL: [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0
> // ALL: ret i32 [[VECEXT]]
> // ALL: }
>
> Modified: cfe/trunk/test/CodeGen/object-size.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/object-size.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/object-size.c (original)
> +++ cfe/trunk/test/CodeGen/object-size.c Tue Sep 8 03:05:57 2015
> @@ -15,7 +15,7 @@ int gi, gj;
>
> // CHECK-LABEL: define void @test1
> void test1() {
> - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i32 0, i64 4), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i64 59)
> + // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 4), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i64 59)
> strcpy(&gbuf[4], "Hi there");
> }
>
> @@ -33,7 +33,7 @@ void test3() {
>
> // CHECK-LABEL: define void @test4
> void test4() {
> - // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i32 0, i64 -1), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i64 0)
> + // CHECK: = call i8* @__strcpy_chk(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @gbuf, i64 0, i64 -1), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), i64 0)
> strcpy((char*)(void*)&gbuf[-1], "Hi there");
> }
>
>
> Modified: cfe/trunk/test/CodeGen/packed-arrays.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/packed-arrays.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/packed-arrays.c (original)
> +++ cfe/trunk/test/CodeGen/packed-arrays.c Tue Sep 8 03:05:57 2015
> @@ -64,10 +64,12 @@ int f0_b(struct s0 *a) {
> return *(a->x + 1);
> }
>
> +// Note that 'y' still causes struct s1 to be four-byte aligned.
> +
> // Note that we are incompatible with GCC on this example.
> //
> // CHECK-LABEL: define i32 @f1_a
> -// CHECK: load i32, i32* %{{.*}}, align 1
> +// CHECK: load i32, i32* %{{.*}}, align 4
> // CHECK: }
> // CHECK-LABEL: define i32 @f1_b
> // CHECK: load i32, i32* %{{.*}}, align 4
> @@ -79,7 +81,7 @@ int f0_b(struct s0 *a) {
> // CHECK: load i32, i32* %{{.*}}, align 4
> // CHECK: }
> // CHECK-LABEL: define i32 @f1_d
> -// CHECK: load i32, i32* %{{.*}}, align 1
> +// CHECK: load i32, i32* %{{.*}}, align 4
> // CHECK: }
> int f1_a(struct s1 *a) {
> return a->x[1];
>
> Modified: cfe/trunk/test/CodeGen/packed-structure.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/packed-structure.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/packed-structure.c (original)
> +++ cfe/trunk/test/CodeGen/packed-structure.c Tue Sep 8 03:05:57 2015
> @@ -25,7 +25,7 @@ int s0_load_x(struct s0 *a) { return a->
> // with align 1 (in 2363.1 at least).
> //
> // CHECK-FUNCTIONS-LABEL: define i32 @s0_load_y
> -// CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32, i32* {{.*}}, align 1
> +// CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32, i32* {{.*}}, align 4
> // CHECK-FUNCTIONS: ret i32 [[s0_load_y]]
> int s0_load_y(struct s0 *a) { return a->y; }
> // CHECK-FUNCTIONS-LABEL: define void @s0_copy
> @@ -95,6 +95,6 @@ int s3_1 = __alignof(((struct s3*) 0)->a
> // CHECK-FUNCTIONS-LABEL: define i32 @test3(
> int test3(struct s3 *ptr) {
> // CHECK-FUNCTIONS: [[PTR:%.*]] = getelementptr inbounds {{%.*}}, {{%.*}}* {{%.*}}, i32 0, i32 1
> - // CHECK-FUNCTIONS-NEXT: load i32, i32* [[PTR]], align 1
> + // CHECK-FUNCTIONS-NEXT: load i32, i32* [[PTR]], align 2
> return ptr->anInt;
> }
>
> Modified: cfe/trunk/test/CodeGen/ppc-varargs-struct.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc-varargs-struct.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc-varargs-struct.c (original)
> +++ cfe/trunk/test/CodeGen/ppc-varargs-struct.c Tue Sep 8 03:05:57 2015
> @@ -19,89 +19,69 @@ void testva (int n, ...)
> // CHECK: bitcast %struct.x* %t to i8*
> // CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
> // CHECK: call void @llvm.memcpy
> -// CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
> -// CHECK-PPC-NEXT: [[GPRPTR:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY]] to i8*
> -// CHECK-PPC-NEXT: [[ZERO:%[0-9]+]] = ptrtoint i8* [[GPRPTR]] to i32
> -// CHECK-PPC-NEXT: [[ONE:%[0-9]+]] = add i32 [[ZERO]], 1
> -// CHECK-PPC-NEXT: [[TWO:%[0-9]+]] = inttoptr i32 [[ONE]] to i8*
> -// CHECK-PPC-NEXT: [[THREE:%[0-9]+]] = add i32 [[ONE]], 3
> -// CHECK-PPC-NEXT: [[FOUR:%[0-9]+]] = inttoptr i32 [[THREE]] to i8**
> -// CHECK-PPC-NEXT: [[FIVE:%[0-9]+]] = add i32 [[THREE]], 4
> -// CHECK-PPC-NEXT: [[SIX:%[0-9]+]] = inttoptr i32 [[FIVE]] to i8**
> -// CHECK-PPC-NEXT: [[GPR:%[a-z0-9]+]] = load i8, i8* [[GPRPTR]]
> -// CHECK-PPC-NEXT: [[FPR:%[a-z0-9]+]] = load i8, i8* [[TWO]]
> -// CHECK-PPC-NEXT: [[OVERFLOW_AREA:%[a-z_0-9]+]] = load i8*, i8** [[FOUR]]
> -// CHECK-PPC-NEXT: [[SEVEN:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA]] to i32
> -// CHECK-PPC-NEXT: [[REGSAVE_AREA:%[a-z_0-9]+]] = load i8*, i8** [[SIX]]
> -// CHECK-PPC-NEXT: [[EIGHT:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA]] to i32
> -// CHECK-PPC-NEXT: [[COND:%[a-z0-9]+]] = icmp ult i8 [[GPR]], 8
> -// CHECK-PPC-NEXT: [[NINE:%[0-9]+]] = mul i8 [[GPR]], 4
> -// CHECK-PPC-NEXT: [[TEN:%[0-9]+]] = sext i8 [[NINE]] to i32
> -// CHECK-PPC-NEXT: [[ELEVEN:%[0-9]+]] = add i32 [[EIGHT]], [[TEN]]
> -// CHECK-PPC-NEXT: br i1 [[COND]], label [[USING_REGS:%[a-z_0-9]+]], label [[USING_OVERFLOW:%[a-z_0-9]+]]
> -//
> -// CHECK-PPC1:[[USING_REGS]]
> -// CHECK-PPC: [[TWELVE:%[0-9]+]] = inttoptr i32 [[ELEVEN]] to %struct.x*
> -// CHECK-PPC-NEXT: [[THIRTEEN:%[0-9]+]] = add i8 [[GPR]], 1
> -// CHECK-PPC-NEXT: store i8 [[THIRTEEN]], i8* [[GPRPTR]]
> -// CHECK-PPC-NEXT: br label [[CONT:%[a-z0-9]+]]
> -//
> -// CHECK-PPC1:[[USING_OVERFLOW]]
> -// CHECK-PPC: [[FOURTEEN:%[0-9]+]] = inttoptr i32 [[SEVEN]] to %struct.x*
> -// CHECK-PPC-NEXT: [[FIFTEEN:%[0-9]+]] = add i32 [[SEVEN]], 4
> -// CHECK-PPC-NEXT: [[SIXTEEN:%[0-9]+]] = inttoptr i32 [[FIFTEEN]] to i8*
> -// CHECK-PPC-NEXT: store i8* [[SIXTEEN]], i8** [[FOUR]]
> -// CHECK-PPC-NEXT: br label [[CONT]]
> -//
> -// CHECK-PPC1:[[CONT]]
> -// CHECK-PPC: [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x* [ [[TWELVE]], [[USING_REGS]] ], [ [[FOURTEEN]], [[USING_OVERFLOW]] ]
> -// CHECK-PPC-NEXT: [[AGGRPTR:%[a-z0-9]+]] = bitcast %struct.x* [[VAARG_ADDR]] to i8**
> -// CHECK-PPC-NEXT: [[AGGR:%[a-z0-9]+]] = load i8*, i8** [[AGGRPTR]]
> -// CHECK-PPC-NEXT: [[SEVENTEEN:%[0-9]+]] = bitcast %struct.x* %t to i8*
> -// CHECK-PPC-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[SEVENTEEN]], i8* [[AGGR]], i32 16, i32 8, i1 false)
> +
> +// CHECK-PPC: [[ARRAYDECAY:%.+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
> +// CHECK-PPC-NEXT: [[GPRPTR:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 0
> +// CHECK-PPC-NEXT: [[GPR:%.+]] = load i8, i8* [[GPRPTR]], align 4
> +// CHECK-PPC-NEXT: [[COND:%.+]] = icmp ult i8 [[GPR]], 8
> +// CHECK-PPC-NEXT: br i1 [[COND]], label %[[USING_REGS:[a-z_0-9]+]], label %[[USING_OVERFLOW:[a-z_0-9]+]]
> +//
> +// CHECK-PPC:[[USING_REGS]]
> +// CHECK-PPC-NEXT: [[REGSAVE_AREA_P:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 4
> +// CHECK-PPC-NEXT: [[REGSAVE_AREA:%.+]] = load i8*, i8** [[REGSAVE_AREA_P]], align 4
> +// CHECK-PPC-NEXT: [[OFFSET:%.+]] = mul i8 [[GPR]], 4
> +// CHECK-PPC-NEXT: [[RAW_REGADDR:%.+]] = getelementptr inbounds i8, i8* [[REGSAVE_AREA]], i8 [[OFFSET]]
> +// CHECK-PPC-NEXT: [[REGADDR:%.+]] = bitcast i8* [[RAW_REGADDR]] to %struct.x**
> +// CHECK-PPC-NEXT: [[USED_GPR:%[0-9]+]] = add i8 [[GPR]], 1
> +// CHECK-PPC-NEXT: store i8 [[USED_GPR]], i8* [[GPRPTR]], align 4
> +// CHECK-PPC-NEXT: br label %[[CONT:[a-z0-9]+]]
> +//
> +// CHECK-PPC:[[USING_OVERFLOW]]
> +// CHECK-PPC-NEXT: [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
> +// CHECK-PPC-NEXT: [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
> +// CHECK-PPC-NEXT: [[MEMADDR:%.+]] = bitcast i8* [[OVERFLOW_AREA]] to %struct.x**
> +// CHECK-PPC-NEXT: [[NEW_OVERFLOW_AREA:%[0-9]+]] = getelementptr inbounds i8, i8* [[OVERFLOW_AREA]], i32 4
> +// CHECK-PPC-NEXT: store i8* [[NEW_OVERFLOW_AREA]], i8** [[OVERFLOW_AREA_P]]
> +// CHECK-PPC-NEXT: br label %[[CONT]]
> +//
> +// CHECK-PPC:[[CONT]]
> +// CHECK-PPC-NEXT: [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x** [ [[REGADDR]], %[[USING_REGS]] ], [ [[MEMADDR]], %[[USING_OVERFLOW]] ]
> +// CHECK-PPC-NEXT: [[AGGR:%[a-z0-9]+]] = load %struct.x*, %struct.x** [[VAARG_ADDR]]
> +// CHECK-PPC-NEXT: [[DEST:%[0-9]+]] = bitcast %struct.x* %t to i8*
> +// CHECK-PPC-NEXT: [[SRC:%.+]] = bitcast %struct.x* [[AGGR]] to i8*
> +// CHECK-PPC-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[DEST]], i8* [[SRC]], i32 16, i32 8, i1 false)
>
> int v = va_arg (ap, int);
> -// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64
> -// CHECK: add i64 %{{[0-9]+}}, 4
> -// CHECK: inttoptr i64 %{{[0-9]+}} to i8*
> +
> +// CHECK: getelementptr inbounds i8, i8* %{{[a-z.0-9]*}}, i64 4
> // CHECK: bitcast i8* %{{[0-9]+}} to i32*
> -// CHECK-PPC: [[ARRAYDECAY1:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
> -// CHECK-PPC-NEXT: [[GPRPTR1:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY1]] to i8*
> -// CHECK-PPC-NEXT: [[EIGHTEEN:%[0-9]+]] = ptrtoint i8* [[GPRPTR1]] to i32
> -// CHECK-PPC-NEXT: [[NINETEEN:%[0-9]+]] = add i32 [[EIGHTEEN]], 1
> -// CHECK-PPC-NEXT: [[TWENTY:%[0-9]+]] = inttoptr i32 [[NINETEEN]] to i8*
> -// CHECK-PPC-NEXT: [[TWENTYONE:%[0-9]+]] = add i32 [[NINETEEN]], 3
> -// CHECK-PPC-NEXT: [[TWENTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYONE]] to i8**
> -// CHECK-PPC-NEXT: [[TWENTYTHREE:%[0-9]+]] = add i32 [[TWENTYONE]], 4
> -// CHECK-PPC-NEXT: [[TWENTYFOUR:%[0-9]+]] = inttoptr i32 [[TWENTYTHREE]] to i8**
> -// CHECK-PPC-NEXT: [[GPR1:%[a-z0-9]+]] = load i8, i8* [[GPRPTR1]]
> -// CHECK-PPC-NEXT: [[FPR1:%[a-z0-9]+]] = load i8, i8* [[TWENTY]]
> -// CHECK-PPC-NEXT: [[OVERFLOW_AREA1:%[a-z_0-9]+]] = load i8*, i8** [[TWENTYTWO]]
> -// CHECK-PPC-NEXT: [[TWENTYFIVE:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA1]] to i32
> -// CHECK-PPC-NEXT: [[REGSAVE_AREA1:%[a-z_0-9]+]] = load i8*, i8** [[TWENTYFOUR]]
> -// CHECK-PPC-NEXT: [[TWENTYSIX:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA1]] to i32
> -// CHECK-PPC-NEXT: [[COND1:%[a-z0-9]+]] = icmp ult i8 [[GPR1]], 8
> -// CHECK-PPC-NEXT: [[TWENTYSEVEN:%[0-9]+]] = mul i8 [[GPR1]], 4
> -// CHECK-PPC-NEXT: [[TWENTYEIGHT:%[0-9]+]] = sext i8 [[TWENTYSEVEN]] to i32
> -// CHECK-PPC-NEXT: [[TWENTYNINE:%[0-9]+]] = add i32 [[TWENTYSIX]], [[TWENTYEIGHT]]
> -// CHECK-PPC-NEXT: br i1 [[COND1]], label [[USING_REGS1:%[.a-z_0-9]+]], label [[USING_OVERFLOW1:%[.a-z_0-9]+]]
> -//
> -// CHECK-PPC1:[[USING_REGS1]]:
> -// CHECK-PPC: [[THIRTY:%[0-9]+]] = inttoptr i32 [[TWENTYNINE]] to i32*
> -// CHECK-PPC-NEXT: [[THIRTYONE:%[0-9]+]] = add i8 [[GPR1]], 1
> -// CHECK-PPC-NEXT: store i8 [[THIRTYONE]], i8* [[GPRPTR1]]
> -// CHECK-PPC-NEXT: br label [[CONT1:%[a-z0-9]+]]
> -//
> -// CHECK-PPC1:[[USING_OVERFLOW1]]:
> -// CHECK-PPC: [[THIRTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYFIVE]] to i32*
> -// CHECK-PPC-NEXT: [[THIRTYTHREE:%[0-9]+]] = add i32 [[TWENTYFIVE]], 4
> -// CHECK-PPC-NEXT: [[THIRTYFOUR:%[0-9]+]] = inttoptr i32 [[THIRTYTHREE]] to i8*
> -// CHECK-PPC-NEXT: store i8* [[THIRTYFOUR]], i8** [[TWENTYTWO]]
> -// CHECK-PPC-NEXT: br label [[CONT1]]
> -//
> -// CHECK-PPC1:[[CONT1]]:
> -// CHECK-PPC: [[VAARG_ADDR1:%[a-z.0-9]+]] = phi i32* [ [[THIRTY]], [[USING_REGS1]] ], [ [[THIRTYTWO]], [[USING_OVERFLOW1]] ]
> -// CHECK-PPC-NEXT: [[THIRTYFIVE:%[0-9]+]] = load i32, i32* [[VAARG_ADDR1]]
> +// CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
> +// CHECK-PPC-NEXT: [[GPRPTR:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 0
> +// CHECK-PPC-NEXT: [[GPR:%.+]] = load i8, i8* [[GPRPTR]], align 4
> +// CHECK-PPC-NEXT: [[COND:%.+]] = icmp ult i8 [[GPR]], 8
> +// CHECK-PPC-NEXT: br i1 [[COND]], label %[[USING_REGS:.+]], label %[[USING_OVERFLOW:.+]]{{$}}
> +//
> +// CHECK-PPC:[[USING_REGS]]
> +// CHECK-PPC-NEXT: [[REGSAVE_AREA_P:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 4
> +// CHECK-PPC-NEXT: [[REGSAVE_AREA:%.+]] = load i8*, i8** [[REGSAVE_AREA_P]], align 4
> +// CHECK-PPC-NEXT: [[OFFSET:%.+]] = mul i8 [[GPR]], 4
> +// CHECK-PPC-NEXT: [[RAW_REGADDR:%.+]] = getelementptr inbounds i8, i8* [[REGSAVE_AREA]], i8 [[OFFSET]]
> +// CHECK-PPC-NEXT: [[REGADDR:%.+]] = bitcast i8* [[RAW_REGADDR]] to i32*
> +// CHECK-PPC-NEXT: [[USED_GPR:%[0-9]+]] = add i8 [[GPR]], 1
> +// CHECK-PPC-NEXT: store i8 [[USED_GPR]], i8* [[GPRPTR]], align 4
> +// CHECK-PPC-NEXT: br label %[[CONT:[a-z0-9]+]]
> +//
> +// CHECK-PPC:[[USING_OVERFLOW]]
> +// CHECK-PPC-NEXT: [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
> +// CHECK-PPC-NEXT: [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
> +// CHECK-PPC-NEXT: [[MEMADDR:%.+]] = bitcast i8* [[OVERFLOW_AREA]] to i32*
> +// CHECK-PPC-NEXT: [[NEW_OVERFLOW_AREA:%[0-9]+]] = getelementptr inbounds i8, i8* [[OVERFLOW_AREA]], i32 4
> +// CHECK-PPC-NEXT: store i8* [[NEW_OVERFLOW_AREA]], i8** [[OVERFLOW_AREA_P]]
> +// CHECK-PPC-NEXT: br label %[[CONT]]
> +//
> +// CHECK-PPC:[[CONT]]
> +// CHECK-PPC-NEXT: [[VAARG_ADDR:%[a-z.0-9]+]] = phi i32* [ [[REGADDR]], %[[USING_REGS]] ], [ [[MEMADDR]], %[[USING_OVERFLOW]] ]
> +// CHECK-PPC-NEXT: [[THIRTYFIVE:%[0-9]+]] = load i32, i32* [[VAARG_ADDR]]
> // CHECK-PPC-NEXT: store i32 [[THIRTYFIVE]], i32* %v, align 4
>
> #ifdef __powerpc64__
>
> Modified: cfe/trunk/test/CodeGen/ppc64-align-struct.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc64-align-struct.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc64-align-struct.c (original)
> +++ cfe/trunk/test/CodeGen/ppc64-align-struct.c Tue Sep 8 03:05:57 2015
> @@ -41,18 +41,22 @@ void test6 (int x, struct test6 y)
> }
>
> // This case requires run-time realignment of the incoming struct
> -// CHECK: define void @test7(i32 signext %x, %struct.test7* byval align 16)
> +// CHECK-LABEL: define void @test7(i32 signext %x, %struct.test7* byval align 16)
> // CHECK: %y = alloca %struct.test7, align 32
> // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
> void test7 (int x, struct test7 y)
> {
> }
>
> -// CHECK: define void @test1va(%struct.test1* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @test1va(%struct.test1* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test1, align 4
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i64 8
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[CUR]] to %struct.test1*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[CUR]] to %struct.test1*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test1* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test1* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 8, i32 4, i1 false)
> struct test1 test1va (int x, ...)
> {
> struct test1 y;
> @@ -63,15 +67,19 @@ struct test1 test1va (int x, ...)
> return y;
> }
>
> -// CHECK: define void @test2va(%struct.test2* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @test2va(%struct.test2* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test2, align 16
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
> // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
> // CHECK: %[[TMP2:[^ ]+]] = and i64 %[[TMP1]], -16
> // CHECK: %[[ALIGN:[^ ]+]] = inttoptr i64 %[[TMP2]] to i8*
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[ALIGN]], i64 16
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[ALIGN]], i64 16
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[ALIGN]] to %struct.test2*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[ALIGN]] to %struct.test2*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test2* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test2* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 16, i32 16, i1 false)
> struct test2 test2va (int x, ...)
> {
> struct test2 y;
> @@ -82,15 +90,19 @@ struct test2 test2va (int x, ...)
> return y;
> }
>
> -// CHECK: define void @test3va(%struct.test3* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @test3va(%struct.test3* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test3, align 32
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
> // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
> // CHECK: %[[TMP2:[^ ]+]] = and i64 %[[TMP1]], -16
> // CHECK: %[[ALIGN:[^ ]+]] = inttoptr i64 %[[TMP2]] to i8*
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[ALIGN]], i64 32
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[ALIGN]], i64 32
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[ALIGN]] to %struct.test3*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[ALIGN]] to %struct.test3*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test3* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test3* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 32, i32 16, i1 false)
> struct test3 test3va (int x, ...)
> {
> struct test3 y;
> @@ -101,11 +113,15 @@ struct test3 test3va (int x, ...)
> return y;
> }
>
> -// CHECK: define void @test4va(%struct.test4* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @test4va(%struct.test4* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test4, align 4
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i64 16
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[CUR]] to %struct.test4*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[CUR]] to %struct.test4*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test4* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test4* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 12, i32 4, i1 false)
> struct test4 test4va (int x, ...)
> {
> struct test4 y;
> @@ -116,11 +132,15 @@ struct test4 test4va (int x, ...)
> return y;
> }
>
> -// CHECK: define void @testva_longdouble(%struct.test_longdouble* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @testva_longdouble(%struct.test_longdouble* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test_longdouble, align 16
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i64 16
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[CUR]] to %struct.test_longdouble*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[CUR]] to %struct.test_longdouble*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test_longdouble* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test_longdouble* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 16, i32 8, i1 false)
> struct test_longdouble { long double x; };
> struct test_longdouble testva_longdouble (int x, ...)
> {
> @@ -132,15 +152,19 @@ struct test_longdouble testva_longdouble
> return y;
> }
>
> -// CHECK: define void @testva_vector(%struct.test_vector* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK-LABEL: define void @testva_vector(%struct.test_vector* noalias sret %agg.result, i32 signext %x, ...)
> +// CHECK: %y = alloca %struct.test_vector, align 16
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> // CHECK: %[[TMP0:[^ ]+]] = ptrtoint i8* %[[CUR]] to i64
> // CHECK: %[[TMP1:[^ ]+]] = add i64 %[[TMP0]], 15
> // CHECK: %[[TMP2:[^ ]+]] = and i64 %[[TMP1]], -16
> // CHECK: %[[ALIGN:[^ ]+]] = inttoptr i64 %[[TMP2]] to i8*
> -// CHECK: %[[NEXT:[^ ]+]] = getelementptr i8, i8* %[[ALIGN]], i64 16
> +// CHECK: %[[NEXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[ALIGN]], i64 16
> // CHECK: store i8* %[[NEXT]], i8** %ap
> -// CHECK: bitcast i8* %[[ALIGN]] to %struct.test_vector*
> +// CHECK: [[T0:%.*]] = bitcast i8* %[[ALIGN]] to %struct.test_vector*
> +// CHECK: [[DEST:%.*]] = bitcast %struct.test_vector* %y to i8*
> +// CHECK: [[SRC:%.*]] = bitcast %struct.test_vector* [[T0]] to i8*
> +// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[DEST]], i8* [[SRC]], i64 16, i32 16, i1 false)
> struct test_vector { vector int x; };
> struct test_vector testva_vector (int x, ...)
> {
>
> Modified: cfe/trunk/test/CodeGen/ppc64-complex-parms.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc64-complex-parms.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc64-complex-parms.c (original)
> +++ cfe/trunk/test/CodeGen/ppc64-complex-parms.c Tue Sep 8 03:05:57 2015
> @@ -62,10 +62,10 @@ void bar_float(void) {
> // CHECK: %[[VAR3:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 1
> // CHECK: store float 2.000000e+00, float* %[[VAR2]]
> // CHECK: store float -2.500000e+00, float* %[[VAR3]]
> -// CHECK: %[[VAR4:[A-Za-z0-9.]+]] = getelementptr { float, float }, { float, float }* %[[VAR1]], i32 0, i32 0
> -// CHECK: %[[VAR5:[A-Za-z0-9.]+]] = load float, float* %[[VAR4]], align 1
> -// CHECK: %[[VAR6:[A-Za-z0-9.]+]] = getelementptr { float, float }, { float, float }* %[[VAR1]], i32 0, i32 1
> -// CHECK: %[[VAR7:[A-Za-z0-9.]+]] = load float, float* %[[VAR6]], align 1
> +// CHECK: %[[VAR4:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 0
> +// CHECK: %[[VAR5:[A-Za-z0-9.]+]] = load float, float* %[[VAR4]], align 4
> +// CHECK: %[[VAR6:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR1]], i32 0, i32 1
> +// CHECK: %[[VAR7:[A-Za-z0-9.]+]] = load float, float* %[[VAR6]], align 4
> // CHECK: %{{[A-Za-z0-9.]+}} = call float @foo_float(float %[[VAR5]], float %[[VAR7]])
>
> void bar_double(void) {
> @@ -78,10 +78,10 @@ void bar_double(void) {
> // CHECK: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 1
> // CHECK: store double 2.000000e+00, double* %[[VAR12]]
> // CHECK: store double -2.500000e+00, double* %[[VAR13]]
> -// CHECK: %[[VAR14:[A-Za-z0-9.]+]] = getelementptr { double, double }, { double, double }* %[[VAR11]], i32 0, i32 0
> -// CHECK: %[[VAR15:[A-Za-z0-9.]+]] = load double, double* %[[VAR14]], align 1
> -// CHECK: %[[VAR16:[A-Za-z0-9.]+]] = getelementptr { double, double }, { double, double }* %[[VAR11]], i32 0, i32 1
> -// CHECK: %[[VAR17:[A-Za-z0-9.]+]] = load double, double* %[[VAR16]], align 1
> +// CHECK: %[[VAR14:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 0
> +// CHECK: %[[VAR15:[A-Za-z0-9.]+]] = load double, double* %[[VAR14]], align 8
> +// CHECK: %[[VAR16:[A-Za-z0-9.]+]] = getelementptr inbounds { double, double }, { double, double }* %[[VAR11]], i32 0, i32 1
> +// CHECK: %[[VAR17:[A-Za-z0-9.]+]] = load double, double* %[[VAR16]], align 8
> // CHECK: %{{[A-Za-z0-9.]+}} = call double @foo_double(double %[[VAR15]], double %[[VAR17]])
>
> void bar_long_double(void) {
> @@ -94,10 +94,10 @@ void bar_long_double(void) {
> // CHECK: %[[VAR23:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 1
> // CHECK: store ppc_fp128 0xM40000000000000000000000000000000, ppc_fp128* %[[VAR22]]
> // CHECK: store ppc_fp128 0xMC0040000000000000000000000000000, ppc_fp128* %[[VAR23]]
> -// CHECK: %[[VAR24:[A-Za-z0-9.]+]] = getelementptr { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 0
> -// CHECK: %[[VAR25:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR24]], align 1
> -// CHECK: %[[VAR26:[A-Za-z0-9.]+]] = getelementptr { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 1
> -// CHECK: %[[VAR27:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR26]], align 1
> +// CHECK: %[[VAR24:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 0
> +// CHECK: %[[VAR25:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR24]], align 16
> +// CHECK: %[[VAR26:[A-Za-z0-9.]+]] = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %[[VAR21]], i32 0, i32 1
> +// CHECK: %[[VAR27:[A-Za-z0-9.]+]] = load ppc_fp128, ppc_fp128* %[[VAR26]], align 16
> // CHECK: %{{[A-Za-z0-9.]+}} = call ppc_fp128 @foo_long_double(ppc_fp128 %[[VAR25]], ppc_fp128 %[[VAR27]])
>
> void bar_int(void) {
> @@ -110,10 +110,10 @@ void bar_int(void) {
> // CHECK: %[[VAR33:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 1
> // CHECK: store i32 2, i32* %[[VAR32]]
> // CHECK: store i32 -3, i32* %[[VAR33]]
> -// CHECK: %[[VAR34:[A-Za-z0-9.]+]] = getelementptr { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 0
> -// CHECK: %[[VAR35:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR34]], align 1
> -// CHECK: %[[VAR36:[A-Za-z0-9.]+]] = getelementptr { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 1
> -// CHECK: %[[VAR37:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR36]], align 1
> +// CHECK: %[[VAR34:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 0
> +// CHECK: %[[VAR35:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR34]], align 4
> +// CHECK: %[[VAR36:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR31]], i32 0, i32 1
> +// CHECK: %[[VAR37:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR36]], align 4
> // CHECK: %{{[A-Za-z0-9.]+}} = call signext i32 @foo_int(i32 %[[VAR35]], i32 %[[VAR37]])
>
> void bar_short(void) {
> @@ -126,10 +126,10 @@ void bar_short(void) {
> // CHECK: %[[VAR43:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 1
> // CHECK: store i16 2, i16* %[[VAR42]]
> // CHECK: store i16 -3, i16* %[[VAR43]]
> -// CHECK: %[[VAR44:[A-Za-z0-9.]+]] = getelementptr { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 0
> -// CHECK: %[[VAR45:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR44]], align 1
> -// CHECK: %[[VAR46:[A-Za-z0-9.]+]] = getelementptr { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 1
> -// CHECK: %[[VAR47:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR46]], align 1
> +// CHECK: %[[VAR44:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 0
> +// CHECK: %[[VAR45:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR44]], align 2
> +// CHECK: %[[VAR46:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR41]], i32 0, i32 1
> +// CHECK: %[[VAR47:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR46]], align 2
> // CHECK: %{{[A-Za-z0-9.]+}} = call signext i16 @foo_short(i16 %[[VAR45]], i16 %[[VAR47]])
>
> void bar_char(void) {
> @@ -142,9 +142,9 @@ void bar_char(void) {
> // CHECK: %[[VAR53:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 1
> // CHECK: store i8 2, i8* %[[VAR52]]
> // CHECK: store i8 -3, i8* %[[VAR53]]
> -// CHECK: %[[VAR54:[A-Za-z0-9.]+]] = getelementptr { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 0
> +// CHECK: %[[VAR54:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 0
> // CHECK: %[[VAR55:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR54]], align 1
> -// CHECK: %[[VAR56:[A-Za-z0-9.]+]] = getelementptr { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 1
> +// CHECK: %[[VAR56:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR51]], i32 0, i32 1
> // CHECK: %[[VAR57:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR56]], align 1
> // CHECK: %{{[A-Za-z0-9.]+}} = call signext i8 @foo_char(i8 %[[VAR55]], i8 %[[VAR57]])
>
> @@ -158,10 +158,10 @@ void bar_long(void) {
> // CHECK: %[[VAR63:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 1
> // CHECK: store i64 2, i64* %[[VAR62]]
> // CHECK: store i64 -3, i64* %[[VAR63]]
> -// CHECK: %[[VAR64:[A-Za-z0-9.]+]] = getelementptr { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 0
> -// CHECK: %[[VAR65:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR64]], align 1
> -// CHECK: %[[VAR66:[A-Za-z0-9.]+]] = getelementptr { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 1
> -// CHECK: %[[VAR67:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR66]], align 1
> +// CHECK: %[[VAR64:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 0
> +// CHECK: %[[VAR65:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR64]], align 8
> +// CHECK: %[[VAR66:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR61]], i32 0, i32 1
> +// CHECK: %[[VAR67:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR66]], align 8
> // CHECK: %{{[A-Za-z0-9.]+}} = call i64 @foo_long(i64 %[[VAR65]], i64 %[[VAR67]])
>
> void bar_long_long(void) {
> @@ -174,10 +174,10 @@ void bar_long_long(void) {
> // CHECK: %[[VAR73:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1
> // CHECK: store i64 2, i64* %[[VAR72]]
> // CHECK: store i64 -3, i64* %[[VAR73]]
> -// CHECK: %[[VAR74:[A-Za-z0-9.]+]] = getelementptr { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 0
> -// CHECK: %[[VAR75:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR74]], align 1
> -// CHECK: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1
> -// CHECK: %[[VAR77:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR76]], align 1
> +// CHECK: %[[VAR74:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 0
> +// CHECK: %[[VAR75:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR74]], align 8
> +// CHECK: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1
> +// CHECK: %[[VAR77:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR76]], align 8
> // CHECK: %{{[A-Za-z0-9.]+}} = call i64 @foo_long_long(i64 %[[VAR75]], i64 %[[VAR77]])
>
> // CHECK: attributes [[NUW]] = { nounwind{{.*}} }
>
> Modified: cfe/trunk/test/CodeGen/ppc64-struct-onefloat.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc64-struct-onefloat.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc64-struct-onefloat.c (original)
> +++ cfe/trunk/test/CodeGen/ppc64-struct-onefloat.c Tue Sep 8 03:05:57 2015
> @@ -13,15 +13,15 @@ void bar(Sf a, Sd b, SSf d, SSd e) {}
> // CHECK: %b = alloca %struct.s2, align 8
> // CHECK: %d = alloca %struct.s4, align 4
> // CHECK: %e = alloca %struct.s5, align 8
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s1, %struct.s1* %a, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s1, %struct.s1* %a, i32 0, i32 0
> // CHECK: store float %a.coerce, float* %{{[a-zA-Z0-9.]+}}, align 4
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s2, %struct.s2* %b, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s2, %struct.s2* %b, i32 0, i32 0
> // CHECK: store double %b.coerce, double* %{{[a-zA-Z0-9.]+}}, align 8
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s4, %struct.s4* %d, i32 0, i32 0
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s1, %struct.s1* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s4, %struct.s4* %d, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s1, %struct.s1* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> // CHECK: store float %d.coerce, float* %{{[a-zA-Z0-9.]+}}, align 4
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s5, %struct.s5* %e, i32 0, i32 0
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s2, %struct.s2* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s5, %struct.s5* %e, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s2, %struct.s2* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> // CHECK: store double %e.coerce, double* %{{[a-zA-Z0-9.]+}}, align 8
> // CHECK: ret void
>
> @@ -35,15 +35,15 @@ void foo(void)
> }
>
> // CHECK-LABEL: define void @foo
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s1, %struct.s1* %p1, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s1, %struct.s1* %p1, i32 0, i32 0
> // CHECK: %{{[0-9]+}} = load float, float* %{{[a-zA-Z0-9.]+}}, align 4
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s2, %struct.s2* %p2, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s2, %struct.s2* %p2, i32 0, i32 0
> // CHECK: %{{[0-9]+}} = load double, double* %{{[a-zA-Z0-9.]+}}, align 8
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s4, %struct.s4* %p4, i32 0, i32 0
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s1, %struct.s1* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s4, %struct.s4* %p4, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s1, %struct.s1* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> // CHECK: %{{[0-9]+}} = load float, float* %{{[a-zA-Z0-9.]+}}, align 4
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s5, %struct.s5* %p5, i32 0, i32 0
> -// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr %struct.s2, %struct.s2* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s5, %struct.s5* %p5, i32 0, i32 0
> +// CHECK: %{{[a-zA-Z0-9.]+}} = getelementptr inbounds %struct.s2, %struct.s2* %{{[a-zA-Z0-9.]+}}, i32 0, i32 0
> // CHECK: %{{[0-9]+}} = load double, double* %{{[a-zA-Z0-9.]+}}, align 8
> // CHECK: call void @bar(float inreg %{{[0-9]+}}, double inreg %{{[0-9]+}}, float inreg %{{[0-9]+}}, double inreg %{{[0-9]+}})
> // CHECK: ret void
>
> Modified: cfe/trunk/test/CodeGen/ppc64-varargs-complex.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc64-varargs-complex.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc64-varargs-complex.c (original)
> +++ cfe/trunk/test/CodeGen/ppc64-varargs-complex.c Tue Sep 8 03:05:57 2015
> @@ -9,15 +9,14 @@ void testva (int n, ...)
>
> _Complex int i = va_arg(ap, _Complex int);
> // CHECK: %[[VAR40:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR40]], i64 16
> + // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR40]], i64 16
> // CHECK-NEXT: store i8* %[[VAR41]], i8** %[[VAR100]]
> - // CHECK-NEXT: %[[VAR1:[A-Za-z0-9.]+]] = ptrtoint i8* %[[VAR40]] to i64
> - // CHECK-NEXT: %[[VAR2:[A-Za-z0-9.]+]] = add i64 %[[VAR1]], 4
> - // CHECK-NEXT: %[[VAR3:[A-Za-z0-9.]+]] = add i64 %[[VAR1]], 12
> - // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR2]] to i32*
> - // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR3]] to i32*
> - // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR4]]
> - // CHECK-NEXT: %[[VAR7:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR5]]
> + // CHECK-NEXT: %[[VAR1:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR40]], i64 4
> + // CHECK-NEXT: %[[VAR2:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR40]], i64 12
> + // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR1]] to i32*
> + // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR2]] to i32*
> + // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR4]], align 4
> + // CHECK-NEXT: %[[VAR7:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR5]], align 4
> // CHECK-NEXT: %[[VAR8:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR0:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR9:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR0]], i32 0, i32 1
> // CHECK-NEXT: store i32 %[[VAR6]], i32* %[[VAR8]]
> @@ -25,15 +24,14 @@ void testva (int n, ...)
>
> _Complex short s = va_arg(ap, _Complex short);
> // CHECK: %[[VAR50:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR50]], i64 16
> + // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR50]], i64 16
> // CHECK-NEXT: store i8* %[[VAR51]], i8** %[[VAR100]]
> - // CHECK: %[[VAR11:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR12:[A-Za-z0-9.]+]] = add i64 %[[VAR11]], 6
> - // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = add i64 %[[VAR11]], 14
> - // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR12]] to i16*
> - // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR13]] to i16*
> - // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR14]]
> - // CHECK-NEXT: %[[VAR17:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR15]]
> + // CHECK-NEXT: %[[VAR12:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR50]], i64 6
> + // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR50]], i64 14
> + // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR12]] to i16*
> + // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR13]] to i16*
> + // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR14]], align 2
> + // CHECK-NEXT: %[[VAR17:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR15]], align 2
> // CHECK-NEXT: %[[VAR18:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR10:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR19:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR10]], i32 0, i32 1
> // CHECK-NEXT: store i16 %[[VAR16]], i16* %[[VAR18]]
> @@ -41,15 +39,12 @@ void testva (int n, ...)
>
> _Complex char c = va_arg(ap, _Complex char);
> // CHECK: %[[VAR60:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR60]], i64 16
> + // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR60]], i64 16
> // CHECK-NEXT: store i8* %[[VAR61]], i8** %[[VAR100]]
> - // CHECK: %[[VAR21:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR22:[A-Za-z0-9.]+]] = add i64 %[[VAR21]], 7
> - // CHECK-NEXT: %[[VAR23:[A-Za-z0-9.]+]] = add i64 %[[VAR21]], 15
> - // CHECK-NEXT: %[[VAR24:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR22]] to i8*
> - // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR23]] to i8*
> - // CHECK-NEXT: %[[VAR26:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR24]]
> - // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR25]]
> + // CHECK-NEXT: %[[VAR24:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR60]], i64 7
> + // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR60]], i64 15
> + // CHECK-NEXT: %[[VAR26:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR24]], align 1
> + // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR25]], align 1
> // CHECK-NEXT: %[[VAR28:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR20:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR29:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR20]], i32 0, i32 1
> // CHECK-NEXT: store i8 %[[VAR26]], i8* %[[VAR28]]
> @@ -57,15 +52,14 @@ void testva (int n, ...)
>
> _Complex float f = va_arg(ap, _Complex float);
> // CHECK: %[[VAR70:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR70]], i64 16
> + // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR70]], i64 16
> // CHECK-NEXT: store i8* %[[VAR71]], i8** %[[VAR100]]
> - // CHECK: %[[VAR31:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR32:[A-Za-z0-9.]+]] = add i64 %[[VAR31]], 4
> - // CHECK-NEXT: %[[VAR33:[A-Za-z0-9.]+]] = add i64 %[[VAR31]], 12
> - // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR32]] to float*
> - // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR33]] to float*
> - // CHECK-NEXT: %[[VAR36:[A-Za-z0-9.]+]] = load float, float* %[[VAR34]]
> - // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = load float, float* %[[VAR35]]
> + // CHECK-NEXT: %[[VAR32:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR70]], i64 4
> + // CHECK-NEXT: %[[VAR33:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR70]], i64 12
> + // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR32]] to float*
> + // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR33]] to float*
> + // CHECK-NEXT: %[[VAR36:[A-Za-z0-9.]+]] = load float, float* %[[VAR34]], align 4
> + // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = load float, float* %[[VAR35]], align 4
> // CHECK-NEXT: %[[VAR38:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR30:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR39:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR30]], i32 0, i32 1
> // CHECK-NEXT: store float %[[VAR36]], float* %[[VAR38]]
>
> Modified: cfe/trunk/test/CodeGen/ppc64le-varargs-complex.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ppc64le-varargs-complex.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/ppc64le-varargs-complex.c (original)
> +++ cfe/trunk/test/CodeGen/ppc64le-varargs-complex.c Tue Sep 8 03:05:57 2015
> @@ -9,14 +9,13 @@ void testva (int n, ...)
>
> _Complex int i = va_arg(ap, _Complex int);
> // CHECK: %[[VAR40:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR40]], i64 16
> + // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR40]], i64 16
> // CHECK-NEXT: store i8* %[[VAR41]], i8** %[[VAR100]]
> - // CHECK-NEXT: %[[VAR1:[A-Za-z0-9.]+]] = ptrtoint i8* %[[VAR40]] to i64
> - // CHECK-NEXT: %[[VAR3:[A-Za-z0-9.]+]] = add i64 %[[VAR1]], 8
> - // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR1]] to i32*
> - // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR3]] to i32*
> - // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR4]]
> - // CHECK-NEXT: %[[VAR7:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR5]]
> + // CHECK-NEXT: %[[VAR3:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR40]], i64 8
> + // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR40]] to i32*
> + // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR3]] to i32*
> + // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR4]], align 8
> + // CHECK-NEXT: %[[VAR7:[A-Za-z0-9.]+]] = load i32, i32* %[[VAR5]], align 8
> // CHECK-NEXT: %[[VAR8:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR0:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR9:[A-Za-z0-9.]+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* %[[VAR0]], i32 0, i32 1
> // CHECK-NEXT: store i32 %[[VAR6]], i32* %[[VAR8]]
> @@ -24,14 +23,13 @@ void testva (int n, ...)
>
> _Complex short s = va_arg(ap, _Complex short);
> // CHECK: %[[VAR50:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR50]], i64 16
> + // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR50]], i64 16
> // CHECK-NEXT: store i8* %[[VAR51]], i8** %[[VAR100]]
> - // CHECK: %[[VAR11:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = add i64 %[[VAR11]], 8
> - // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR11]] to i16*
> - // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR13]] to i16*
> - // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR14]]
> - // CHECK-NEXT: %[[VAR17:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR15]]
> + // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR50]], i64 8
> + // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR50]] to i16*
> + // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR13]] to i16*
> + // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR14]], align 8
> + // CHECK-NEXT: %[[VAR17:[A-Za-z0-9.]+]] = load i16, i16* %[[VAR15]], align 8
> // CHECK-NEXT: %[[VAR18:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR10:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR19:[A-Za-z0-9.]+]] = getelementptr inbounds { i16, i16 }, { i16, i16 }* %[[VAR10]], i32 0, i32 1
> // CHECK-NEXT: store i16 %[[VAR16]], i16* %[[VAR18]]
> @@ -39,14 +37,11 @@ void testva (int n, ...)
>
> _Complex char c = va_arg(ap, _Complex char);
> // CHECK: %[[VAR60:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR60]], i64 16
> + // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR60]], i64 16
> // CHECK-NEXT: store i8* %[[VAR61]], i8** %[[VAR100]]
> - // CHECK: %[[VAR21:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR23:[A-Za-z0-9.]+]] = add i64 %[[VAR21]], 8
> - // CHECK-NEXT: %[[VAR24:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR21]] to i8*
> - // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR23]] to i8*
> - // CHECK-NEXT: %[[VAR26:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR24]]
> - // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR25]]
> + // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR60]], i64 8
> + // CHECK-NEXT: %[[VAR26:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR60]], align 8
> + // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = load i8, i8* %[[VAR25]], align 8
> // CHECK-NEXT: %[[VAR28:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR20:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR29:[A-Za-z0-9.]+]] = getelementptr inbounds { i8, i8 }, { i8, i8 }* %[[VAR20]], i32 0, i32 1
> // CHECK-NEXT: store i8 %[[VAR26]], i8* %[[VAR28]]
> @@ -54,14 +49,13 @@ void testva (int n, ...)
>
> _Complex float f = va_arg(ap, _Complex float);
> // CHECK: %[[VAR70:[A-Za-z0-9.]+]] = load i8*, i8** %[[VAR100:[A-Za-z0-9.]+]]
> - // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr i8, i8* %[[VAR70]], i64 16
> + // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR70]], i64 16
> // CHECK-NEXT: store i8* %[[VAR71]], i8** %[[VAR100]]
> - // CHECK: %[[VAR31:[A-Za-z0-9.]+]] = ptrtoint i8* %{{[A-Za-z0-9.]+}} to i64
> - // CHECK-NEXT: %[[VAR33:[A-Za-z0-9.]+]] = add i64 %[[VAR31]], 8
> - // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR31]] to float*
> - // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = inttoptr i64 %[[VAR33]] to float*
> - // CHECK-NEXT: %[[VAR36:[A-Za-z0-9.]+]] = load float, float* %[[VAR34]]
> - // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = load float, float* %[[VAR35]]
> + // CHECK-NEXT: %[[VAR33:[A-Za-z0-9.]+]] = getelementptr inbounds i8, i8* %[[VAR70]], i64 8
> + // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR70]] to float*
> + // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = bitcast i8* %[[VAR33]] to float*
> + // CHECK-NEXT: %[[VAR36:[A-Za-z0-9.]+]] = load float, float* %[[VAR34]], align 8
> + // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = load float, float* %[[VAR35]], align 8
> // CHECK-NEXT: %[[VAR38:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR30:[A-Za-z0-9.]+]], i32 0, i32 0
> // CHECK-NEXT: %[[VAR39:[A-Za-z0-9.]+]] = getelementptr inbounds { float, float }, { float, float }* %[[VAR30]], i32 0, i32 1
> // CHECK-NEXT: store float %[[VAR36]], float* %[[VAR38]]
>
> Modified: cfe/trunk/test/CodeGen/sparcv9-abi.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sparcv9-abi.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/sparcv9-abi.c (original)
> +++ cfe/trunk/test/CodeGen/sparcv9-abi.c Tue Sep 8 03:05:57 2015
> @@ -132,9 +132,9 @@ int f_variable(char *f, ...) {
> while ((c = *f++)) switch (c) {
>
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 8
> +// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
> // CHECK-DAG: store i8* %[[NXT]], i8** %ap
> -// CHECK-DAG: %[[EXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 4
> +// CHECK-DAG: %[[EXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 4
> // CHECK-DAG: %[[ADR:[^ ]+]] = bitcast i8* %[[EXT]] to i32*
> // CHECK-DAG: load i32, i32* %[[ADR]]
> // CHECK: br
> @@ -143,7 +143,7 @@ int f_variable(char *f, ...) {
> break;
>
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 8
> +// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
> // CHECK-DAG: store i8* %[[NXT]], i8** %ap
> // CHECK-DAG: %[[ADR:[^ ]+]] = bitcast i8* %[[CUR]] to i64*
> // CHECK-DAG: load i64, i64* %[[ADR]]
> @@ -153,7 +153,7 @@ int f_variable(char *f, ...) {
> break;
>
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 8
> +// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
> // CHECK-DAG: store i8* %[[NXT]], i8** %ap
> // CHECK-DAG: %[[ADR:[^ ]+]] = bitcast i8* %[[CUR]] to %struct.tiny*
> // CHECK: br
> @@ -162,7 +162,7 @@ int f_variable(char *f, ...) {
> break;
>
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 16
> +// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 16
> // CHECK-DAG: store i8* %[[NXT]], i8** %ap
> // CHECK-DAG: %[[ADR:[^ ]+]] = bitcast i8* %[[CUR]] to %struct.small*
> // CHECK: br
> @@ -171,7 +171,7 @@ int f_variable(char *f, ...) {
> break;
>
> // CHECK: %[[CUR:[^ ]+]] = load i8*, i8** %ap
> -// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr i8, i8* %[[CUR]], i32 8
> +// CHECK-DAG: %[[NXT:[^ ]+]] = getelementptr inbounds i8, i8* %[[CUR]], i64 8
> // CHECK-DAG: store i8* %[[NXT]], i8** %ap
> // CHECK-DAG: %[[IND:[^ ]+]] = bitcast i8* %[[CUR]] to %struct.medium**
> // CHECK-DAG: %[[ADR:[^ ]+]] = load %struct.medium*, %struct.medium** %[[IND]]
>
> Modified: cfe/trunk/test/CodeGen/tbaa-class.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/tbaa-class.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/tbaa-class.cpp (original)
> +++ cfe/trunk/test/CodeGen/tbaa-class.cpp Tue Sep 8 03:05:57 2015
> @@ -51,10 +51,10 @@ public:
> };
>
> uint32_t g(uint32_t *s, StructA *A, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z1g
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z1g
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32:!.*]]
> *s = 1;
> @@ -63,22 +63,22 @@ uint32_t g(uint32_t *s, StructA *A, uint
> }
>
> uint32_t g2(uint32_t *s, StructA *A, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g2
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16:!.*]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16:!.*]]
> +// PATH-LABEL: define i32 @_Z2g2
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_A_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_A_f16:!.*]]
> *s = 1;
> A->f16 = 4;
> return *s;
> }
>
> uint32_t g3(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g3
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g3
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32:!.*]]
> A->f32 = 1;
> @@ -87,22 +87,22 @@ uint32_t g3(StructA *A, StructB *B, uint
> }
>
> uint32_t g4(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g4
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
> +// PATH-LABEL: define i32 @_Z2g4
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_B_a_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_B_a_f16:!.*]]
> A->f32 = 1;
> B->a.f16 = 4;
> return A->f32;
> }
>
> uint32_t g5(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g5
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g5
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_f32:!.*]]
> A->f32 = 1;
> @@ -111,10 +111,10 @@ uint32_t g5(StructA *A, StructB *B, uint
> }
>
> uint32_t g6(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g6
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g6
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32_2:!.*]]
> A->f32 = 1;
> @@ -123,10 +123,10 @@ uint32_t g6(StructA *A, StructB *B, uint
> }
>
> uint32_t g7(StructA *A, StructS *S, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g7
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g7
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]]
> A->f32 = 1;
> @@ -135,22 +135,22 @@ uint32_t g7(StructA *A, StructS *S, uint
> }
>
> uint32_t g8(StructA *A, StructS *S, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g8
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
> +// PATH-LABEL: define i32 @_Z2g8
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_S_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S_f16:!.*]]
> A->f32 = 1;
> S->f16 = 4;
> return A->f32;
> }
>
> uint32_t g9(StructS *S, StructS2 *S2, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g9
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g9
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]]
> S->f32 = 1;
> @@ -159,10 +159,10 @@ uint32_t g9(StructS *S, StructS2 *S2, ui
> }
>
> uint32_t g10(StructS *S, StructS2 *S2, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g10
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g10
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S2_f32_2:!.*]]
> S->f32 = 1;
> @@ -171,10 +171,10 @@ uint32_t g10(StructS *S, StructS2 *S2, u
> }
>
> uint32_t g11(StructC *C, StructD *D, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g11
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g11
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_C_b_a_f32:!.*]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_D_b_a_f32:!.*]]
> C->b.a.f32 = 1;
> @@ -183,11 +183,11 @@ uint32_t g11(StructC *C, StructD *D, uin
> }
>
> uint32_t g12(StructC *C, StructD *D, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g12
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // TODO: differentiate the two accesses.
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g12
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
> StructB *b1 = &(C->b);
>
> Modified: cfe/trunk/test/CodeGen/tbaa.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/tbaa.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/tbaa.cpp (original)
> +++ cfe/trunk/test/CodeGen/tbaa.cpp Tue Sep 8 03:05:57 2015
> @@ -45,10 +45,10 @@ typedef struct
> } StructS2;
>
> uint32_t g(uint32_t *s, StructA *A, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z1g
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z1g
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32:!.*]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32:!.*]]
> *s = 1;
> @@ -57,22 +57,22 @@ uint32_t g(uint32_t *s, StructA *A, uint
> }
>
> uint32_t g2(uint32_t *s, StructA *A, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g2
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16:!.*]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16:!.*]]
> +// PATH-LABEL: define i32 @_Z2g2
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_A_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_A_f16:!.*]]
> *s = 1;
> A->f16 = 4;
> return *s;
> }
>
> uint32_t g3(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g3
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g3
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32:!.*]]
> A->f32 = 1;
> @@ -81,22 +81,22 @@ uint32_t g3(StructA *A, StructB *B, uint
> }
>
> uint32_t g4(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g4
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
> +// PATH-LABEL: define i32 @_Z2g4
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_B_a_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_B_a_f16:!.*]]
> A->f32 = 1;
> B->a.f16 = 4;
> return A->f32;
> }
>
> uint32_t g5(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g5
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g5
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_f32:!.*]]
> A->f32 = 1;
> @@ -105,10 +105,10 @@ uint32_t g5(StructA *A, StructB *B, uint
> }
>
> uint32_t g6(StructA *A, StructB *B, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g6
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g6
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32_2:!.*]]
> A->f32 = 1;
> @@ -117,10 +117,10 @@ uint32_t g6(StructA *A, StructB *B, uint
> }
>
> uint32_t g7(StructA *A, StructS *S, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g7
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g7
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32:!.*]]
> A->f32 = 1;
> @@ -129,22 +129,22 @@ uint32_t g7(StructA *A, StructS *S, uint
> }
>
> uint32_t g8(StructA *A, StructS *S, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g8
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
> +// PATH-LABEL: define i32 @_Z2g8
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_A_f32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_S_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S_f16:!.*]]
> A->f32 = 1;
> S->f16 = 4;
> return A->f32;
> }
>
> uint32_t g9(StructS *S, StructS2 *S2, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z2g9
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z2g9
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S2_f32:!.*]]
> S->f32 = 1;
> @@ -153,22 +153,22 @@ uint32_t g9(StructS *S, StructS2 *S2, ui
> }
>
> uint32_t g10(StructS *S, StructS2 *S2, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g10
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// CHECK: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_i16]]
> -// PATH: define i32 @{{.*}}(
> +// CHECK: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_i16]]
> +// PATH-LABEL: define i32 @_Z3g10
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> -// PATH: store i16 4, i16* %{{.*}}, align 2, !tbaa [[TAG_S2_f16:!.*]]
> +// PATH: store i16 4, i16* %{{.*}}, align 4, !tbaa [[TAG_S2_f16:!.*]]
> S->f32 = 1;
> S2->f16 = 4;
> return S->f32;
> }
>
> uint32_t g11(StructC *C, StructD *D, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g11
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g11
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_C_b_a_f32:!.*]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_D_b_a_f32:!.*]]
> C->b.a.f32 = 1;
> @@ -177,11 +177,11 @@ uint32_t g11(StructC *C, StructD *D, uin
> }
>
> uint32_t g12(StructC *C, StructD *D, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g12
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // TODO: differentiate the two accesses.
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g12
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_B_a_f32]]
> StructB *b1 = &(C->b);
> @@ -202,9 +202,9 @@ struct five {
> } ATTR;
> char g13(struct five *a, struct five *b) {
> return a->b;
> -// CHECK: define signext i8 @{{.*}}(
> +// CHECK-LABEL: define signext i8 @_Z3g13
> // CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char:!.*]]
> -// PATH: define signext i8 @{{.*}}(
> +// PATH-LABEL: define signext i8 @_Z3g13
> // PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_five_b:!.*]]
> }
>
> @@ -215,9 +215,9 @@ struct six {
> char c;
> };
> char g14(struct six *a, struct six *b) {
> -// CHECK: define signext i8 @{{.*}}(
> +// CHECK-LABEL: define signext i8 @_Z3g14
> // CHECK: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_char]]
> -// PATH: define signext i8 @{{.*}}(
> +// PATH-LABEL: define signext i8 @_Z3g14
> // PATH: load i8, i8* %{{.*}}, align 1, !tbaa [[TAG_six_b:!.*]]
> return a->b;
> }
> @@ -225,10 +225,10 @@ char g14(struct six *a, struct six *b) {
> // Types that differ only by name may alias.
> typedef StructS StructS3;
> uint32_t g15(StructS *S, StructS3 *S3, uint64_t count) {
> -// CHECK: define i32 @{{.*}}(
> +// CHECK-LABEL: define i32 @_Z3g15
> // CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> // CHECK: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_i32]]
> -// PATH: define i32 @{{.*}}(
> +// PATH-LABEL: define i32 @_Z3g15
> // PATH: store i32 1, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> // PATH: store i32 4, i32* %{{.*}}, align 4, !tbaa [[TAG_S_f32]]
> S->f32 = 1;
>
> Modified: cfe/trunk/test/CodeGen/vectorcall.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/vectorcall.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/vectorcall.c (original)
> +++ cfe/trunk/test/CodeGen/vectorcall.c Tue Sep 8 03:05:57 2015
> @@ -32,13 +32,13 @@ void __vectorcall hfa1(int a, struct HFA
> // registers.
> void __vectorcall hfa2(struct HFA4 a, struct HFA4 b, double c) {}
> // CHECK: define x86_vectorcallcc void @"\01hfa2@@72"(double %a.0, double %a.1, double %a.2, double %a.3, %struct.HFA4* inreg %b, double %c)
> -// X64: define x86_vectorcallcc void @"\01hfa2@@72"(double %a.0, double %a.1, double %a.2, double %a.3, %struct.HFA4* align 8 %b, double %c)
> +// X64: define x86_vectorcallcc void @"\01hfa2@@72"(double %a.0, double %a.1, double %a.2, double %a.3, %struct.HFA4* %b, double %c)
>
> // Ensure that we pass builtin types directly while counting them against the
> // SSE register usage.
> void __vectorcall hfa3(double a, double b, double c, double d, double e, struct HFA2 f) {}
> // CHECK: define x86_vectorcallcc void @"\01hfa3@@56"(double %a, double %b, double %c, double %d, double %e, %struct.HFA2* inreg %f)
> -// X64: define x86_vectorcallcc void @"\01hfa3@@56"(double %a, double %b, double %c, double %d, double %e, %struct.HFA2* align 8 %f)
> +// X64: define x86_vectorcallcc void @"\01hfa3@@56"(double %a, double %b, double %c, double %d, double %e, %struct.HFA2* %f)
>
> // Aggregates with more than four elements are not HFAs and are passed byval.
> // Because they are not classified as homogeneous, they don't get special
> @@ -63,11 +63,11 @@ void __vectorcall hva1(int a, struct HVA
>
> void __vectorcall hva2(struct HVA4 a, struct HVA4 b, v4f32 c) {}
> // CHECK: define x86_vectorcallcc void @"\01hva2@@144"(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, %struct.HVA4* inreg %b, <4 x float> %c)
> -// X64: define x86_vectorcallcc void @"\01hva2@@144"(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, %struct.HVA4* align 16 %b, <4 x float> %c)
> +// X64: define x86_vectorcallcc void @"\01hva2@@144"(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, %struct.HVA4* %b, <4 x float> %c)
>
> void __vectorcall hva3(v4f32 a, v4f32 b, v4f32 c, v4f32 d, v4f32 e, struct HVA2 f) {}
> // CHECK: define x86_vectorcallcc void @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* inreg %f)
> -// X64: define x86_vectorcallcc void @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* align 16 %f)
> +// X64: define x86_vectorcallcc void @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* %f)
>
> typedef float __attribute__((ext_vector_type(3))) v3f32;
> struct OddSizeHVA { v3f32 x, y; };
>
> Modified: cfe/trunk/test/CodeGen/xcore-abi.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/xcore-abi.c?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/xcore-abi.c (original)
> +++ cfe/trunk/test/CodeGen/xcore-abi.c Tue Sep 8 03:05:57 2015
> @@ -33,7 +33,7 @@ void testva (int n, ...) {
> f(v1);
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[P:%[a-z0-9]+]] = bitcast i8* [[I]] to i8**
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 4
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 4
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = load i8*, i8** [[P]]
> // CHECK: store i8* [[V1]], i8** [[V:%[a-z0-9]+]], align 4
> @@ -43,7 +43,7 @@ void testva (int n, ...) {
> char v2 = va_arg (ap, char); // expected-warning{{second argument to 'va_arg' is of promotable type 'char'}}
> f(&v2);
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 4
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 4
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = load i8, i8* [[I]]
> // CHECK: store i8 [[V1]], i8* [[V:%[a-z0-9]+]], align 1
> @@ -53,7 +53,7 @@ void testva (int n, ...) {
> f(&v3);
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[P:%[a-z0-9]+]] = bitcast i8* [[I]] to i32*
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 4
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 4
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = load i32, i32* [[P]]
> // CHECK: store i32 [[V1]], i32* [[V:%[a-z0-9]+]], align 4
> @@ -64,7 +64,7 @@ void testva (int n, ...) {
> f(&v4);
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[P:%[a-z0-9]+]] = bitcast i8* [[I]] to i64*
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 8
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 8
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = load i64, i64* [[P]]
> // CHECK: store i64 [[V1]], i64* [[V:%[a-z0-9]+]], align 4
> @@ -76,7 +76,7 @@ void testva (int n, ...) {
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[I2:%[a-z0-9]+]] = bitcast i8* [[I]] to %struct.x**
> // CHECK: [[P:%[a-z0-9]+]] = load %struct.x*, %struct.x** [[I2]]
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 4
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 4
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = bitcast %struct.x* [[V:%[a-z0-9]+]] to i8*
> // CHECK: [[P1:%[a-z0-9]+]] = bitcast %struct.x* [[P]] to i8*
> @@ -89,7 +89,7 @@ void testva (int n, ...) {
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[I2:%[a-z0-9]+]] = bitcast i8* [[I]] to [4 x i32]**
> // CHECK: [[P:%[a-z0-9]+]] = load [4 x i32]*, [4 x i32]** [[I2]]
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 4
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 4
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = bitcast [4 x i32]* [[V0:%[a-z0-9]+]] to i8*
> // CHECK: [[P1:%[a-z0-9]+]] = bitcast [4 x i32]* [[P]] to i8*
> @@ -104,7 +104,7 @@ void testva (int n, ...) {
> f(&v7);
> // CHECK: [[I:%[a-z0-9]+]] = load i8*, i8** [[AP]]
> // CHECK: [[P:%[a-z0-9]+]] = bitcast i8* [[I]] to double*
> - // CHECK: [[IN:%[a-z0-9]+]] = getelementptr i8, i8* [[I]], i32 8
> + // CHECK: [[IN:%[a-z0-9]+]] = getelementptr inbounds i8, i8* [[I]], i32 8
> // CHECK: store i8* [[IN]], i8** [[AP]]
> // CHECK: [[V1:%[a-z0-9]+]] = load double, double* [[P]]
> // CHECK: store double [[V1]], double* [[V:%[a-z0-9]+]], align 4
>
> Added: cfe/trunk/test/CodeGenCXX/alignment.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/alignment.cpp?rev=246985&view=auto
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/alignment.cpp (added)
> +++ cfe/trunk/test/CodeGenCXX/alignment.cpp Tue Sep 8 03:05:57 2015
> @@ -0,0 +1,297 @@
> +// RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-apple-darwin10 | FileCheck %s
> +
> +extern int int_source();
> +extern void int_sink(int x);
> +
> +namespace test0 {
> + struct A {
> + int aField;
> + int bField;
> + };
> +
> + struct B {
> + int onebit : 2;
> + int twobit : 6;
> + int intField;
> + };
> +
> + struct __attribute__((packed, aligned(2))) C : A, B {
> + };
> +
> + // These accesses should have alignment 4 because they're at offset 0
> + // in a reference with an assumed alignment of 4.
> + // CHECK-LABEL: @_ZN5test01aERNS_1BE
> + void a(B &b) {
> + // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
> + // CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]**
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
> + // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
> + // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
> + // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
> + // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
> + // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 4
> + b.onebit = int_source();
> +
> + // CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
> + // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
> + // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
> + // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
> + // CHECK: call void @_Z8int_sinki(i32 [[T2]])
> + int_sink(b.onebit);
> + }
> +
> + // These accesses should have alignment 2 because they're at offset 8
> + // in a reference/pointer with an assumed alignment of 2.
> + // CHECK-LABEL: @_ZN5test01bERNS_1CE
> + void b(C &c) {
> + // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
> + // CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
> + // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
> + // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
> + // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
> + // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 2
> + c.onebit = int_source();
> +
> + // CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
> + // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
> + // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
> + // CHECK: call void @_Z8int_sinki(i32 [[T2]])
> + int_sink(c.onebit);
> + }
> +
> + // CHECK-LABEL: @_ZN5test01cEPNS_1CE
> + void c(C *c) {
> + // CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
> + // CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
> + // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
> + // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
> + // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
> + // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 2
> + c->onebit = int_source();
> +
> + // CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
> + // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
> + // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
> + // CHECK: call void @_Z8int_sinki(i32 [[T2]])
> + int_sink(c->onebit);
> + }
> +
> + // These accesses should have alignment 2 because they're at offset 8
> + // in an alignment-2 variable.
> + // CHECK-LABEL: @_ZN5test01dEv
> + void d() {
> + // CHECK: [[C_P:%.*]] = alloca [[C:%.*]], align 2
> + C c;
> +
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
> + // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
> + // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
> + // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
> + // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 2
> + c.onebit = int_source();
> +
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
> + // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
> + // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
> + // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
> + // CHECK: call void @_Z8int_sinki(i32 [[T2]])
> + int_sink(c.onebit);
> + }
> +
> + // These accesses should have alignment 8 because they're at offset 8
> + // in an alignment-16 variable.
> + // CHECK-LABEL: @_ZN5test01eEv
> + void e() {
> + // CHECK: [[C_P:%.*]] = alloca [[C:%.*]], align 16
> + __attribute__((aligned(16))) C c;
> +
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
> + // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 8
> + // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
> + // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
> + // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
> + // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 8
> + c.onebit = int_source();
> +
> + // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
> + // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 8
> + // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
> + // CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
> + // CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
> + // CHECK: call void @_Z8int_sinki(i32 [[T2]])
> + int_sink(c.onebit);
> + }
> +}
> +
> +namespace test1 {
> + struct Array {
> + int elts[4];
> + };
> +
> + struct A {
> + __attribute__((aligned(16))) Array aArray;
> + };
> +
> + struct B : virtual A {
> + void *bPointer; // puts bArray at offset 16
> + Array bArray;
> + };
> +
> + struct C : virtual A { // must be viable as primary base
> + // Non-empty, nv-size not a multiple of 16.
> + void *cPointer1;
> + void *cPointer2;
> + };
> +
> + // Proof of concept that the non-virtual components of B do not have
> + // to be 16-byte-aligned.
> + struct D : C, B {};
> +
> + // For the following tests, we want to assign into a variable whose
> + // alignment is high enough that it will absolutely not be the
> + // constraint on the memcpy alignment.
> + typedef __attribute__((aligned(64))) Array AlignedArray;
> +
> + // CHECK-LABEL: @_ZN5test11aERNS_1AE
> + void a(A &a) {
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY:%.*]], align 64
> + // CHECK: [[A_P:%.*]] = load [[A:%.*]]*, [[A]]**
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 16, i1 false)
> + AlignedArray result = a.aArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11bERNS_1BE
> + void b(B &b) {
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]**
> + // CHECK: [[VPTR_P:%.*]] = bitcast [[B]]* [[B_P]] to i8**
> + // CHECK: [[VPTR:%.*]] = load i8*, i8** [[VPTR_P]], align 8
> + // CHECK: [[T0:%.*]] = getelementptr i8, i8* [[VPTR]], i64 -24
> + // CHECK: [[OFFSET_P:%.*]] = bitcast i8* [[T0]] to i64*
> + // CHECK: [[OFFSET:%.*]] = load i64, i64* [[OFFSET_P]], align 8
> + // CHECK: [[T0:%.*]] = bitcast [[B]]* [[B_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 [[OFFSET]]
> + // CHECK: [[A_P:%.*]] = bitcast i8* [[T1]] to [[A]]*
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 16, i1 false)
> + AlignedArray result = b.aArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11cERNS_1BE
> + void c(B &b) {
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 8, i1 false)
> + AlignedArray result = b.bArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11dEPNS_1BE
> + void d(B *b) {
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 8, i1 false)
> + AlignedArray result = b->bArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11eEv
> + void e() {
> + // CHECK: [[B_P:%.*]] = alloca [[B]], align 16
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 16, i1 false)
> + B b;
> + AlignedArray result = b.bArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11fEv
> + void f() {
> + // TODO: we should devirtualize this derived-to-base conversion.
> + // CHECK: [[D_P:%.*]] = alloca [[D:%.*]], align 16
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[VPTR_P:%.*]] = bitcast [[D]]* [[D_P]] to i8**
> + // CHECK: [[VPTR:%.*]] = load i8*, i8** [[VPTR_P]], align 16
> + // CHECK: [[T0:%.*]] = getelementptr i8, i8* [[VPTR]], i64 -24
> + // CHECK: [[OFFSET_P:%.*]] = bitcast i8* [[T0]] to i64*
> + // CHECK: [[OFFSET:%.*]] = load i64, i64* [[OFFSET_P]], align 8
> + // CHECK: [[T0:%.*]] = bitcast [[D]]* [[D_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 [[OFFSET]]
> + // CHECK: [[A_P:%.*]] = bitcast i8* [[T1]] to [[A]]*
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 16, i1 false)
> + D d;
> + AlignedArray result = d.aArray;
> + }
> +
> + // CHECK-LABEL: @_ZN5test11gEv
> + void g() {
> + // CHECK: [[D_P:%.*]] = alloca [[D]], align 16
> + // CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
> + // CHECK: [[T0:%.*]] = bitcast [[D]]* [[D_P]] to i8*
> + // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 24
> + // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
> + // CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
> + // CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
> + // CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
> + // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 16, i32 8, i1 false)
> + D d;
> + AlignedArray result = d.bArray;
> + }
> +}
>
> Modified: cfe/trunk/test/CodeGenCXX/arm.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/arm.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/arm.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/arm.cpp Tue Sep 8 03:05:57 2015
> @@ -152,8 +152,8 @@ namespace test3 {
> void e(A *x) {
> // CHECK-LABEL: define void @_ZN5test31eEPNS_1AE(
> // CHECK: icmp eq {{.*}}, null
> - // CHECK: getelementptr {{.*}}, i64 -8
> - // CHECK: getelementptr {{.*}}, i64 4
> + // CHECK: getelementptr {{.*}}, i32 -8
> + // CHECK: getelementptr {{.*}}, i32 4
> // CHECK: bitcast {{.*}} to i32*
> // CHECK: load
> // CHECK: invoke {{.*}} @_ZN5test31AD1Ev
> @@ -164,8 +164,8 @@ namespace test3 {
> void f(A (*x)[20]) {
> // CHECK-LABEL: define void @_ZN5test31fEPA20_NS_1AE(
> // CHECK: icmp eq {{.*}}, null
> - // CHECK: getelementptr {{.*}}, i64 -8
> - // CHECK: getelementptr {{.*}}, i64 4
> + // CHECK: getelementptr {{.*}}, i32 -8
> + // CHECK: getelementptr {{.*}}, i32 4
> // CHECK: bitcast {{.*}} to i32*
> // CHECK: load
> // CHECK: invoke {{.*}} @_ZN5test31AD1Ev
> @@ -223,8 +223,8 @@ namespace test4 {
>
> void e(A *x) {
> // CHECK-LABEL: define void @_ZN5test41eEPNS_1AE(
> - // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i64 -8
> - // CHECK: getelementptr inbounds {{.*}}, i64 4
> + // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i32 -8
> + // CHECK: getelementptr inbounds {{.*}}, i32 4
> // CHECK: bitcast
> // CHECK: [[T0:%.*]] = load i32, i32*
> // CHECK: [[T1:%.*]] = mul i32 4, [[T0]]
> @@ -235,8 +235,8 @@ namespace test4 {
>
> void f(A (*x)[20]) {
> // CHECK-LABEL: define void @_ZN5test41fEPA20_NS_1AE(
> - // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i64 -8
> - // CHECK: getelementptr inbounds {{.*}}, i64 4
> + // CHECK: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i32 -8
> + // CHECK: getelementptr inbounds {{.*}}, i32 4
> // CHECK: bitcast
> // CHECK: [[T0:%.*]] = load i32, i32*
> // CHECK: [[T1:%.*]] = mul i32 4, [[T0]]
> @@ -293,7 +293,7 @@ namespace test7 {
>
> // CHECK-LABEL: define void @_ZN5test74testEv() {{.*}} personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
> void test() {
> - // CHECK: [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test74testEvE1x to i8*) acquire, align 1
> + // CHECK: [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test74testEvE1x to i8*) acquire, align 4
> // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1
> // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0
> // CHECK-NEXT: br i1 [[T2]]
> @@ -328,7 +328,7 @@ namespace test8 {
>
> // CHECK-LABEL: define void @_ZN5test84testEv() {{.*}} personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
> void test() {
> - // CHECK: [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test84testEvE1x to i8*) acquire, align 1
> + // CHECK: [[T0:%.*]] = load atomic i8, i8* bitcast (i32* @_ZGVZN5test84testEvE1x to i8*) acquire, align 4
> // CHECK-NEXT: [[T1:%.*]] = and i8 [[T0]], 1
> // CHECK-NEXT: [[T2:%.*]] = icmp eq i8 [[T1]], 0
> // CHECK-NEXT: br i1 [[T2]]
> @@ -388,7 +388,7 @@ namespace test9 {
> // CHECK-NEXT: store i32 16, i32* [[T0]]
> // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i32, i32* [[T0]], i32 1
> // CHECK-NEXT: store i32 [[N]], i32* [[T1]]
> -// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i64 16
> +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i32 16
> // CHECK-NEXT: bitcast i8* [[T0]] to [[TEST9]]*
> // Array allocation follows.
>
> @@ -400,8 +400,8 @@ namespace test9 {
> // CHECK-NEXT: [[T0:%.*]] = icmp eq [[TEST9]]* [[BEGIN]], null
> // CHECK-NEXT: br i1 [[T0]],
> // CHECK: [[T0:%.*]] = bitcast [[TEST9]]* [[BEGIN]] to i8*
> -// CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 -16
> -// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i64 4
> +// CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds i8, i8* [[T0]], i32 -16
> +// CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds i8, i8* [[ALLOC]], i32 4
> // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to i32*
> // CHECK-NEXT: [[N:%.*]] = load i32, i32* [[T1]]
> // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[TEST9]], [[TEST9]]* [[BEGIN]], i32 [[N]]
>
> Modified: cfe/trunk/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp Tue Sep 8 03:05:57 2015
> @@ -502,7 +502,7 @@ namespace B19773010 {
> }
> void f2() {
> // CHECK-LABEL: @_ZN9B197730102f2Ev
> - // CHECK: store %"struct.B19773010::pair"* getelementptr inbounds ([1 x %"struct.B19773010::pair"], [1 x %"struct.B19773010::pair"]* bitcast ([1 x { i8*, i32 }]* @_ZGRZN9B197730102f2EvE1p_ to [1 x %"struct.B19773010::pair"]*), i64 0, i64 0), %"struct.B19773010::pair"** getelementptr inbounds ([2 x %"class.std::initializer_list.10"], [2 x %"class.std::initializer_list.10"]* @_ZZN9B197730102f2EvE1p, i64 0, i64 1, i32 0), align 8
> + // CHECK: store %"struct.B19773010::pair"* getelementptr inbounds ([1 x %"struct.B19773010::pair"], [1 x %"struct.B19773010::pair"]* bitcast ([1 x { i8*, i32 }]* @_ZGRZN9B197730102f2EvE1p_ to [1 x %"struct.B19773010::pair"]*), i64 0, i64 0), %"struct.B19773010::pair"** getelementptr inbounds ([2 x %"class.std::initializer_list.10"], [2 x %"class.std::initializer_list.10"]* @_ZZN9B197730102f2EvE1p, i64 0, i64 1, i32 0), align 16
> static std::initializer_list<pair<const char *, E>> a, p[2] =
> {a, {{"", ENUM_CONSTANT}}};
> }
>
> Modified: cfe/trunk/test/CodeGenCXX/cxx11-initializer-array-new.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/cxx11-initializer-array-new.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/cxx11-initializer-array-new.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/cxx11-initializer-array-new.cpp Tue Sep 8 03:05:57 2015
> @@ -28,7 +28,7 @@ void *p = new S[2][3]{ { 1, 2, 3 }, { 4,
> //
> // { 4, 5, 6 }
> //
> -// CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i32 1
> +// CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 1
> //
> // CHECK: %[[S_1_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i64 0, i64 0
> // CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_0]], i32 4)
> @@ -72,7 +72,7 @@ void *q = new S[n][3]{ { 1, 2, 3 }, { 4,
> //
> // { 4, 5, 6 }
> //
> -// CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i32 1
> +// CHECK: %[[S_1:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_0]], i64 1
> //
> // CHECK: %[[S_1_0:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i64 0, i64 0
> // CHECK: call void @_ZN1SC1Ei(%[[S]]* %[[S_1_0]], i32 4)
> @@ -83,7 +83,7 @@ void *q = new S[n][3]{ { 1, 2, 3 }, { 4,
> //
> // And the rest.
> //
> -// CHECK: %[[S_2:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i32 1
> +// CHECK: %[[S_2:.*]] = getelementptr inbounds [3 x %[[S]]], [3 x %[[S]]]* %[[S_1]], i64 1
> // CHECK: %[[S_2_AS_S:.*]] = bitcast [3 x %[[S]]]* %[[S_2]] to %[[S]]*
> //
> // CHECK: %[[REST:.*]] = sub i64 %[[ELTS]], 6
> @@ -135,7 +135,7 @@ void *r = new T[n][3]{ { 1, 2, 3 }, { 4,
> //
> // { 4, 5, 6 }
> //
> -// CHECK: %[[T_1:.*]] = getelementptr inbounds [3 x %[[T]]], [3 x %[[T]]]* %[[T_0]], i32 1
> +// CHECK: %[[T_1:.*]] = getelementptr inbounds [3 x %[[T]]], [3 x %[[T]]]* %[[T_0]], i64 1
> //
> // CHECK: %[[T_1_0:.*]] = getelementptr inbounds [3 x %[[T]]], [3 x %[[T]]]* %[[T_1]], i64 0, i64 0
> // CHECK: %[[T_1_0_0:.*]] = getelementptr inbounds %[[T]], %[[T]]* %[[T_1_0]], i32 0, i32 0
> @@ -149,7 +149,7 @@ void *r = new T[n][3]{ { 1, 2, 3 }, { 4,
> //
> // And the rest gets memset to 0.
> //
> -// CHECK: %[[T_2:.*]] = getelementptr inbounds [3 x %[[T]]], [3 x %[[T]]]* %[[T_1]], i32 1
> +// CHECK: %[[T_2:.*]] = getelementptr inbounds [3 x %[[T]]], [3 x %[[T]]]* %[[T_1]], i64 1
> // CHECK: %[[T_2_AS_T:.*]] = bitcast [3 x %[[T]]]* %[[T_2]] to %[[T]]*
> //
> // CHECK: %[[SIZE:.*]] = sub i64 %{{.*}}, 24
>
> Modified: cfe/trunk/test/CodeGenCXX/delete-two-arg.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/delete-two-arg.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/delete-two-arg.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/delete-two-arg.cpp Tue Sep 8 03:05:57 2015
> @@ -30,7 +30,7 @@ namespace test2 {
> // CHECK: [[NEW:%.*]] = call noalias i8* @_Znaj(i32 44)
> // CHECK-NEXT: [[T0:%.*]] = bitcast i8* [[NEW]] to i32*
> // CHECK-NEXT: store i32 10, i32* [[T0]]
> - // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i8, i8* [[NEW]], i64 4
> + // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds i8, i8* [[NEW]], i32 4
> // CHECK-NEXT: [[T2:%.*]] = bitcast i8* [[T1]] to [[A]]*
> // CHECK-NEXT: ret [[A]]* [[T2]]
> return ::new A[10];
> @@ -44,7 +44,7 @@ namespace test2 {
> // CHECK-NEXT: [[T1:%.*]] = icmp eq [[A]]* [[T0]], null
> // CHECK-NEXT: br i1 [[T1]],
> // CHECK: [[T2:%.*]] = bitcast [[A]]* [[T0]] to i8*
> - // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i64 -4
> + // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i32 -4
> // CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i32*
> // CHECK-NEXT: [[T5:%.*]] = load i32, i32* [[T4]]
> // CHECK-NEXT: call void @_ZdaPv(i8* [[T3]])
>
> Modified: cfe/trunk/test/CodeGenCXX/lambda-expressions.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/lambda-expressions.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/lambda-expressions.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/lambda-expressions.cpp Tue Sep 8 03:05:57 2015
> @@ -81,7 +81,7 @@ int g() {
> };
>
> // PR14773
> -// CHECK: [[ARRVAL:%[0-9a-zA-Z]*]] = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZZ14staticarrayrefvE5array, i32 0, i64 0), align 4
> +// CHECK: [[ARRVAL:%[0-9a-zA-Z]*]] = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZZ14staticarrayrefvE5array, i64 0, i64 0), align 4
> // CHECK-NEXT: store i32 [[ARRVAL]]
> void staticarrayref(){
> static int array[] = {};
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-array-cookies.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-array-cookies.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-array-cookies.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-array-cookies.cpp Tue Sep 8 03:05:57 2015
> @@ -28,12 +28,12 @@ void check_array_cookies_simple() {
> // 46 = 42 + size of cookie (4)
> // CHECK: [[COOKIE:%.*]] = bitcast i8* [[ALLOCATED]] to i32*
> // CHECK: store i32 42, i32* [[COOKIE]]
> -// CHECK: [[ARRAY:%.*]] = getelementptr inbounds i8, i8* [[ALLOCATED]], i64 4
> +// CHECK: [[ARRAY:%.*]] = getelementptr inbounds i8, i8* [[ALLOCATED]], i32 4
> // CHECK: bitcast i8* [[ARRAY]] to [[CLASS:%.*]]*
>
> delete [] array;
> // CHECK: [[ARRAY_AS_CHAR:%.*]] = bitcast [[CLASS]]* {{%.*}} to i8*
> -// CHECK: getelementptr inbounds i8, i8* [[ARRAY_AS_CHAR]], i64 -4
> +// CHECK: getelementptr inbounds i8, i8* [[ARRAY_AS_CHAR]], i32 -4
> }
>
> struct __attribute__((aligned(8))) ClassWithAlignment {
> @@ -50,12 +50,12 @@ void check_array_cookies_aligned() {
> // 344 = 42*8 + size of cookie (8, due to alignment)
> // CHECK: [[COOKIE:%.*]] = bitcast i8* [[ALLOCATED]] to i32*
> // CHECK: store i32 42, i32* [[COOKIE]]
> -// CHECK: [[ARRAY:%.*]] = getelementptr inbounds i8, i8* [[ALLOCATED]], i64 8
> +// CHECK: [[ARRAY:%.*]] = getelementptr inbounds i8, i8* [[ALLOCATED]], i32 8
> // CHECK: bitcast i8* [[ARRAY]] to [[CLASS:%.*]]*
>
> delete [] array;
> // CHECK: [[ARRAY_AS_CHAR:%.*]] = bitcast [[CLASS]]*
> -// CHECK: getelementptr inbounds i8, i8* [[ARRAY_AS_CHAR]], i64 -8
> +// CHECK: getelementptr inbounds i8, i8* [[ARRAY_AS_CHAR]], i32 -8
> }
>
> namespace PR23990 {
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp Tue Sep 8 03:05:57 2015
> @@ -162,7 +162,7 @@ C::C() { foo(); }
> // WIN32-NOT: load
> // WIN32: bitcast %"struct.crash_on_partial_destroy::C"* %{{.*}} to i8*
> // WIN32-NOT: load
> -// WIN32: getelementptr inbounds i8, i8* %{{.*}}, i64 4
> +// WIN32: getelementptr inbounds i8, i8* %{{.*}}, i32 4
> // WIN32-NOT: load
> // WIN32: bitcast i8* %{{.*}} to %"struct.crash_on_partial_destroy::A"*
> // WIN32: call x86_thiscallcc void @"\01??1A at crash_on_partial_destroy@@UAE at XZ"
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-structors.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-structors.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-structors.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-structors.cpp Tue Sep 8 03:05:57 2015
> @@ -161,7 +161,7 @@ C::~C() {
> // CHECK: load %"struct.dtor_in_second_nvbase::C"*, %"struct.dtor_in_second_nvbase::C"** %{{.*}}
> // Now we this-adjust before calling ~B.
> // CHECK: bitcast %"struct.dtor_in_second_nvbase::C"* %{{.*}} to i8*
> -// CHECK: getelementptr inbounds i8, i8* %{{.*}}, i64 4
> +// CHECK: getelementptr inbounds i8, i8* %{{.*}}, i32 4
> // CHECK: bitcast i8* %{{.*}} to %"struct.dtor_in_second_nvbase::B"*
> // CHECK: call x86_thiscallcc void @"\01??1B at dtor_in_second_nvbase@@UAE at XZ"
> // CHECK: (%"struct.dtor_in_second_nvbase::B"* %{{.*}})
> @@ -246,11 +246,11 @@ C::C() {
> //
> // CHECK: [[INIT_VBASES]]
> // CHECK-NEXT: %[[this_i8:.*]] = bitcast %"struct.constructors::C"* %{{.*}} to i8*
> - // CHECK-NEXT: %[[vbptr_off:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i64 0
> + // CHECK-NEXT: %[[vbptr_off:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i32 0
> // CHECK-NEXT: %[[vbptr:.*]] = bitcast i8* %[[vbptr_off]] to i32**
> // CHECK-NEXT: store i32* getelementptr inbounds ([2 x i32], [2 x i32]* @"\01??_8C at constructors@@7B@", i32 0, i32 0), i32** %[[vbptr]]
> // CHECK-NEXT: bitcast %"struct.constructors::C"* %{{.*}} to i8*
> - // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i64 4
> + // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4
> // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"*
> // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"\01??0A at constructors@@QAE at XZ"(%"struct.constructors::A"* %{{.*}})
> // CHECK-NEXT: br label %[[SKIP_VBASES]]
> @@ -281,11 +281,11 @@ D::D() {
> //
> // CHECK: [[INIT_VBASES]]
> // CHECK-NEXT: %[[this_i8:.*]] = bitcast %"struct.constructors::D"* %{{.*}} to i8*
> - // CHECK-NEXT: %[[vbptr_off:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i64 0
> + // CHECK-NEXT: %[[vbptr_off:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i32 0
> // CHECK-NEXT: %[[vbptr:.*]] = bitcast i8* %[[vbptr_off]] to i32**
> // CHECK-NEXT: store i32* getelementptr inbounds ([2 x i32], [2 x i32]* @"\01??_8D at constructors@@7B@", i32 0, i32 0), i32** %[[vbptr]]
> // CHECK-NEXT: bitcast %"struct.constructors::D"* %{{.*}} to i8*
> - // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i64 4
> + // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4
> // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"*
> // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"\01??0A at constructors@@QAE at XZ"(%"struct.constructors::A"* %{{.*}})
> // CHECK-NEXT: br label %[[SKIP_VBASES]]
> @@ -308,14 +308,14 @@ E::E() {
> //
> // CHECK: [[INIT_VBASES]]
> // CHECK-NEXT: %[[this_i8:.*]] = bitcast %"struct.constructors::E"* %{{.*}} to i8*
> - // CHECK-NEXT: %[[offs:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i64 0
> + // CHECK-NEXT: %[[offs:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i32 0
> // CHECK-NEXT: %[[vbptr_E:.*]] = bitcast i8* %[[offs]] to i32**
> // CHECK-NEXT: store i32* getelementptr inbounds ([3 x i32], [3 x i32]* @"\01??_8E at constructors@@7B01@@", i32 0, i32 0), i32** %[[vbptr_E]]
> - // CHECK-NEXT: %[[offs:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i64 4
> + // CHECK-NEXT: %[[offs:.*]] = getelementptr inbounds i8, i8* %[[this_i8]], i32 4
> // CHECK-NEXT: %[[vbptr_C:.*]] = bitcast i8* %[[offs]] to i32**
> // CHECK-NEXT: store i32* getelementptr inbounds ([2 x i32], [2 x i32]* @"\01??_8E at constructors@@7BC at 1@@", i32 0, i32 0), i32** %[[vbptr_C]]
> // CHECK-NEXT: bitcast %"struct.constructors::E"* %{{.*}} to i8*
> - // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i64 4
> + // CHECK-NEXT: getelementptr inbounds i8, i8* %{{.*}}, i32 4
> // CHECK-NEXT: bitcast i8* %{{.*}} to %"struct.constructors::A"*
> // CHECK-NEXT: call x86_thiscallcc %"struct.constructors::A"* @"\01??0A at constructors@@QAE at XZ"(%"struct.constructors::A"* %{{.*}})
> // CHECK: call x86_thiscallcc %"struct.constructors::C"* @"\01??0C at constructors@@QAE at XZ"(%"struct.constructors::C"* %{{.*}}, i32 0)
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-try-throw.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-try-throw.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-try-throw.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-try-throw.cpp Tue Sep 8 03:05:57 2015
> @@ -26,7 +26,7 @@ int main() {
> }
> #endif
> #ifdef THROW
> - // THROW: store i32 42, i32* %[[mem_for_throw:.*]]
> + // THROW: store i32 42, i32* %[[mem_for_throw:.*]], align 4
> // THROW: %[[cast:.*]] = bitcast i32* %[[mem_for_throw]] to i8*
> // THROW: call void @_CxxThrowException(i8* %[[cast]], %eh.ThrowInfo* @_TI1H)
> throw int(42);
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance-vtordisps.cpp Tue Sep 8 03:05:57 2015
> @@ -26,7 +26,7 @@ D::D() {} // Forces vftable emission.
> // CHECK-LABEL: define linkonce_odr x86_thiscallcc void @"\01?f at D@@$4PPPPPPPM at A@AEXXZ"
> // CHECK: %[[ECX:.*]] = load %struct.D*, %struct.D** %{{.*}}
> // CHECK: %[[ECX_i8:.*]] = bitcast %struct.D* %[[ECX]] to i8*
> -// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr i8, i8* %[[ECX_i8]], i32 -4
> +// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr inbounds i8, i8* %[[ECX_i8]], i32 -4
> // CHECK: %[[VTORDISP_PTR:.*]] = bitcast i8* %[[VTORDISP_PTR_i8]] to i32*
> // CHECK: %[[VTORDISP:.*]] = load i32, i32* %[[VTORDISP_PTR]]
> // CHECK: %[[VTORDISP_NEG:.*]] = sub i32 0, %[[VTORDISP]]
> @@ -37,7 +37,7 @@ D::D() {} // Forces vftable emission.
> // CHECK-LABEL: define linkonce_odr x86_thiscallcc void @"\01?f at D@@$4PPPPPPPI at 3AEXXZ"
> // CHECK: %[[ECX:.*]] = load %struct.D*, %struct.D** %{{.*}}
> // CHECK: %[[ECX_i8:.*]] = bitcast %struct.D* %[[ECX]] to i8*
> -// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr i8, i8* %[[ECX_i8]], i32 -8
> +// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr inbounds i8, i8* %[[ECX_i8]], i32 -8
> // CHECK: %[[VTORDISP_PTR:.*]] = bitcast i8* %[[VTORDISP_PTR_i8]] to i32*
> // CHECK: %[[VTORDISP:.*]] = load i32, i32* %[[VTORDISP_PTR]]
> // CHECK: %[[VTORDISP_NEG:.*]] = sub i32 0, %[[VTORDISP]]
> @@ -66,7 +66,7 @@ G::G() {} // Forces vftable emission.
> // CHECK-LABEL: define linkonce_odr x86_thiscallcc void @"\01?f at E@@$R4BA at M@PPPPPPPM at 7AEXXZ"(i8*)
> // CHECK: %[[ECX:.*]] = load %struct.E*, %struct.E** %{{.*}}
> // CHECK: %[[ECX_i8:.*]] = bitcast %struct.E* %[[ECX]] to i8*
> -// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr i8, i8* %[[ECX_i8]], i32 -4
> +// CHECK: %[[VTORDISP_PTR_i8:.*]] = getelementptr inbounds i8, i8* %[[ECX_i8]], i32 -4
> // CHECK: %[[VTORDISP_PTR:.*]] = bitcast i8* %[[VTORDISP_PTR_i8]] to i32*
> // CHECK: %[[VTORDISP:.*]] = load i32, i32* %[[VTORDISP_PTR]]
> // CHECK: %[[VTORDISP_NEG:.*]] = sub i32 0, %[[VTORDISP]]
>
> Modified: cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp Tue Sep 8 03:05:57 2015
> @@ -91,7 +91,7 @@ B::~B() {
> // CHECK2: %[[B:.*]] = bitcast i8* %[[B_i8]] to %struct.B*
> // CHECK2: call x86_thiscallcc void @"\01??1B@@UAE at XZ"(%struct.B* %[[B]])
> // CHECK2: %[[THIS_i8:.*]] = bitcast %struct.B* %[[THIS]] to i8*
> - // CHECK2: %[[VBASE_i8:.*]] = getelementptr inbounds i8, i8* %[[THIS_i8]], i64 8
> + // CHECK2: %[[VBASE_i8:.*]] = getelementptr inbounds i8, i8* %[[THIS_i8]], i32 8
> // CHECK2: %[[VBASE:.*]] = bitcast i8* %[[VBASE_i8]] to %struct.VBase*
> // CHECK2: call x86_thiscallcc void @"\01??1VBase@@UAE at XZ"(%struct.VBase* %[[VBASE]])
> // CHECK2: ret
> @@ -290,7 +290,7 @@ D::~D() {
> // CHECK: store %"struct.diamond::D"* %[[THIS]], %"struct.diamond::D"** %[[THIS_VAL:.*]], align 4
> // CHECK: %[[THIS:.*]] = load %"struct.diamond::D"*, %"struct.diamond::D"** %[[THIS_VAL]]
> // CHECK: %[[D_i8:.*]] = bitcast %"struct.diamond::D"* %[[THIS]] to i8*
> - // CHECK: %[[C_i8:.*]] = getelementptr inbounds i8, i8* %[[D_i8]], i64 4
> + // CHECK: %[[C_i8:.*]] = getelementptr inbounds i8, i8* %[[D_i8]], i32 4
> // CHECK: %[[C:.*]] = bitcast i8* %[[C_i8]] to %"struct.diamond::C"*
> // CHECK: %[[C_i8:.*]] = bitcast %"struct.diamond::C"* %[[C]] to i8*
> // CHECK: %[[ARG_i8:.*]] = getelementptr i8, i8* %{{.*}}, i32 16
>
> Modified: cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp Tue Sep 8 03:05:57 2015
> @@ -17,7 +17,7 @@ void g() {
> static int a = f();
> }
> // WEBASSEMBLY32-LABEL: @_Z1gv()
> -// WEBASSEMBLY32: %[[R0:.+]] = load atomic i8, i8* bitcast (i32* @_ZGVZ1gvE1a to i8*) acquire, align 1
> +// WEBASSEMBLY32: %[[R0:.+]] = load atomic i8, i8* bitcast (i32* @_ZGVZ1gvE1a to i8*) acquire, align 4
> // WEBASSEMBLY32-NEXT: %[[R1:.+]] = and i8 %[[R0]], 1
> // WEBASSEMBLY32-NEXT: %[[R2:.+]] = icmp eq i8 %[[R1]], 0
> // WEBASSEMBLY32-NEXT: br i1 %[[R2]], label %[[CHECK:.+]], label %[[END:.+]]
> @@ -27,7 +27,7 @@ void g() {
> // WEBASSEMBLY32: call void @__cxa_guard_release
> //
> // WEBASSEMBLY64-LABEL: @_Z1gv()
> -// WEBASSEMBLY64: %[[R0:.+]] = load atomic i8, i8* bitcast (i64* @_ZGVZ1gvE1a to i8*) acquire, align 1
> +// WEBASSEMBLY64: %[[R0:.+]] = load atomic i8, i8* bitcast (i64* @_ZGVZ1gvE1a to i8*) acquire, align 8
> // WEBASSEMBLY64-NEXT: %[[R1:.+]] = and i8 %[[R0]], 1
> // WEBASSEMBLY64-NEXT: %[[R2:.+]] = icmp eq i8 %[[R1]], 0
> // WEBASSEMBLY64-NEXT: br i1 %[[R2]], label %[[CHECK:.+]], label %[[END:.+]]
>
> Modified: cfe/trunk/test/CodeGenCXX/static-init.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/static-init.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/static-init.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/static-init.cpp Tue Sep 8 03:05:57 2015
> @@ -6,8 +6,8 @@
>
> // CHECK: @_ZZN5test31BC1EvE1u = internal global { i8, [3 x i8] } { i8 97, [3 x i8] undef }, align 4
>
> -// CHECK: @_ZZ2h2vE1i = linkonce_odr global i32 0, comdat, align
> -// CHECK: @_ZGVZ2h2vE1i = linkonce_odr global i64 0, comdat{{$}}
> +// CHECK: @_ZZ2h2vE1i = linkonce_odr global i32 0, comdat, align 4
> +// CHECK: @_ZGVZ2h2vE1i = linkonce_odr global i64 0, comdat, align 8{{$}}
> // CHECK: @_ZZN5test1L6getvarEiE3var = internal constant [4 x i32] [i32 1, i32 0, i32 2, i32 4], align 16
> // CHECK: @_ZZN5test414useStaticLocalEvE3obj = linkonce_odr global %"struct.test4::HasVTable" zeroinitializer, comdat, align 8
>
> @@ -17,7 +17,7 @@ struct A {
> };
>
> void f() {
> - // CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZ1fvE1a to i8*) acquire, align 1
> + // CHECK: load atomic i8, i8* bitcast (i64* @_ZGVZ1fvE1a to i8*) acquire, align 8
> // CHECK: call i32 @__cxa_guard_acquire
> // CHECK: call void @_ZN1AC1Ev
> // CHECK: call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.A*)* @_ZN1AD1Ev to void (i8*)*), i8* getelementptr inbounds (%struct.A, %struct.A* @_ZZ1fvE1a, i32 0, i32 0), i8* @__dso_handle)
>
> Modified: cfe/trunk/test/CodeGenCXX/vararg-non-pod-ms-compat.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/vararg-non-pod-ms-compat.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/vararg-non-pod-ms-compat.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/vararg-non-pod-ms-compat.cpp Tue Sep 8 03:05:57 2015
> @@ -18,7 +18,7 @@ void test(X x) {
> // X64: alloca %struct.X
>
> // X64: %[[agg:[^ ]*]] = alloca %struct.X
> - // X64: %[[valptr:[^ ]*]] = getelementptr %struct.X, %struct.X* %[[agg]], i32 0, i32 0
> + // X64: %[[valptr:[^ ]*]] = getelementptr inbounds %struct.X, %struct.X* %[[agg]], i32 0, i32 0
> // X64: %[[val:[^ ]*]] = load i32, i32* %[[valptr]]
> // X64: call void (...) @"\01?vararg@@YAXZZ"(i32 %[[val]])
>
>
> Modified: cfe/trunk/test/CodeGenCXX/wasm-args-returns.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/wasm-args-returns.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenCXX/wasm-args-returns.cpp (original)
> +++ cfe/trunk/test/CodeGenCXX/wasm-args-returns.cpp Tue Sep 8 03:05:57 2015
> @@ -42,17 +42,17 @@ struct copy_ctor {
> copy_ctor(copy_ctor const&);
> };
> test(copy_ctor);
> -// CHECK: define void @_Z7forward9copy_ctor(%struct.copy_ctor* noalias sret %{{.*}}, %struct.copy_ctor* align 8 %{{.*}})
> +// CHECK: define void @_Z7forward9copy_ctor(%struct.copy_ctor* noalias sret %{{.*}}, %struct.copy_ctor* %{{.*}})
> //
> // CHECK: declare %struct.copy_ctor* @_ZN9copy_ctorC1ERKS_(%struct.copy_ctor* returned, %struct.copy_ctor* dereferenceable(8))
> //
> // CHECK: define void @_Z14test_copy_ctorv()
> // CHECK: %[[tmp:.*]] = alloca %struct.copy_ctor, align 8
> // CHECK: call void @_Z13def_copy_ctorv(%struct.copy_ctor* nonnull sret %[[tmp]])
> -// CHECK: call void @_Z3use9copy_ctor(%struct.copy_ctor* nonnull align 8 %[[tmp]])
> +// CHECK: call void @_Z3use9copy_ctor(%struct.copy_ctor* nonnull %[[tmp]])
> // CHECK: ret void
> //
> -// CHECK: declare void @_Z3use9copy_ctor(%struct.copy_ctor* align 8)
> +// CHECK: declare void @_Z3use9copy_ctor(%struct.copy_ctor*)
> // CHECK: declare void @_Z13def_copy_ctorv(%struct.copy_ctor* sret)
>
> struct __attribute__((aligned(16))) aligned_copy_ctor {
> @@ -60,17 +60,17 @@ struct __attribute__((aligned(16))) alig
> aligned_copy_ctor(aligned_copy_ctor const&);
> };
> test(aligned_copy_ctor);
> -// CHECK: define void @_Z7forward17aligned_copy_ctor(%struct.aligned_copy_ctor* noalias sret %{{.*}}, %struct.aligned_copy_ctor* align 16 %{{.*}})
> +// CHECK: define void @_Z7forward17aligned_copy_ctor(%struct.aligned_copy_ctor* noalias sret %{{.*}}, %struct.aligned_copy_ctor* %{{.*}})
> //
> // CHECK: declare %struct.aligned_copy_ctor* @_ZN17aligned_copy_ctorC1ERKS_(%struct.aligned_copy_ctor* returned, %struct.aligned_copy_ctor* dereferenceable(16))
> //
> // CHECK: define void @_Z22test_aligned_copy_ctorv()
> // CHECK: %[[tmp:.*]] = alloca %struct.aligned_copy_ctor, align 16
> // CHECK: call void @_Z21def_aligned_copy_ctorv(%struct.aligned_copy_ctor* nonnull sret %[[tmp]])
> -// CHECK: call void @_Z3use17aligned_copy_ctor(%struct.aligned_copy_ctor* nonnull align 16 %[[tmp]])
> +// CHECK: call void @_Z3use17aligned_copy_ctor(%struct.aligned_copy_ctor* nonnull %[[tmp]])
> // CHECK: ret void
> //
> -// CHECK: declare void @_Z3use17aligned_copy_ctor(%struct.aligned_copy_ctor* align 16)
> +// CHECK: declare void @_Z3use17aligned_copy_ctor(%struct.aligned_copy_ctor*)
> // CHECK: declare void @_Z21def_aligned_copy_ctorv(%struct.aligned_copy_ctor* sret)
>
> struct empty {};
>
> Modified: cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout-2.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout-2.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout-2.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout-2.m Tue Sep 8 03:05:57 2015
> @@ -11,31 +11,30 @@ int main() {
> NSString *strong;
> unsigned long long eightByte = 0x8001800181818181ull;
> // Test1
> -// CHECK: block variable layout: BL_NON_OBJECT_WORD:3, BL_STRONG:1, BL_OPERATOR:0
> + // CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^block1)() = ^{ printf("%#llx", eightByte); NSLog(@"%@", strong); };
>
> // Test2
> int i = 1;
> -// CHECK: block variable layout: BL_NON_OBJECT_WORD:3, BL_STRONG:1, BL_OPERATOR:0
> + // CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^block2)() = ^{ printf("%#llx, %d", eightByte, i); NSLog(@"%@", strong); };
>
> // Test3
> char ch = 'a';
> -// CHECK: block variable layout: BL_NON_OBJECT_WORD:3, BL_STRONG:1, BL_OPERATOR:0
> + // CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^block3)() = ^{ printf("%c %#llx", ch, eightByte); NSLog(@"%@", strong); };
>
> // Test4
> unsigned long fourByte = 0x8001ul;
> -// block variable layout: BL_NON_OBJECT_WORD:1, BL_STRONG:1, BL_OPERATOR:0
> -// CHECK: Inline instruction for block variable layout: 0x0100
> + // CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^block4)() = ^{ printf("%c %#lx", ch, fourByte); NSLog(@"%@", strong); };
>
> // Test5
> -// CHECK: block variable layout: BL_NON_OBJECT_WORD:3, BL_STRONG:1, BL_OPERATOR:0
> + // CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^block5)() = ^{ NSLog(@"%@", strong); printf("%c %#llx", ch, eightByte); };
>
> // Test6
> -// CHECK: block variable layout: BL_OPERATOR:0
> + // CHECK: Block variable layout: BL_OPERATOR:0
> void (^block6)() = ^{ printf("%#llx", eightByte); };
> }
>
>
> Modified: cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc-captured-32bit-block-var-layout.m Tue Sep 8 03:05:57 2015
> @@ -33,7 +33,7 @@ void f() {
> // and a descriptor pointer).
>
> // Test 1
> -// CHECK: Inline instruction for block variable layout: 0x0320
> +// CHECK: Inline block variable layout: 0x0320, BL_STRONG:3, BL_BYREF:2, BL_OPERATOR:0
> void (^b)() = ^{
> byref_int = sh + ch+ch1+ch2 ;
> x(bar);
> @@ -44,7 +44,7 @@ void f() {
> b();
>
> // Test 2
> -// CHECK: Inline instruction for block variable layout: 0x0331
> +// CHECK: Inline block variable layout: 0x0331, BL_STRONG:3, BL_BYREF:3, BL_WEAK:1, BL_OPERATOR:0
> void (^c)() = ^{
> byref_int = sh + ch+ch1+ch2 ;
> x(bar);
> @@ -65,7 +65,7 @@ void g() {
> unsigned int i;
> NSString *y;
> NSString *z;
> -// CHECK: Inline instruction for block variable layout: 0x0401
> +// CHECK: Inline block variable layout: 0x0401, BL_STRONG:4, BL_WEAK:1, BL_OPERATOR:0
> void (^c)() = ^{
> int j = i + bletch;
> x(foo);
> @@ -110,7 +110,7 @@ void h() {
> block variable layout: BL_NON_OBJECT_WORD:1, BL_UNRETAINE:1, BL_NON_OBJECT_WORD:1,
> BL_UNRETAINE:1, BL_NON_OBJECT_WORD:3, BL_BYREF:1, BL_OPERATOR:0
> */
> -// CHECK: block variable layout: BL_BYREF:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_BYREF:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> void (^c)() = ^{
> x(s2.ui.o1);
> x(u2.o1);
> @@ -125,7 +125,7 @@ void arr1() {
> __unsafe_unretained id unsafe_unretained_var[4];
> } imported_s;
>
> -// CHECK: block variable layout: BL_UNRETAINED:4, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_UNRETAINED:4, BL_OPERATOR:0
> void (^c)() = ^{
> x(imported_s.unsafe_unretained_var[2]);
> };
> @@ -140,7 +140,7 @@ void arr2() {
> __unsafe_unretained id unsafe_unretained_var[4];
> } imported_s;
>
> -// CHECK: block variable layout: BL_NON_OBJECT_WORD:1, BL_UNRETAINED:4, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_NON_OBJECT_WORD:1, BL_UNRETAINED:4, BL_OPERATOR:0
> void (^c)() = ^{
> x(imported_s.unsafe_unretained_var[2]);
> };
> @@ -155,7 +155,7 @@ void arr3() {
> __unsafe_unretained id unsafe_unretained_var[0];
> } imported_s;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> void (^c)() = ^{
> int i = imported_s.a;
> };
> @@ -181,7 +181,7 @@ void arr4() {
> } f4[2][2];
> } captured_s;
>
> -// CHECK: block variable layout: BL_UNRETAINED:3, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_UNRETAINED:3, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> void (^c)() = ^{
> id i = captured_s.f0.s_f1;
> };
> @@ -199,7 +199,7 @@ void bf1() {
> int flag4: 24;
> } s;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> int (^c)() = ^{
> return s.flag;
> };
> @@ -212,7 +212,7 @@ void bf2() {
> int flag : 1;
> } s;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> int (^c)() = ^{
> return s.flag;
> };
> @@ -243,7 +243,7 @@ void bf3() {
> unsigned int _filler : 32;
> } _flags;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags._draggedNodesAreDeletable;
> };
> @@ -278,7 +278,7 @@ void bf4() {
> unsigned int _filler : 32;
> } _flags;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags._draggedNodesAreDeletable;
> };
> @@ -296,7 +296,7 @@ void bf5() {
> unsigned char flag1 : 1;
> } _flags;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags.flag;
> };
> @@ -313,7 +313,7 @@ void bf6() {
> unsigned char flag1 : 1;
> } _flags;
>
> -// CHECK: block variable layout: BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags.flag;
> };
> @@ -329,7 +329,7 @@ void Test7() {
> __weak id wid9, wid10, wid11, wid12;
> __weak id wid13, wid14, wid15, wid16;
> const id bar = (id) opaque_id();
> -// CHECK: block variable layout: BL_STRONG:1, BL_WEAK:16, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_STRONG:1, BL_WEAK:16, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> x(wid1);
> @@ -364,7 +364,7 @@ __weak id wid;
> __weak id w9, w10, w11, w12;
> __weak id w13, w14, w15, w16;
> const id bar = (id) opaque_id();
> -// CHECK: block variable layout: BL_STRONG:1, BL_WEAK:16, BL_WEAK:16, BL_WEAK:1, BL_OPERATOR:0
> +// CHECK: Block variable layout: BL_STRONG:1, BL_WEAK:16, BL_WEAK:16, BL_WEAK:1, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> x(wid1);
>
> Modified: cfe/trunk/test/CodeGenObjC/arc-captured-block-var-inlined-layout.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc-captured-block-var-inlined-layout.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc-captured-block-var-inlined-layout.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc-captured-block-var-inlined-layout.m Tue Sep 8 03:05:57 2015
> @@ -1,7 +1,7 @@
> // RUN: %clang_cc1 -fblocks -fobjc-arc -fobjc-runtime-has-weak -triple x86_64-apple-darwin -print-ivar-layout -emit-llvm -o /dev/null %s > %t-64.layout
> -// RUN: FileCheck --input-file=%t-64.layout %s
> +// RUN: FileCheck -check-prefix=CHECK -check-prefix=CHECK-64 --input-file=%t-64.layout %s
> // RUN: %clang_cc1 -fblocks -fobjc-arc -fobjc-runtime-has-weak -triple i386-apple-darwin -print-ivar-layout -emit-llvm -o /dev/null %s > %t-32.layout
> -// RUN: FileCheck -check-prefix=CHECK-i386 --input-file=%t-32.layout %s
> +// RUN: FileCheck -check-prefix=CHECK -check-prefix=CHECK-32 --input-file=%t-32.layout %s
> // rdar://12184410
>
> void x(id y) {}
> @@ -17,22 +17,19 @@ void f() {
> __block id byref_bab = (id)0;
> __block id bl_var1;
>
> -// CHECK: Inline instruction for block variable layout: 0x0100
> -// CHECK-i386: Inline instruction for block variable layout: 0x0100
> +// CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x0210
> -// CHECK-i386: Inline instruction for block variable layout: 0x0210
> +// CHECK: Inline block variable layout: 0x0210, BL_STRONG:2, BL_BYREF:1, BL_OPERATOR:0
> void (^c)() = ^{
> x(bar);
> x(baz);
> byref_int = 1;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x0230
> -// CHECK-i386: Inline instruction for block variable layout: 0x0230
> +// CHECK: Inline block variable layout: 0x0230, BL_STRONG:2, BL_BYREF:3, BL_OPERATOR:0
> void (^d)() = ^{
> x(bar);
> x(baz);
> @@ -41,8 +38,7 @@ void f() {
> byref_bab = 0;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x0231
> -// CHECK-i386: Inline instruction for block variable layout: 0x0231
> +// CHECK: Inline block variable layout: 0x0231, BL_STRONG:2, BL_BYREF:3, BL_WEAK:1, BL_OPERATOR:0
> __weak id wid;
> id (^e)() = ^{
> x(bar);
> @@ -53,8 +49,7 @@ void f() {
> return wid;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x0235
> -// CHECK-i386: Inline instruction for block variable layout: 0x0235
> +// CHECK: Inline block variable layout: 0x0235, BL_STRONG:2, BL_BYREF:3, BL_WEAK:5, BL_OPERATOR:0
> __weak id wid1, wid2, wid3, wid4;
> id (^f)() = ^{
> x(bar);
> @@ -69,8 +64,7 @@ void f() {
> return wid;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x035
> -// CHECK-i386: Inline instruction for block variable layout: 0x035
> +// CHECK: Inline block variable layout: 0x035, BL_BYREF:3, BL_WEAK:5, BL_OPERATOR:0
> id (^g)() = ^{
> byref_int = 1;
> bl_var1 = 0;
> @@ -82,21 +76,18 @@ void f() {
> return wid;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x01
> -// CHECK-i386: Inline instruction for block variable layout: 0x01
> +// CHECK: Inline block variable layout: 0x01, BL_WEAK:1, BL_OPERATOR:0
> id (^h)() = ^{
> return wid;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x020
> -// CHECK-i386: Inline instruction for block variable layout: 0x020
> +// CHECK: Inline block variable layout: 0x020, BL_BYREF:2, BL_OPERATOR:0
> void (^ii)() = ^{
> byref_int = 1;
> byref_bab = 0;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x0102
> -// CHECK-i386: Inline instruction for block variable layout: 0x0102
> +// CHECK: Inline block variable layout: 0x0102, BL_STRONG:1, BL_WEAK:2, BL_OPERATOR:0
> void (^jj)() = ^{
> x(bar);
> x(wid1);
> @@ -114,8 +105,7 @@ int main() {
> __weak NSString *w1 = 0;
>
>
> -// CHECK: Inline instruction for block variable layout: 0x0201
> -// CHECK-i386: Inline instruction for block variable layout: 0x0201
> +// CHECK: Inline block variable layout: 0x0201, BL_STRONG:2, BL_WEAK:1, BL_OPERATOR:0
> dispatch_block_t block2 = ^{
> NSLog(@"%@, %@, %@", s1, w1, s2);
> };
>
> Modified: cfe/trunk/test/CodeGenObjC/arc-captured-block-var-layout.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc-captured-block-var-layout.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc-captured-block-var-layout.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc-captured-block-var-layout.m Tue Sep 8 03:05:57 2015
> @@ -34,7 +34,7 @@ void f() {
>
> // Test 1
> // Inline instruction for block variable layout: 0x0320 (3 strong 2 byref)
> -// CHECK-LP64: Inline instruction for block variable layout: 0x0320
> +// CHECK-LP64: Inline block variable layout: 0x0320, BL_STRONG:3, BL_BYREF:2, BL_OPERATOR:0
> void (^b)() = ^{
> byref_int = sh + ch+ch1+ch2 ;
> x(bar);
> @@ -46,7 +46,7 @@ void f() {
>
> // Test 2
> // Inline instruction for block variable layout: 0x0331 (3 strong 3 byref 1 weak)
> -// CHECK-LP64: Inline instruction for block variable layout: 0x0331
> +// CHECK-LP64: Inline block variable layout: 0x0331, BL_STRONG:3, BL_BYREF:3, BL_WEAK:1, BL_OPERATOR:0
> void (^c)() = ^{
> byref_int = sh + ch+ch1+ch2 ;
> x(bar);
> @@ -68,7 +68,7 @@ void g() {
> NSString *y;
> NSString *z;
> // Inline instruction for block variable layout: 0x0401 (4 strong 0 byref 1 weak)
> -// CHECK-LP64: Inline instruction for block variable layout: 0x0401
> +// CHECK-LP64: Inline block variable layout: 0x0401, BL_STRONG:4, BL_WEAK:1, BL_OPERATOR:0
> void (^c)() = ^{
> int j = i + bletch;
> x(foo);
> @@ -109,7 +109,7 @@ void h() {
> union U u2;
> __block id block_id;
>
> -// CHECK-LP64: block variable layout: BL_BYREF:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_BYREF:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> void (^c)() = ^{
> x(s2.ui.o1);
> x(u2.o1);
> @@ -124,7 +124,7 @@ void arr1() {
> __unsafe_unretained id unsafe_unretained_var[4];
> } imported_s;
>
> -// CHECK-LP64: block variable layout: BL_UNRETAINED:4, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_UNRETAINED:4, BL_OPERATOR:0
> void (^c)() = ^{
> x(imported_s.unsafe_unretained_var[2]);
> };
> @@ -139,7 +139,7 @@ void arr2() {
> __unsafe_unretained id unsafe_unretained_var[4];
> } imported_s;
>
> -// CHECK-LP64: block variable layout: BL_NON_OBJECT_WORD:1, BL_UNRETAINED:4, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_NON_OBJECT_WORD:1, BL_UNRETAINED:4, BL_OPERATOR:0
> void (^c)() = ^{
> x(imported_s.unsafe_unretained_var[2]);
> };
> @@ -154,7 +154,7 @@ void arr3() {
> __unsafe_unretained id unsafe_unretained_var[0];
> } imported_s;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> void (^c)() = ^{
> int i = imported_s.a;
> };
> @@ -180,7 +180,7 @@ void arr4() {
> } f4[2][2];
> } captured_s;
>
> -// CHECK-LP64: block variable layout: BL_UNRETAINED:3, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_UNRETAINED:3, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_NON_OBJECT_WORD:1, BL_UNRETAINED:1, BL_OPERATOR:0
> void (^c)() = ^{
> id i = captured_s.f0.s_f1;
> };
> @@ -198,7 +198,7 @@ void bf1() {
> int flag4: 24;
> } s;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> int (^c)() = ^{
> return s.flag;
> };
> @@ -211,7 +211,7 @@ void bf2() {
> int flag : 1;
> } s;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> int (^c)() = ^{
> return s.flag;
> };
> @@ -242,7 +242,7 @@ void bf3() {
> unsigned int _filler : 32;
> } _flags;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags._draggedNodesAreDeletable;
> };
> @@ -277,7 +277,7 @@ void bf4() {
> unsigned int _filler : 32;
> } _flags;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags._draggedNodesAreDeletable;
> };
> @@ -295,7 +295,7 @@ void bf5() {
> unsigned char flag1 : 1;
> } _flags;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags.flag;
> };
> @@ -312,7 +312,7 @@ void bf6() {
> unsigned char flag1 : 1;
> } _flags;
>
> -// CHECK-LP64: block variable layout: BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_OPERATOR:0
> unsigned char (^c)() = ^{
> return _flags.flag;
> };
> @@ -328,7 +328,7 @@ void Test7() {
> __weak id wid9, wid10, wid11, wid12;
> __weak id wid13, wid14, wid15, wid16;
> const id bar = (id) opaque_id();
> -// CHECK-LP64: block variable layout: BL_STRONG:1, BL_WEAK:16, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_STRONG:1, BL_WEAK:16, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> x(wid1);
> @@ -363,7 +363,7 @@ __weak id wid;
> __weak id w9, w10, w11, w12;
> __weak id w13, w14, w15, w16;
> const id bar = (id) opaque_id();
> -// CHECK-LP64: block variable layout: BL_STRONG:1, BL_WEAK:16, BL_WEAK:16, BL_WEAK:1, BL_OPERATOR:0
> +// CHECK-LP64: Block variable layout: BL_STRONG:1, BL_WEAK:16, BL_WEAK:16, BL_WEAK:1, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> x(wid1);
>
> Modified: cfe/trunk/test/CodeGenObjC/arc-literals.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc-literals.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc-literals.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc-literals.m Tue Sep 8 03:05:57 2015
> @@ -47,10 +47,10 @@ void test_array(id a, id b) {
> // CHECK: call i8* @objc_retain(i8*
>
> // Constructing the array
> - // CHECK: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS:%[A-Za-z0-9]+]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS:%[A-Za-z0-9]+]], i64 0, i64 0
> // CHECK-NEXT: [[V0:%.*]] = load i8*, i8** [[A]],
> // CHECK-NEXT: store i8* [[V0]], i8** [[T0]]
> - // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 1
> + // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 1
> // CHECK-NEXT: [[V1:%.*]] = load i8*, i8** [[B]],
> // CHECK-NEXT: store i8* [[V1]], i8** [[T0]]
>
> @@ -83,16 +83,16 @@ void test_dictionary(id k1, id o1, id k2
> // CHECK: call i8* @objc_retain(i8*
>
> // Constructing the arrays
> - // CHECK: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[KEYS:%[A-Za-z0-9]+]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[KEYS:%[A-Za-z0-9]+]], i64 0, i64 0
> // CHECK-NEXT: [[V0:%.*]] = load i8*, i8** [[K1]],
> // CHECK-NEXT: store i8* [[V0]], i8** [[T0]]
> - // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS:%[A-Za-z0-9]+]], i32 0, i32 0
> + // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS:%[A-Za-z0-9]+]], i64 0, i64 0
> // CHECK-NEXT: [[V1:%.*]] = load i8*, i8** [[O1]],
> // CHECK-NEXT: store i8* [[V1]], i8** [[T0]]
> - // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[KEYS]], i32 0, i32 1
> + // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[KEYS]], i64 0, i64 1
> // CHECK-NEXT: [[V2:%.*]] = load i8*, i8** [[K2]],
> // CHECK-NEXT: store i8* [[V2]], i8** [[T0]]
> - // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 1
> + // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 1
> // CHECK-NEXT: [[V3:%.*]] = load i8*, i8** [[O2]],
> // CHECK-NEXT: store i8* [[V3]], i8** [[T0]]
>
> @@ -128,7 +128,7 @@ void test_property(B *b) {
> // Retain parameter
> // CHECK: call i8* @objc_retain
>
> - // CHECK: [[T0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[OBJECTS:%.*]], i32 0, i32 0
> + // CHECK: [[T0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[OBJECTS:%.*]], i64 0, i64 0
>
> // Invoke 'prop'
> // CHECK: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES
>
> Modified: cfe/trunk/test/CodeGenObjC/arc.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/arc.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/arc.m (original)
> +++ cfe/trunk/test/CodeGenObjC/arc.m Tue Sep 8 03:05:57 2015
> @@ -515,7 +515,7 @@ void test19() {
>
> // CHECK-NEXT: [[CALL:%.*]] = call i8* @test19_helper()
> // CHECK-NEXT: [[T1:%.*]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[CALL]]) [[NUW]]
> - // CHECK-NEXT: [[SLOT:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[X]], i32 0, i64 2
> + // CHECK-NEXT: [[SLOT:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[X]], i64 0, i64 2
> // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[SLOT]]
> // CHECK-NEXT: store i8* [[T1]], i8** [[SLOT]]
> // CHECK-NEXT: call void @objc_release(i8* [[T0]]) [[NUW]]
> @@ -556,7 +556,7 @@ void test20(unsigned n) {
> // Zero-initialize.
> // CHECK-NEXT: [[T0:%.*]] = bitcast i8** [[VLA]] to i8*
> // CHECK-NEXT: [[T1:%.*]] = mul nuw i64 [[DIM]], 8
> - // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 [[T1]], i32 8, i1 false)
> + // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 [[T1]], i32 16, i1 false)
>
> // Destroy.
> // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i8*, i8** [[VLA]], i64 [[DIM]]
> @@ -599,7 +599,7 @@ void test21(unsigned n) {
> // CHECK-NEXT: [[T0:%.*]] = bitcast [3 x i8*]* [[VLA]] to i8*
> // CHECK-NEXT: [[T1:%.*]] = mul nuw i64 2, [[DIM]]
> // CHECK-NEXT: [[T2:%.*]] = mul nuw i64 [[T1]], 24
> - // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 [[T2]], i32 8, i1 false)
> + // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 [[T2]], i32 16, i1 false)
>
> // Destroy.
> // CHECK-NEXT: [[T0:%.*]] = mul nuw i64 2, [[DIM]]
>
> Modified: cfe/trunk/test/CodeGenObjC/debug-info-block-captured-self.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/debug-info-block-captured-self.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/debug-info-block-captured-self.m (original)
> +++ cfe/trunk/test/CodeGenObjC/debug-info-block-captured-self.m Tue Sep 8 03:05:57 2015
> @@ -53,13 +53,13 @@ typedef enum {
> // CHECK: define internal void {{.*}}_block_invoke{{.*}}
> // CHECK: %[[MEM1:.*]] = alloca i8*, align 8
> // CHECK-NEXT: %[[MEM2:.*]] = alloca i8*, align 8
> +// CHECK-NEXT: [[DBGADDR:%.*]] = alloca [[BLOCK_T:<{.*}>]]*, align 8
> // CHECK: store i8* [[BLOCK_DESC:%.*]], i8** %[[MEM1]], align 8
> // CHECK: %[[TMP0:.*]] = load i8*, i8** %[[MEM1]]
> // CHECK: call void @llvm.dbg.value(metadata i8* %[[TMP0]], i64 0, metadata ![[BDMD:[0-9]+]], metadata !{{.*}})
> // CHECK: call void @llvm.dbg.declare(metadata i8* [[BLOCK_DESC]], metadata ![[BDMD:[0-9]+]], metadata !{{.*}})
> -// CHECK: %[[TMP1:.*]] = bitcast
> -// CHECK-NEXT: store
> -// CHECK: call void @llvm.dbg.declare(metadata <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** {{[^,]*}}, metadata ![[SELF:.*]], metadata !{{.*}})
> +// CHECK: store [[BLOCK_T]]* {{%.*}}, [[BLOCK_T]]** [[DBGADDR]], align 8
> +// CHECK: call void @llvm.dbg.declare(metadata [[BLOCK_T]]** [[DBGADDR]], metadata ![[SELF:.*]], metadata !{{.*}})
> // make sure we are still in the same function
> // CHECK: define {{.*}}__copy_helper_block_
> // Metadata
>
> Modified: cfe/trunk/test/CodeGenObjC/ivar-base-as-invariant-load.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/ivar-base-as-invariant-load.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/ivar-base-as-invariant-load.m (original)
> +++ cfe/trunk/test/CodeGenObjC/ivar-base-as-invariant-load.m Tue Sep 8 03:05:57 2015
> @@ -23,7 +23,7 @@
>
> @end
>
> -// CHECK: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", !invariant.load ![[MD_NUM:[0-9]+]]
> -// CHECK: [[T2:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", !invariant.load ![[MD_NUM]]
> -// CHECK: [[T3:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", !invariant.load ![[MD_NUM]]
> +// CHECK: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM:[0-9]+]]
> +// CHECK: [[T2:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]]
> +// CHECK: [[T3:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]]
> //
>
> Modified: cfe/trunk/test/CodeGenObjC/ivar-invariant.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/ivar-invariant.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/ivar-invariant.m (original)
> +++ cfe/trunk/test/CodeGenObjC/ivar-invariant.m Tue Sep 8 03:05:57 2015
> @@ -29,7 +29,7 @@
> @end
>
> // CHECK: define internal i8* @"\01-[Derived init]"
> -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", !invariant.load
> +// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load
>
> void * variant_load_1(int i) {
> void *ptr;
> @@ -41,7 +41,7 @@ void * variant_load_1(int i) {
> }
>
> // CHECK-LABEL: define i8* @variant_load_1(i32 %i)
> -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member"{{$}}
> +// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8{{$}}
>
> @interface Container : Derived @end
> @implementation Container
> @@ -51,8 +51,8 @@ void * variant_load_1(int i) {
> }
> @end
>
> -// CHECK: define internal i8* @"\01-[Container invariant_load_1]"
> -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", !invariant.load
> +// CHECK-LABEL: define internal i8* @"\01-[Container invariant_load_1]"
> +// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load
>
> @interface ForBlock
> {
>
> Modified: cfe/trunk/test/CodeGenObjC/mrr-captured-block-var-inlined-layout.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/mrr-captured-block-var-inlined-layout.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/mrr-captured-block-var-inlined-layout.m (original)
> +++ cfe/trunk/test/CodeGenObjC/mrr-captured-block-var-inlined-layout.m Tue Sep 8 03:05:57 2015
> @@ -1,7 +1,7 @@
> // RUN: %clang_cc1 -fblocks -fobjc-runtime-has-weak -triple x86_64-apple-darwin -print-ivar-layout -emit-llvm -o /dev/null %s > %t-64.layout
> -// RUN: FileCheck --input-file=%t-64.layout %s
> +// RUN: FileCheck -check-prefix=CHECK -check-prefix=CHECK-64 --input-file=%t-64.layout %s
> // RUN: %clang_cc1 -fblocks -fobjc-runtime-has-weak -triple i386-apple-darwin -print-ivar-layout -emit-llvm -o /dev/null %s > %t-32.layout
> -// RUN: FileCheck -check-prefix=CHECK-i386 --input-file=%t-32.layout %s
> +// RUN: FileCheck -check-prefix=CHECK -check-prefix=CHECK-32 --input-file=%t-32.layout %s
> // rdar://12184410
> // rdar://12184410
>
> @@ -20,15 +20,13 @@ void f() {
> __block id bl_var1;
>
> // block variable layout: BL_STRONG:1, BL_OPERATOR:0
> -// CHECK: Inline instruction for block variable layout: 0x0100
> -// CHECK-i386: Inline instruction for block variable layout: 0x0100
> +// CHECK: Inline block variable layout: 0x0100, BL_STRONG:1, BL_OPERATOR:0
> void (^b)() = ^{
> x(bar);
> };
>
> // block variable layout: BL_STRONG:2, BL_BYREF:1, BL_OPERATOR:0
> -// CHECK: Inline instruction for block variable layout: 0x0210
> -// CHECK-i386: Inline instruction for block variable layout: 0x0210
> +// CHECK: Inline block variable layout: 0x0210, BL_STRONG:2, BL_BYREF:1, BL_OPERATOR:0
> void (^c)() = ^{
> x(bar);
> x(baz);
> @@ -36,8 +34,7 @@ void f() {
> };
>
> // block variable layout: BL_STRONG:2, BL_BYREF:3, BL_OPERATOR:0
> -// CHECK: Inline instruction for block variable layout: 0x0230
> -// CHECK-i386: Inline instruction for block variable layout: 0x0230
> +// CHECK: Inline block variable layout: 0x0230, BL_STRONG:2, BL_BYREF:3, BL_OPERATOR:0
> void (^d)() = ^{
> x(bar);
> x(baz);
> @@ -47,8 +44,7 @@ void f() {
> };
>
> // block variable layout: BL_STRONG:2, BL_BYREF:3, BL_OPERATOR:0
> -// CHECK: Inline instruction for block variable layout: 0x0230
> -// CHECK-i386: Inline instruction for block variable layout: 0x0230
> +// CHECK: Inline block variable layout: 0x0230, BL_STRONG:2, BL_BYREF:3, BL_OPERATOR:0
> id (^e)() = ^{
> x(bar);
> x(baz);
> @@ -58,8 +54,7 @@ void f() {
> return wid;
> };
>
> -// CHECK: Inline instruction for block variable layout: 0x020
> -// CHECK-i386: Inline instruction for block variable layout: 0x020
> +// CHECK: Inline block variable layout: 0x020, BL_BYREF:2, BL_OPERATOR:0
> void (^ii)() = ^{
> byref_int = 1;
> byref_bab = 0;
>
> Modified: cfe/trunk/test/CodeGenObjC/selector-ref-invariance.m
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/selector-ref-invariance.m?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjC/selector-ref-invariance.m (original)
> +++ cfe/trunk/test/CodeGenObjC/selector-ref-invariance.m Tue Sep 8 03:05:57 2015
> @@ -3,7 +3,7 @@
> // rdar://6027699
>
> void test(id x) {
> -// CHECK: load i8*, i8** @OBJC_SELECTOR_REFERENCES_, !invariant.load
> +// CHECK: load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load
> // CHECK: @objc_msgSend
> [x foo];
> }
>
> Modified: cfe/trunk/test/CodeGenObjCXX/arc-new-delete.mm
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjCXX/arc-new-delete.mm?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjCXX/arc-new-delete.mm (original)
> +++ cfe/trunk/test/CodeGenObjCXX/arc-new-delete.mm Tue Sep 8 03:05:57 2015
> @@ -1,4 +1,5 @@
> -// RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -fblocks -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s | FileCheck %s
> +// RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -fblocks -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=UNOPT
> +// RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -fblocks -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -O -disable-llvm-optzns | FileCheck %s -check-prefix=CHECK -check-prefix=OPT
>
> typedef __strong id strong_id;
> typedef __weak id weak_id;
> @@ -6,8 +7,10 @@ typedef __weak id weak_id;
> // CHECK-LABEL: define void @_Z8test_newP11objc_object
> void test_new(id invalue) {
> // CHECK: [[INVALUEADDR:%.*]] = alloca i8*
> - // CHECK-NEXT: store i8* null, i8** [[INVALUEADDR]]
> - // CHECK-NEXT: call void @objc_storeStrong(i8** [[INVALUEADDR]], i8* [[INVALUE:%.*]])
> + // UNOPT-NEXT: store i8* null, i8** [[INVALUEADDR]]
> + // UNOPT-NEXT: call void @objc_storeStrong(i8** [[INVALUEADDR]], i8* [[INVALUE:%.*]])
> + // OPT-NEXT: [[T0:%.*]] = call i8* @objc_retain(i8* [[INVALUE:%.*]])
> + // OPT-NEXT: store i8* [[T0]], i8** [[INVALUEADDR]]
>
> // CHECK: call noalias i8* @_Znwm
> // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}}
> @@ -15,7 +18,8 @@ void test_new(id invalue) {
> new strong_id;
> // CHECK: call noalias i8* @_Znwm
> // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}}
> - // CHECK-NEXT: store i8* null, i8**
> + // UNOPT-NEXT: store i8* null, i8**
> + // OPT-NEXT: call i8* @objc_initWeak(i8** {{.*}}, i8* null)
> new weak_id;
>
> // CHECK: call noalias i8* @_Znwm
> @@ -24,7 +28,8 @@ void test_new(id invalue) {
> new __strong id;
> // CHECK: call noalias i8* @_Znwm
> // CHECK-NEXT: {{bitcast i8\*.*to i8\*\*}}
> - // CHECK-NEXT: store i8* null, i8**
> + // UNOPT-NEXT: store i8* null, i8**
> + // OPT-NEXT: call i8* @objc_initWeak(i8** {{.*}}, i8* null)
> new __weak id;
>
> // CHECK: call noalias i8* @_Znwm
> @@ -36,7 +41,8 @@ void test_new(id invalue) {
> // CHECK: call i8* @objc_initWeak
> new __weak id(invalue);
>
> - // CHECK: call void @objc_storeStrong
> + // UNOPT: call void @objc_storeStrong
> + // OPT: call void @objc_release
> // CHECK: ret void
> }
>
> @@ -57,8 +63,9 @@ void test_array_new() {
> // CHECK-LABEL: define void @_Z11test_deletePU8__strongP11objc_objectPU6__weakS0_
> void test_delete(__strong id *sptr, __weak id *wptr) {
> // CHECK: br i1
> - // CHECK: load i8*, i8**
> - // CHECK-NEXT: call void @objc_release
> + // UNOPT: call void @objc_storeStrong(i8** {{.*}}, i8* null)
> + // OPT: load i8*, i8**
> + // OPT-NEXT: call void @objc_release
> // CHECK: call void @_ZdlPv
> delete sptr;
>
> @@ -77,7 +84,9 @@ void test_array_delete(__strong id *sptr
> // CHECK-NEXT: icmp eq i8** [[BEGIN]], [[END]]
> // CHECK: [[PAST:%.*]] = phi i8** [ [[END]], {{%.*}} ], [ [[CUR:%.*]],
> // CHECK-NEXT: [[CUR]] = getelementptr inbounds i8*, i8** [[PAST]], i64 -1
> - // CHECK-NEXT: call void @objc_storeStrong(i8** [[CUR]], i8* null)
> + // UNOPT-NEXT: call void @objc_storeStrong(i8** [[CUR]], i8* null)
> + // OPT-NEXT: [[T0:%.*]] = load i8*, i8** [[CUR]]
> + // OPT-NEXT: objc_release(i8* [[T0]])
> // CHECK-NEXT: icmp eq i8** [[CUR]], [[BEGIN]]
> // CHECK: call void @_ZdaPv
> delete [] sptr;
>
> Modified: cfe/trunk/test/CodeGenObjCXX/literals.mm
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjCXX/literals.mm?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjCXX/literals.mm (original)
> +++ cfe/trunk/test/CodeGenObjCXX/literals.mm Tue Sep 8 03:05:57 2015
> @@ -22,14 +22,14 @@ void test_array() {
> // Initializing first element
> // CHECK: [[PTR1:%.*]] = bitcast i8** [[ARR]] to i8*
> // CHECK-NEXT: call void @llvm.lifetime.start(i64 8, i8* [[PTR1]])
> - // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 0
> + // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 0
> // CHECK-NEXT: call void @_ZN1XC1Ev
> // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv
> // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT0]])
> // CHECK: store i8* [[RET0]], i8** [[ELEMENT0]]
>
> // Initializing the second element
> - // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 1
> + // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 1
> // CHECK-NEXT: invoke void @_ZN1YC1Ev
> // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectEv
> // CHECK: [[RET1:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT1]])
> @@ -74,14 +74,14 @@ void test_array_instantiation() {
> // Initializing first element
> // CHECK: [[PTR1:%.*]] = bitcast i8** [[ARR]] to i8*
> // CHECK-NEXT: call void @llvm.lifetime.start(i64 8, i8* [[PTR1]])
> - // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 0
> + // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 0
> // CHECK-NEXT: call void @_ZN1XC1Ev
> // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv
> // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT0]])
> // CHECK: store i8* [[RET0]], i8** [[ELEMENT0]]
>
> // Initializing the second element
> - // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i32 0, i32 1
> + // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[OBJECTS]], i64 0, i64 1
> // CHECK-NEXT: invoke void @_ZN1YC1Ev
> // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectEv
> // CHECK: [[RET1:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT1]])
>
> Modified: cfe/trunk/test/CodeGenObjCXX/property-lvalue-capture.mm
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjCXX/property-lvalue-capture.mm?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjCXX/property-lvalue-capture.mm (original)
> +++ cfe/trunk/test/CodeGenObjCXX/property-lvalue-capture.mm Tue Sep 8 03:05:57 2015
> @@ -24,10 +24,10 @@ typedef Quad2<double> Quad2d;
> }
> @end
>
> -// CHECK: [[TWO:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, !invariant.load ![[MD_NUM:[0-9]+]]
> +// CHECK: [[TWO:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load ![[MD_NUM:[0-9]+]]
> // CHECK: [[THREE:%.*]] = bitcast [[ONET:%.*]]* [[ONE:%.*]] to i8*
> // CHECK: [[CALL:%.*]] = call nonnull %struct.Quad2* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %struct.Quad2* (i8*, i8*)*)(i8* [[THREE]], i8* [[TWO]])
> -// CHECK: [[FOUR:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2, !invariant.load ![[MD_NUM]]
> +// CHECK: [[FOUR:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2, align 8, !invariant.load ![[MD_NUM]]
> // CHECK: [[FIVE:%.*]] = bitcast [[ONET]]* [[ZERO:%.*]] to i8*
> // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.Quad2*)*)(i8* [[FIVE]], i8* [[FOUR]], %struct.Quad2* nonnull [[CALL]])
>
> @@ -47,7 +47,7 @@ void test(C *c, const A &a) {
> }
>
> // CHECK: [[ONE1:%.*]] = load %struct.A*, %struct.A** [[AADDR:%.*]], align 8
> -// CHECK: [[TWO1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.5, !invariant.load ![[MD_NUM]]
> +// CHECK: [[TWO1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.5, align 8, !invariant.load ![[MD_NUM]]
> // CHECK: [[THREE1:%.*]] = bitcast [[TWOT:%.*]]* [[ZERO1:%.*]] to i8*
> // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.A*)*)(i8* [[THREE1]], i8* [[TWO1]], %struct.A* dereferenceable({{[0-9]+}}) [[ONE1]])
> // CHECK: store %struct.A* [[ONE1]], %struct.A** [[RESULT:%.*]], align 8
>
> Modified: cfe/trunk/test/CodeGenObjCXX/property-object-conditional-exp.mm
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjCXX/property-object-conditional-exp.mm?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGenObjCXX/property-object-conditional-exp.mm (original)
> +++ cfe/trunk/test/CodeGenObjCXX/property-object-conditional-exp.mm Tue Sep 8 03:05:57 2015
> @@ -24,10 +24,10 @@ extern "C" bool CGRectIsEmpty(CGRect);
>
> // CHECK: [[SRC:%.*]] = call { i8*, i32 } bitcast (i8* (i8*, i8*, ...)* @objc_msgSend
> // CHECK-NEXT: bitcast
> -// CHECK-NEXT:getelementptr { i8*, i32 }, { i8*, i32 }* [[SRC:%.*]]
> +// CHECK-NEXT:getelementptr inbounds { i8*, i32 }, { i8*, i32 }* [[SRC:%.*]]
> // CHECK-NEXT:extractvalue
> // CHECK-NEXT:store
> -// CHECK-NEXT:getelementptr { i8*, i32 }, { i8*, i32 }* [[SRC:%.*]]
> +// CHECK-NEXT:getelementptr inbounds { i8*, i32 }, { i8*, i32 }* [[SRC:%.*]]
> // CHECK-NEXT:extractvalue
> // CHECK-NEXT:store
> dataRect = CGRectIsEmpty(virtualBounds) ? self.bounds : virtualBounds;
>
> Modified: cfe/trunk/test/OpenMP/for_reduction_codegen.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/for_reduction_codegen.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/OpenMP/for_reduction_codegen.cpp (original)
> +++ cfe/trunk/test/OpenMP/for_reduction_codegen.cpp Tue Sep 8 03:05:57 2015
> @@ -81,7 +81,7 @@ int main() {
> // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]])
> // LAMBDA: call void @__kmpc_for_static_fini(
>
> - // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST]], i64 0, i64 0
> // LAMBDA: [[BITCAST:%.+]] = bitcast double* [[G_PRIVATE_ADDR]] to i8*
> // LAMBDA: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // LAMBDA: call i32 @__kmpc_reduce(
> @@ -143,7 +143,7 @@ int main() {
> // BLOCKS: call void {{%.+}}(i8
> // BLOCKS: call void @__kmpc_for_static_fini(
>
> - // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[RED_LIST]], i64 0, i64 0
> // BLOCKS: [[BITCAST:%.+]] = bitcast double* [[G_PRIVATE_ADDR]] to i8*
> // BLOCKS: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // BLOCKS: call i32 @__kmpc_reduce(
> @@ -243,16 +243,16 @@ int main() {
>
> // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
>
> -// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 0
> +// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 0
> // CHECK: [[BITCAST:%.+]] = bitcast float* [[T_VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR_PRIV_REF]],
> -// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 1
> +// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 1
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR_PRIV_REF]],
> -// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 2
> +// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 2
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR1_PRIV_REF]],
> -// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 3
> +// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 3
> // CHECK: [[BITCAST:%.+]] = bitcast float* [[T_VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR1_PRIV_REF]],
>
> @@ -392,38 +392,38 @@ int main() {
> // }
> // CHECK: define internal void [[REDUCTION_FUNC]](i8*, i8*)
> // t_var_lhs = (float*)lhs[0];
> -// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]],
> // CHECK: [[T_VAR_RHS:%.+]] = bitcast i8* [[T_VAR_RHS_VOID]] to float*
> // t_var_rhs = (float*)rhs[0];
> -// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR_LHS_REF]],
> // CHECK: [[T_VAR_LHS:%.+]] = bitcast i8* [[T_VAR_LHS_VOID]] to float*
>
> // var_lhs = (S<float>*)lhs[1];
> -// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 1
> +// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 1
> // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]],
> // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to [[S_FLOAT_TY]]*
> // var_rhs = (S<float>*)rhs[1];
> -// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 1
> +// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 1
> // CHECK: [[VAR_LHS_VOID:%.+]] = load i8*, i8** [[VAR_LHS_REF]],
> // CHECK: [[VAR_LHS:%.+]] = bitcast i8* [[VAR_LHS_VOID]] to [[S_FLOAT_TY]]*
>
> // var1_lhs = (S<float>*)lhs[2];
> -// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 2
> +// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 2
> // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]],
> // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to [[S_FLOAT_TY]]*
> // var1_rhs = (S<float>*)rhs[2];
> -// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 2
> +// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 2
> // CHECK: [[VAR1_LHS_VOID:%.+]] = load i8*, i8** [[VAR1_LHS_REF]],
> // CHECK: [[VAR1_LHS:%.+]] = bitcast i8* [[VAR1_LHS_VOID]] to [[S_FLOAT_TY]]*
>
> // t_var1_lhs = (float*)lhs[3];
> -// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_RHS_REF]],
> // CHECK: [[T_VAR1_RHS:%.+]] = bitcast i8* [[T_VAR1_RHS_VOID]] to float*
> // t_var1_rhs = (float*)rhs[3];
> -// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_LHS_REF]],
> // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to float*
>
> @@ -516,16 +516,16 @@ int main() {
>
> // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
>
> -// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 0
> +// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 0
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR_PRIV_REF]],
> -// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 1
> +// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 1
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR_PRIV_REF]],
> -// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 2
> +// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 2
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR1_PRIV_REF]],
> -// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 3
> +// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 3
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR1_PRIV_REF]],
>
> @@ -634,38 +634,38 @@ int main() {
> // }
> // CHECK: define internal void [[REDUCTION_FUNC]](i8*, i8*)
> // t_var_lhs = (i{{[0-9]+}}*)lhs[0];
> -// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]],
> // CHECK: [[T_VAR_RHS:%.+]] = bitcast i8* [[T_VAR_RHS_VOID]] to i{{[0-9]+}}*
> // t_var_rhs = (i{{[0-9]+}}*)rhs[0];
> -// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR_LHS_REF]],
> // CHECK: [[T_VAR_LHS:%.+]] = bitcast i8* [[T_VAR_LHS_VOID]] to i{{[0-9]+}}*
>
> // var_lhs = (S<i{{[0-9]+}}>*)lhs[1];
> -// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 1
> +// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 1
> // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]],
> // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to [[S_INT_TY]]*
> // var_rhs = (S<i{{[0-9]+}}>*)rhs[1];
> -// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 1
> +// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 1
> // CHECK: [[VAR_LHS_VOID:%.+]] = load i8*, i8** [[VAR_LHS_REF]],
> // CHECK: [[VAR_LHS:%.+]] = bitcast i8* [[VAR_LHS_VOID]] to [[S_INT_TY]]*
>
> // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2];
> -// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 2
> +// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 2
> // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]],
> // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to [[S_INT_TY]]*
> // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2];
> -// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 2
> +// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 2
> // CHECK: [[VAR1_LHS_VOID:%.+]] = load i8*, i8** [[VAR1_LHS_REF]],
> // CHECK: [[VAR1_LHS:%.+]] = bitcast i8* [[VAR1_LHS_VOID]] to [[S_INT_TY]]*
>
> // t_var1_lhs = (i{{[0-9]+}}*)lhs[3];
> -// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_RHS_REF]],
> // CHECK: [[T_VAR1_RHS:%.+]] = bitcast i8* [[T_VAR1_RHS_VOID]] to i{{[0-9]+}}*
> // t_var1_rhs = (i{{[0-9]+}}*)rhs[3];
> -// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_LHS_REF]],
> // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to i{{[0-9]+}}*
>
>
> Modified: cfe/trunk/test/OpenMP/parallel_codegen.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/parallel_codegen.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/OpenMP/parallel_codegen.cpp (original)
> +++ cfe/trunk/test/OpenMP/parallel_codegen.cpp Tue Sep 8 03:05:57 2015
> @@ -49,7 +49,7 @@ int main (int argc, char **argv) {
> // CHECK-DEBUG-DAG: [[LOC_2_ADDR:%.+]] = alloca %ident_t
> // CHECK-DEBUG: [[KMPC_LOC_VOIDPTR:%.+]] = bitcast %ident_t* [[LOC_2_ADDR]] to i8*
> // CHECK-DEBUG-NEXT: [[KMPC_DEFAULT_LOC_VOIDPTR:%.+]] = bitcast %ident_t* [[DEF_LOC_2]] to i8*
> -// CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[KMPC_LOC_VOIDPTR]], i8* [[KMPC_DEFAULT_LOC_VOIDPTR]], i64 ptrtoint (%ident_t* getelementptr (%ident_t, %ident_t* null, i32 1) to i64), i32 8, i1 false)
> +// CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[KMPC_LOC_VOIDPTR]], i8* [[KMPC_DEFAULT_LOC_VOIDPTR]], i64 24, i32 8, i1 false)
> // CHECK-DEBUG: [[ARGC_REF:%.+]] = getelementptr inbounds %struct.anon, %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
> // CHECK-DEBUG-NEXT: store i32* {{%[a-z0-9.]+}}, i32** [[ARGC_REF]]
> // CHECK-DEBUG-NEXT: [[KMPC_LOC_PSOURCE_REF:%.+]] = getelementptr inbounds %ident_t, %ident_t* [[LOC_2_ADDR]], i32 0, i32 4
> @@ -108,7 +108,7 @@ int main (int argc, char **argv) {
> // CHECK-DEBUG-DAG: [[LOC_2_ADDR:%.+]] = alloca %ident_t
> // CHECK-DEBUG: [[KMPC_LOC_VOIDPTR:%.+]] = bitcast %ident_t* [[LOC_2_ADDR]] to i8*
> // CHECK-DEBUG-NEXT: [[KMPC_DEFAULT_LOC_VOIDPTR:%.+]] = bitcast %ident_t* [[DEF_LOC_2]] to i8*
> -// CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[KMPC_LOC_VOIDPTR]], i8* [[KMPC_DEFAULT_LOC_VOIDPTR]], i64 ptrtoint (%ident_t* getelementptr (%ident_t, %ident_t* null, i32 1) to i64), i32 8, i1 false)
> +// CHECK-DEBUG-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[KMPC_LOC_VOIDPTR]], i8* [[KMPC_DEFAULT_LOC_VOIDPTR]], i64 24, i32 8, i1 false)
> // CHECK-DEBUG: [[ARGC_REF:%.+]] = getelementptr inbounds %struct.anon.0, %struct.anon.0* [[AGG_CAPTURED]], i32 0, i32 0
> // CHECK-DEBUG-NEXT: store i8*** {{%[a-z0-9.]+}}, i8**** [[ARGC_REF]]
> // CHECK-DEBUG-NEXT: [[KMPC_LOC_PSOURCE_REF:%.+]] = getelementptr inbounds %ident_t, %ident_t* [[LOC_2_ADDR]], i32 0, i32 4
>
> Modified: cfe/trunk/test/OpenMP/parallel_reduction_codegen.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/parallel_reduction_codegen.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/OpenMP/parallel_reduction_codegen.cpp (original)
> +++ cfe/trunk/test/OpenMP/parallel_reduction_codegen.cpp Tue Sep 8 03:05:57 2015
> @@ -74,7 +74,7 @@ int main() {
> // LAMBDA: store i{{[0-9]+}}* [[G_PRIVATE_ADDR]], i{{[0-9]+}}** [[G_PRIVATE_ADDR_REF]]
> // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]])
>
> - // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0
> // LAMBDA: [[BITCAST:%.+]] = bitcast i32* [[G_PRIVATE_ADDR]] to i8*
> // LAMBDA: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // LAMBDA: call i32 @__kmpc_reduce_nowait(
> @@ -136,7 +136,7 @@ int main() {
> // BLOCKS-NOT: [[G]]{{[[^:word:]]}}
> // BLOCKS: call void {{%.+}}(i8
>
> - // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0
> // BLOCKS: [[BITCAST:%.+]] = bitcast i32* [[G_PRIVATE_ADDR]] to i8*
> // BLOCKS: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // BLOCKS: call i32 @__kmpc_reduce_nowait(
> @@ -226,16 +226,16 @@ int main() {
>
> // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
>
> -// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 0
> +// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 0
> // CHECK: [[BITCAST:%.+]] = bitcast float* [[T_VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR_PRIV_REF]],
> -// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 1
> +// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 1
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR_PRIV_REF]],
> -// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 2
> +// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 2
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_FLOAT_TY]]* [[VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR1_PRIV_REF]],
> -// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 3
> +// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 3
> // CHECK: [[BITCAST:%.+]] = bitcast float* [[T_VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR1_PRIV_REF]],
>
> @@ -373,38 +373,38 @@ int main() {
> // }
> // CHECK: define internal void [[REDUCTION_FUNC]](i8*, i8*)
> // t_var_lhs = (float*)lhs[0];
> -// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]],
> // CHECK: [[T_VAR_RHS:%.+]] = bitcast i8* [[T_VAR_RHS_VOID]] to float*
> // t_var_rhs = (float*)rhs[0];
> -// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR_LHS_REF]],
> // CHECK: [[T_VAR_LHS:%.+]] = bitcast i8* [[T_VAR_LHS_VOID]] to float*
>
> // var_lhs = (S<float>*)lhs[1];
> -// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 1
> +// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 1
> // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]],
> // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to [[S_FLOAT_TY]]*
> // var_rhs = (S<float>*)rhs[1];
> -// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 1
> +// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 1
> // CHECK: [[VAR_LHS_VOID:%.+]] = load i8*, i8** [[VAR_LHS_REF]],
> // CHECK: [[VAR_LHS:%.+]] = bitcast i8* [[VAR_LHS_VOID]] to [[S_FLOAT_TY]]*
>
> // var1_lhs = (S<float>*)lhs[2];
> -// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 2
> +// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 2
> // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]],
> // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to [[S_FLOAT_TY]]*
> // var1_rhs = (S<float>*)rhs[2];
> -// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 2
> +// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 2
> // CHECK: [[VAR1_LHS_VOID:%.+]] = load i8*, i8** [[VAR1_LHS_REF]],
> // CHECK: [[VAR1_LHS:%.+]] = bitcast i8* [[VAR1_LHS_VOID]] to [[S_FLOAT_TY]]*
>
> // t_var1_lhs = (float*)lhs[3];
> -// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_RHS_REF]],
> // CHECK: [[T_VAR1_RHS:%.+]] = bitcast i8* [[T_VAR1_RHS_VOID]] to float*
> // t_var1_rhs = (float*)rhs[3];
> -// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_LHS_REF]],
> // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to float*
>
> @@ -488,16 +488,16 @@ int main() {
>
> // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
>
> -// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 0
> +// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 0
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR_PRIV_REF]],
> -// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 1
> +// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 1
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR_PRIV_REF]],
> -// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 2
> +// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 2
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR1_PRIV_REF]],
> -// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 3
> +// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 3
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR1_PRIV_REF]],
>
> @@ -608,38 +608,38 @@ int main() {
> // }
> // CHECK: define internal void [[REDUCTION_FUNC]](i8*, i8*)
> // t_var_lhs = (i{{[0-9]+}}*)lhs[0];
> -// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]],
> // CHECK: [[T_VAR_RHS:%.+]] = bitcast i8* [[T_VAR_RHS_VOID]] to i{{[0-9]+}}*
> // t_var_rhs = (i{{[0-9]+}}*)rhs[0];
> -// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR_LHS_REF]],
> // CHECK: [[T_VAR_LHS:%.+]] = bitcast i8* [[T_VAR_LHS_VOID]] to i{{[0-9]+}}*
>
> // var_lhs = (S<i{{[0-9]+}}>*)lhs[1];
> -// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 1
> +// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 1
> // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]],
> // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to [[S_INT_TY]]*
> // var_rhs = (S<i{{[0-9]+}}>*)rhs[1];
> -// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 1
> +// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 1
> // CHECK: [[VAR_LHS_VOID:%.+]] = load i8*, i8** [[VAR_LHS_REF]],
> // CHECK: [[VAR_LHS:%.+]] = bitcast i8* [[VAR_LHS_VOID]] to [[S_INT_TY]]*
>
> // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2];
> -// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 2
> +// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 2
> // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]],
> // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to [[S_INT_TY]]*
> // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2];
> -// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 2
> +// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 2
> // CHECK: [[VAR1_LHS_VOID:%.+]] = load i8*, i8** [[VAR1_LHS_REF]],
> // CHECK: [[VAR1_LHS:%.+]] = bitcast i8* [[VAR1_LHS_VOID]] to [[S_INT_TY]]*
>
> // t_var1_lhs = (i{{[0-9]+}}*)lhs[3];
> -// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_RHS_REF]],
> // CHECK: [[T_VAR1_RHS:%.+]] = bitcast i8* [[T_VAR1_RHS_VOID]] to i{{[0-9]+}}*
> // t_var1_rhs = (i{{[0-9]+}}*)rhs[3];
> -// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_LHS_REF]],
> // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to i{{[0-9]+}}*
>
>
> Modified: cfe/trunk/test/OpenMP/sections_reduction_codegen.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/sections_reduction_codegen.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/OpenMP/sections_reduction_codegen.cpp (original)
> +++ cfe/trunk/test/OpenMP/sections_reduction_codegen.cpp Tue Sep 8 03:05:57 2015
> @@ -74,7 +74,7 @@ int main() {
> // LAMBDA: call void [[INNER_LAMBDA:@.+]](%{{.+}}* [[ARG]])
> // LAMBDA: call void @__kmpc_for_static_fini(
>
> - // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // LAMBDA: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0
> // LAMBDA: [[BITCAST:%.+]] = bitcast double* [[G_PRIVATE_ADDR]] to i8*
> // LAMBDA: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // LAMBDA: call i32 @__kmpc_reduce(
> @@ -135,7 +135,7 @@ int main() {
> // BLOCKS: call void {{%.+}}(i8
> // BLOCKS: call void @__kmpc_for_static_fini(
>
> - // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i32 0, i32 0
> + // BLOCKS: [[G_PRIV_REF:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[RED_LIST]], i64 0, i64 0
> // BLOCKS: [[BITCAST:%.+]] = bitcast double* [[G_PRIVATE_ADDR]] to i8*
> // BLOCKS: store i8* [[BITCAST]], i8** [[G_PRIV_REF]],
> // BLOCKS: call i32 @__kmpc_reduce(
> @@ -277,16 +277,16 @@ int main() {
>
> // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
>
> -// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 0
> +// CHECK: [[T_VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 0
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR_PRIV_REF]],
> -// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 1
> +// CHECK: [[VAR_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 1
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR_PRIV_REF]],
> -// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 2
> +// CHECK: [[VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 2
> // CHECK: [[BITCAST:%.+]] = bitcast [[S_INT_TY]]* [[VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[VAR1_PRIV_REF]],
> -// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i32 0, i32 3
> +// CHECK: [[T_VAR1_PRIV_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST]], i64 0, i64 3
> // CHECK: [[BITCAST:%.+]] = bitcast i{{[0-9]+}}* [[T_VAR1_PRIV]] to i8*
> // CHECK: store i8* [[BITCAST]], i8** [[T_VAR1_PRIV_REF]],
>
> @@ -395,38 +395,38 @@ int main() {
> // }
> // CHECK: define internal void [[REDUCTION_FUNC]](i8*, i8*)
> // t_var_lhs = (i{{[0-9]+}}*)lhs[0];
> -// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR_RHS_REF]],
> // CHECK: [[T_VAR_RHS:%.+]] = bitcast i8* [[T_VAR_RHS_VOID]] to i{{[0-9]+}}*
> // t_var_rhs = (i{{[0-9]+}}*)rhs[0];
> -// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i32 0, i32 0
> +// CHECK: [[T_VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS:%.+]], i64 0, i64 0
> // CHECK: [[T_VAR_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR_LHS_REF]],
> // CHECK: [[T_VAR_LHS:%.+]] = bitcast i8* [[T_VAR_LHS_VOID]] to i{{[0-9]+}}*
>
> // var_lhs = (S<i{{[0-9]+}}>*)lhs[1];
> -// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 1
> +// CHECK: [[VAR_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 1
> // CHECK: [[VAR_RHS_VOID:%.+]] = load i8*, i8** [[VAR_RHS_REF]],
> // CHECK: [[VAR_RHS:%.+]] = bitcast i8* [[VAR_RHS_VOID]] to [[S_INT_TY]]*
> // var_rhs = (S<i{{[0-9]+}}>*)rhs[1];
> -// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 1
> +// CHECK: [[VAR_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 1
> // CHECK: [[VAR_LHS_VOID:%.+]] = load i8*, i8** [[VAR_LHS_REF]],
> // CHECK: [[VAR_LHS:%.+]] = bitcast i8* [[VAR_LHS_VOID]] to [[S_INT_TY]]*
>
> // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2];
> -// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 2
> +// CHECK: [[VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 2
> // CHECK: [[VAR1_RHS_VOID:%.+]] = load i8*, i8** [[VAR1_RHS_REF]],
> // CHECK: [[VAR1_RHS:%.+]] = bitcast i8* [[VAR1_RHS_VOID]] to [[S_INT_TY]]*
> // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2];
> -// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 2
> +// CHECK: [[VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 2
> // CHECK: [[VAR1_LHS_VOID:%.+]] = load i8*, i8** [[VAR1_LHS_REF]],
> // CHECK: [[VAR1_LHS:%.+]] = bitcast i8* [[VAR1_LHS_VOID]] to [[S_INT_TY]]*
>
> // t_var1_lhs = (i{{[0-9]+}}*)lhs[3];
> -// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_RHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_RHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_RHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_RHS_REF]],
> // CHECK: [[T_VAR1_RHS:%.+]] = bitcast i8* [[T_VAR1_RHS_VOID]] to i{{[0-9]+}}*
> // t_var1_rhs = (i{{[0-9]+}}*)rhs[3];
> -// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i32 0, i32 3
> +// CHECK: [[T_VAR1_LHS_REF:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[RED_LIST_LHS]], i64 0, i64 3
> // CHECK: [[T_VAR1_LHS_VOID:%.+]] = load i8*, i8** [[T_VAR1_LHS_REF]],
> // CHECK: [[T_VAR1_LHS:%.+]] = bitcast i8* [[T_VAR1_LHS_VOID]] to i{{[0-9]+}}*
>
>
> Modified: cfe/trunk/test/OpenMP/task_codegen.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/task_codegen.cpp?rev=246985&r1=246984&r2=246985&view=diff
> ==============================================================================
> --- cfe/trunk/test/OpenMP/task_codegen.cpp (original)
> +++ cfe/trunk/test/OpenMP/task_codegen.cpp Tue Sep 8 03:05:57 2015
> @@ -53,29 +53,29 @@ int main() {
> // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[SHAREDS_REF]], i8* [[BITCAST]], i64 8, i32 8, i1 false)
> // CHECK: [[DESTRUCTORS_REF_PTR:%.+]] = getelementptr inbounds [[KMP_TASK_T]], [[KMP_TASK_T]]* [[TASK_PTR]], i32 0, i32 3
> // CHECK: store i32 (i32, i8*)* null, i32 (i32, i8*)** [[DESTRUCTORS_REF_PTR]]
> -// CHECK: getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 0
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> -// CHECK: store i64 ptrtoint (i32* @{{.+}} to i64), i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> -// CHECK: store i64 4, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> -// CHECK: store i8 1, i8*
> -// CHECK: getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 1
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> +// CHECK: [[DEP:%.*]] = getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* [[DEPENDENCIES:%.*]], i64 0, i64 0
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 0
> +// CHECK: store i64 ptrtoint (i32* @{{.+}} to i64), i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 1
> +// CHECK: store i64 4, i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 2
> +// CHECK: store i8 1, i8* [[T0]]
> +// CHECK: [[DEP:%.*]] = getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* [[DEPENDENCIES]], i64 0, i64 1
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 0
> // CHECK: ptrtoint i8* [[B]] to i64
> -// CHECK: store i64 %{{[^,]+}}, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> -// CHECK: store i64 1, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> -// CHECK: store i8 1, i8*
> -// CHECK: getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 2
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> +// CHECK: store i64 %{{[^,]+}}, i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 1
> +// CHECK: store i64 1, i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 2
> +// CHECK: store i8 1, i8* [[T0]]
> +// CHECK: [[DEP:%.*]] = getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* [[DEPENDENCIES]], i64 0, i64 2
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 0
> // CHECK: ptrtoint [2 x [[STRUCT_S]]]* [[S]] to i64
> -// CHECK: store i64 %{{[^,]+}}, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> -// CHECK: store i64 8, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> -// CHECK: store i8 1, i8*
> +// CHECK: store i64 %{{[^,]+}}, i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 1
> +// CHECK: store i64 8, i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 2
> +// CHECK: store i8 1, i8* [[T0]]
> // CHECK: [[IDX1:%.+]] = mul nsw i64 0, [[A_VAL:%.+]]
> // CHECK: [[START:%.+]] = getelementptr inbounds i32, i32* %{{.+}}, i64 [[IDX1]]
> // CHECK: [[IDX1:%.+]] = mul nsw i64 9, [[A_VAL]]
> @@ -84,16 +84,16 @@ int main() {
> // CHECK: [[START_INT:%.+]] = ptrtoint i32* [[START]] to i64
> // CHECK: [[END_INT:%.+]] = ptrtoint i32* [[END1]] to i64
> // CHECK: [[SIZEOF:%.+]] = sub nuw i64 [[END_INT]], [[START_INT]]
> -// CHECK: getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 3
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> -// CHECK: ptrtoint i32* [[START]] to i64
> -// CHECK: store i64 %{{[^,]+}}, i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> -// CHECK: store i64 [[SIZEOF]], i64*
> -// CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> -// CHECK: store i8 1, i8*
> -// CHECK: getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 0
> -// CHECK: bitcast [[KMP_DEPEND_INFO]]* %{{.+}} to i8*
> +// CHECK: [[DEP:%.*]] = getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 3
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* [[DEP]], i32 0, i32 0
> +// CHECK: [[T1:%.*]] = ptrtoint i32* [[START]] to i64
> +// CHECK: store i64 [[T1]], i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> +// CHECK: store i64 [[SIZEOF]], i64* [[T0]]
> +// CHECK: [[T0:%.*]] = getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> +// CHECK: store i8 1, i8* [[T0]]
> +// CHECK: [[DEPS:%.*]] = getelementptr inbounds [4 x [[KMP_DEPEND_INFO]]], [4 x [[KMP_DEPEND_INFO]]]* [[DEPENDENCIES]], i32 0, i32 0
> +// CHECK: bitcast [[KMP_DEPEND_INFO]]* [[DEPS]] to i8*
> // CHECK: call i32 @__kmpc_omp_task_with_deps([[IDENT_T]]* @{{.+}}, i32 [[GTID]], i8* [[ORIG_TASK_PTR]], i32 4, i8* %{{[^,]+}}, i32 0, i8* null)
> #pragma omp task shared(a, s) depend(in : a, b, s, arr[:])
> {
> @@ -111,8 +111,8 @@ int main() {
> // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc([[IDENT_T]]* @{{.+}}, i32 [[GTID]], i32 0, i64 32, i64 1,
> // CHECK: [[DESTRUCTORS_REF_PTR:%.+]] = getelementptr inbounds [[KMP_TASK_T]]{{.*}}* {{%.+}}, i32 0, i32 3
> // CHECK: store i32 (i32, i8*)* null, i32 (i32, i8*)** [[DESTRUCTORS_REF_PTR]]
> -// CHECK: getelementptr inbounds [2 x [[STRUCT_S]]], [2 x [[STRUCT_S]]]* [[S]], i32 0, i64 0
> -// CHECK: getelementptr inbounds [2 x [[KMP_DEPEND_INFO]]], [2 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 0
> +// CHECK: getelementptr inbounds [2 x [[STRUCT_S]]], [2 x [[STRUCT_S]]]* [[S]], i64 0, i64 0
> +// CHECK: getelementptr inbounds [2 x [[KMP_DEPEND_INFO]]], [2 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 0
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> // CHECK: ptrtoint [[STRUCT_S]]* %{{.+}} to i64
> // CHECK: store i64 %{{[^,]+}}, i64*
> @@ -134,7 +134,7 @@ int main() {
> // CHECK: [[START_INT:%.+]] = ptrtoint i32* [[START1]] to i64
> // CHECK: [[END_INT:%.+]] = ptrtoint i32* [[END2]] to i64
> // CHECK: [[SIZEOF:%.+]] = sub nuw i64 [[END_INT]], [[START_INT]]
> -// CHECK: getelementptr inbounds [2 x [[KMP_DEPEND_INFO]]], [2 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 1
> +// CHECK: getelementptr inbounds [2 x [[KMP_DEPEND_INFO]]], [2 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 1
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> // CHECK: ptrtoint i32* [[START1]] to i64
> // CHECK: store i64 %{{[^,]+}}, i64*
> @@ -152,15 +152,15 @@ int main() {
> // CHECK: [[ORIG_TASK_PTR:%.+]] = call i8* @__kmpc_omp_task_alloc([[IDENT_T]]* @{{.+}}, i32 [[GTID]], i32 3, i64 32, i64 1,
> // CHECK: [[DESTRUCTORS_REF_PTR:%.+]] = getelementptr inbounds [[KMP_TASK_T]]{{.*}}* {{%.+}}, i32 0, i32 3
> // CHECK: store i32 (i32, i8*)* null, i32 (i32, i8*)** [[DESTRUCTORS_REF_PTR]]
> -// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 0
> +// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 0
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> // CHECK: store i64 ptrtoint (i32* @{{.+}} to i64), i64*
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 1
> // CHECK: store i64 4, i64*
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 2
> // CHECK: store i8 3, i8*
> -// CHECK: getelementptr inbounds [2 x [[STRUCT_S]]], [2 x [[STRUCT_S]]]* [[S]], i32 0, i64 1
> -// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 1
> +// CHECK: getelementptr inbounds [2 x [[STRUCT_S]]], [2 x [[STRUCT_S]]]* [[S]], i64 0, i64 1
> +// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 1
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> // CHECK: ptrtoint [[STRUCT_S]]* %{{.+}} to i64
> // CHECK: store i64 %{{[^,]+}}, i64*
> @@ -184,7 +184,7 @@ int main() {
> // CHECK: [[START_INT:%.+]] = ptrtoint i32* [[START1]] to i64
> // CHECK: [[END_INT:%.+]] = ptrtoint i32* [[END2]] to i64
> // CHECK: [[SIZEOF:%.+]] = sub nuw i64 [[END_INT]], [[START_INT]]
> -// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i32 0, i32 2
> +// CHECK: getelementptr inbounds [3 x [[KMP_DEPEND_INFO]]], [3 x [[KMP_DEPEND_INFO]]]* %{{[^,]+}}, i64 0, i64 2
> // CHECK: getelementptr inbounds [[KMP_DEPEND_INFO]], [[KMP_DEPEND_INFO]]* %{{[^,]+}}, i32 0, i32 0
> // CHECK: ptrtoint i32* [[START1]] to i64
> // CHECK: store i64 %{{[^,]+}}, i64*
>
>
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