[PATCH] D12785: Document __builtin_nontemporal_load and __builtin_nontemporal_store.

Richard Smith via cfe-commits cfe-commits at lists.llvm.org
Thu Sep 10 17:10:59 PDT 2015


rsmith added inline comments.

================
Comment at: docs/LanguageExtensions.rst:1802-1807
@@ +1801,8 @@
+
+For example, on AArch64 in the following code::
+
+  LDR X1, [X2]
+  LDNP X3, X4, [X1]
+
+the ``LDNP`` might be executed before the ``LDR``. In this case the load would
+be performed from a wrong address (see 6.3.8 in `Programmer's Guide for ARMv8-A
----------------
This seems to make the feature essentially useless, since you cannot guarantee that the address register is set up sufficiently far before the non-temporal load. Should the compiler not be required to insert the necessary barrier itself in this case?


http://reviews.llvm.org/D12785





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