r246974 - [X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
Simon Pilgrim via cfe-commits
cfe-commits at lists.llvm.org
Mon Sep 7 13:10:12 PDT 2015
Author: rksimon
Date: Mon Sep 7 15:10:11 2015
New Revision: 246974
URL: http://llvm.org/viewvc/llvm-project?rev=246974&view=rev
Log:
[X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
Modified:
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified: cfe/trunk/test/CodeGen/sse4a-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse4a-builtins.c?rev=246974&r1=246973&r2=246974&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/sse4a-builtins.c (original)
+++ cfe/trunk/test/CodeGen/sse4a-builtins.c Mon Sep 7 15:10:11 2015
@@ -1,39 +1,50 @@
-// RUN: %clang_cc1 -ffreestanding -triple i386-apple-darwin9 -target-cpu pentium4 -target-feature +sse4a -g -emit-llvm %s -o - | FileCheck %s
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 %s -O0 -triple=x86_64-apple-darwin -target-feature +sse4a -emit-llvm -o - -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -O0 -triple=x86_64-apple-darwin -target-feature +sse4a -S -o - -Werror | FileCheck %s --check-prefix=CHECK-ASM
-#include <ammintrin.h>
+// Don't include mm_malloc.h, it's system specific.
+#define __MM_MALLOC_H
+
+#include <x86intrin.h>
__m128i test_extracti_si64(__m128i x) {
+ // CHECK-LABEL: test_extracti_si64
+ // CHECK: call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %{{[^,]+}}, i8 3, i8 2)
+ // CHECK-ASM: extrq $2, $3, %xmm{{.*}}
return _mm_extracti_si64(x, 3, 2);
-// CHECK: @test_extracti_si64
-// CHECK: @llvm.x86.sse4a.extrqi(<2 x i64> %{{[^,]+}}, i8 3, i8 2)
}
__m128i test_extract_si64(__m128i x, __m128i y) {
+ // CHECK-LABEL: test_extract_si64
+ // CHECK: call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %{{[^,]+}}, <16 x i8> %{{[^,]+}})
+ // CHECK-ASM: extrq %xmm{{.*}}, %xmm{{.*}}
return _mm_extract_si64(x, y);
-// CHECK: @test_extract_si64
-// CHECK: @llvm.x86.sse4a.extrq(<2 x i64> %{{[^,]+}}, <16 x i8> %{{[^,]+}})
}
__m128i test_inserti_si64(__m128i x, __m128i y) {
+ // CHECK-LABEL: test_inserti_si64
+ // CHECK: call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}}, i8 5, i8 6)
+ // CHECK-ASM: insertq $6, $5, %xmm{{.*}}, %xmm{{.*}}
return _mm_inserti_si64(x, y, 5, 6);
-// CHECK: @test_inserti_si64
-// CHECK: @llvm.x86.sse4a.insertqi(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}}, i8 5, i8 6)
}
__m128i test_insert_si64(__m128i x, __m128i y) {
+ // CHECK-LABEL: test_insert_si64
+ // CHECK: call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}})
+ // CHECK-ASM: insertq %xmm{{.*}}, %xmm{{.*}}
return _mm_insert_si64(x, y);
-// CHECK: @test_insert_si64
-// CHECK: @llvm.x86.sse4a.insertq(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}})
}
void test_stream_sd(double *p, __m128d a) {
+ // CHECK-LABEL: test_stream_sd
+ // CHECK: call void @llvm.x86.sse4a.movnt.sd(i8* %{{[^,]+}}, <2 x double> %{{[^,]+}})
+ // CHECK-ASM: movntsd %xmm{{.*}}
_mm_stream_sd(p, a);
-// CHECK: @test_stream_sd
-// CHECK: @llvm.x86.sse4a.movnt.sd(i8* %{{[^,]+}}, <2 x double> %{{[^,]+}})
}
void test_stream_ss(float *p, __m128 a) {
+ // CHECK-LABEL: test_stream_ss
+ // CHECK: call void @llvm.x86.sse4a.movnt.ss(i8* %{{[^,]+}}, <4 x float> %{{[^,]+}})
+ // CHECK-ASM: movntss %xmm{{.*}}
_mm_stream_ss(p, a);
-// CHECK: @test_stream_ss
-// CHECK: @llvm.x86.sse4a.movnt.ss(i8* %{{[^,]+}}, <4 x float> %{{[^,]+}})
}
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