[PATCH] D11319: Pass subtarget feature "+reserve-r9" instead of passing backend option "-arm-reserve-r9"
Akira Hatanaka
ahatanak at gmail.com
Mon Jul 20 16:21:30 PDT 2015
This revision was automatically updated to reflect the committed changes.
Closed by commit rL242736: [ARM] Pass subtarget feature "+reserve-r9" instead of passing backend (authored by ahatanak).
Changed prior to commit:
http://reviews.llvm.org/D11319?vs=30054&id=30209#toc
Repository:
rL LLVM
http://reviews.llvm.org/D11319
Files:
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/test/Driver/arm-fixed-r9.c
Index: cfe/trunk/test/Driver/arm-fixed-r9.c
===================================================================
--- cfe/trunk/test/Driver/arm-fixed-r9.c
+++ cfe/trunk/test/Driver/arm-fixed-r9.c
@@ -1,4 +1,4 @@
// RUN: %clang -target arm-none-gnueabi -ffixed-r9 -### %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-FIXED-R9 < %t %s
-// CHECK-FIXED-R9: "-backend-option" "-arm-reserve-r9"
+// CHECK-FIXED-R9: "-target-feature" "+reserve-r9"
Index: cfe/trunk/lib/Driver/Tools.cpp
===================================================================
--- cfe/trunk/lib/Driver/Tools.cpp
+++ cfe/trunk/lib/Driver/Tools.cpp
@@ -719,6 +719,12 @@
Features.push_back("+long-calls");
}
+ // llvm does not support reserving registers in general. There is support
+ // for reserving r9 on ARM though (defined as a platform-specific register
+ // in ARM EABI).
+ if (Args.hasArg(options::OPT_ffixed_r9))
+ Features.push_back("+reserve-r9");
+
// The kext linker doesn't know how to deal with movw/movt.
if (KernelOrKext)
Features.push_back("+no-movt");
@@ -828,13 +834,6 @@
options::OPT_mno_implicit_float, true))
CmdArgs.push_back("-no-implicit-float");
- // llvm does not support reserving registers in general. There is support
- // for reserving r9 on ARM though (defined as a platform-specific register
- // in ARM EABI).
- if (Args.hasArg(options::OPT_ffixed_r9)) {
- CmdArgs.push_back("-backend-option");
- CmdArgs.push_back("-arm-reserve-r9");
- }
}
/// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are
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