r242678 - [CodeGen] Flip lanes when lowering __builtin_palignr with one lane

Benjamin Kramer benny.kra at gmail.com
Mon Jul 20 08:35:30 PDT 2015


> On 20.07.2015, at 17:31, Benjamin Kramer <benny.kra at googlemail.com> wrote:
> 
> Author: d0k
> Date: Mon Jul 20 10:31:17 2015
> New Revision: 242678
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=242678&view=rev
> Log:
> [CodeGen] Flip lanes when lowering __builtin_palignr with one lane
> 
> Otherwise we'd pick the wrong lane for the resulting shuffle and
> miscompile code. PR24187.

This is a candidate for 3.7, fixing a regression introduced in r229474.

- Ben

> 
> Modified:
>    cfe/trunk/lib/CodeGen/CGBuiltin.cpp
>    cfe/trunk/test/CodeGen/palignr.c
> 
> Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=242678&r1=242677&r2=242678&view=diff
> ==============================================================================
> --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
> +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Mon Jul 20 10:31:17 2015
> @@ -6238,6 +6238,7 @@ Value *CodeGenFunction::EmitX86BuiltinEx
>     // but less than two lanes, convert to shifting in zeroes.
>     if (ShiftVal > NumLaneElts) {
>       ShiftVal -= NumLaneElts;
> +      Ops[1] = Ops[0];
>       Ops[0] = llvm::Constant::getNullValue(Ops[0]->getType());
>     }
> 
> 
> Modified: cfe/trunk/test/CodeGen/palignr.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/palignr.c?rev=242678&r1=242677&r2=242678&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/palignr.c (original)
> +++ cfe/trunk/test/CodeGen/palignr.c Mon Jul 20 10:31:17 2015
> @@ -4,13 +4,13 @@
> #define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n)))
> typedef __attribute__((vector_size(16))) int int4;
> 
> -// CHECK: palignr
> +// CHECK: palignr $15, %xmm1, %xmm0
> int4 align1(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 15); }
> // CHECK: ret
> // CHECK: ret
> // CHECK-NOT: palignr
> int4 align2(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 16); }
> -// CHECK: psrldq
> +// CHECK: psrldq $1, %xmm0
> int4 align3(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 17); }
> // CHECK: xor
> int4 align4(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 32); }
> 
> 
> _______________________________________________
> cfe-commits mailing list
> cfe-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits





More information about the cfe-commits mailing list