r241134 - Use a stable sort to guarantee target feature ordering in the IR
Eric Christopher
echristo at gmail.com
Sat Jul 4 12:15:40 PDT 2015
Ah, yeah, probably. I'll get that.
Thanks!
-eric
On Thu, Jul 2, 2015 at 5:54 AM Rafael Espíndola <rafael.espindola at gmail.com>
wrote:
> Why stable_sort? Since it is sorting std::string elements just a plain
> sort should work, no?
>
> On 30 June 2015 at 21:07, Eric Christopher <echristo at gmail.com> wrote:
> > Author: echristo
> > Date: Tue Jun 30 20:07:12 2015
> > New Revision: 241134
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=241134&view=rev
> > Log:
> > Use a stable sort to guarantee target feature ordering in the IR
> > in order to make testing somewhat more feasible. Has the advantage
> > of making it easier to find target features as well.
> >
> > Modified:
> > cfe/trunk/lib/CodeGen/CGCall.cpp
> > cfe/trunk/test/CodeGen/arm-target-features.c
> > cfe/trunk/test/CodeGen/attr-target.c
> > cfe/trunk/test/CodeGen/function-target-features.c
> >
> > Modified: cfe/trunk/lib/CodeGen/CGCall.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGCall.cpp?rev=241134&r1=241133&r2=241134&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/lib/CodeGen/CGCall.cpp (original)
> > +++ cfe/trunk/lib/CodeGen/CGCall.cpp Tue Jun 30 20:07:12 2015
> > @@ -1544,6 +1544,7 @@ void CodeGenModule::ConstructAttributeLi
> > if (TargetCPU != "")
> > FuncAttrs.addAttribute("target-cpu", TargetCPU);
> > if (!Features.empty()) {
> > + std::stable_sort(Features.begin(), Features.end());
> > std::stringstream TargetFeatures;
> > std::copy(Features.begin(), Features.end(),
> > std::ostream_iterator<std::string>(TargetFeatures,
> ","));
> >
> > Modified: cfe/trunk/test/CodeGen/arm-target-features.c
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-target-features.c?rev=241134&r1=241133&r2=241134&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/test/CodeGen/arm-target-features.c (original)
> > +++ cfe/trunk/test/CodeGen/arm-target-features.c Tue Jun 30 20:07:12 2015
> > @@ -6,7 +6,7 @@
> >
> >
> > // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu
> cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4
> > -// CHECK-VFP4: "target-features"="+vfp4,+neon"
> > +// CHECK-VFP4: "target-features"="+neon,+vfp4"
> >
> >
> > // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu
> cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
> > @@ -15,14 +15,14 @@
> > // RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
> > // RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
> > // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
> > -// CHECK-VFP4-DIV: "target-features"="+vfp4,+neon,+hwdiv,+hwdiv-arm"
> > +// CHECK-VFP4-DIV: "target-features"="+hwdiv,+hwdiv-arm,+neon,+vfp4"
> >
> >
> > // RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
> > // RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
> > // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
> cortex-a57 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
> > // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu
> cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
> > -// CHECK-BASIC-V8:
> "target-features"="+neon,+fp-armv8,+hwdiv,+crypto,+crc,+hwdiv-arm"
> > +// CHECK-BASIC-V8:
> "target-features"="+crc,+crypto,+fp-armv8,+hwdiv,+hwdiv-arm,+neon"
> >
> >
> > // RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5
> -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-DIV
> >
> > Modified: cfe/trunk/test/CodeGen/attr-target.c
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target.c?rev=241134&r1=241133&r2=241134&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/test/CodeGen/attr-target.c (original)
> > +++ cfe/trunk/test/CodeGen/attr-target.c Tue Jun 30 20:07:12 2015
> > @@ -23,6 +23,6 @@ int bar(int a) { return baz(a) + foo(a);
> > // CHECK: echidna{{.*}} #2
> > // CHECK: bar{{.*}} #0
> > // CHECK: #0 = {{.*}}"target-cpu"="x86-64"
> "target-features"="+sse,+sse2"
> > -// CHECK: #1 = {{.*}}"target-cpu"="ivybridge"
> "target-features"="+sse4.2,+ssse3,+sse3,+sse,+sse2,+sse4.1,+avx"
> > -// CHECK: #2 = {{.*}}"target-cpu"="x86-64"
> "target-features"="-sse4a,-sse3,-avx2,-avx512bw,-avx512er,-avx512dq,-avx512pf,-fma4,-avx512vl,+sse,-pclmul,-avx512cd,-avx,-f16c,-ssse3,-avx512f,-fma,-xop,-aes,-sha,-sse2,-sse4.1,-sse4.2"
> > -// CHECK: #3 = {{.*}}"target-cpu"="x86-64"
> "target-features"="+ssse3,+sse3,+sse,+sse2,+sse4.1,+sse4.2"
> > +// CHECK: #1 = {{.*}}"target-cpu"="ivybridge"
> "target-features"="+avx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
> > +// CHECK: #2 = {{.*}}"target-cpu"="x86-64"
> "target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop"
> > +// CHECK: #3 = {{.*}}"target-cpu"="x86-64"
> "target-features"="+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
> >
> > Modified: cfe/trunk/test/CodeGen/function-target-features.c
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/function-target-features.c?rev=241134&r1=241133&r2=241134&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/test/CodeGen/function-target-features.c (original)
> > +++ cfe/trunk/test/CodeGen/function-target-features.c Tue Jun 30
> 20:07:12 2015
> > @@ -17,7 +17,7 @@ void foo() {}
> >
> > // AVX-FEATURE: "target-features"{{.*}}+avx
> > // AVX-NO-CPU-NOT: target-cpu
> > -// TWO-AVX: "target-features"={{.*}}+avx512f{{.*}}+avx512er
> > +// TWO-AVX: "target-features"={{.*}}+avx512er{{.*}}+avx512f
> > // CORE-CPU: "target-cpu"="corei7"
> > // CORE-CPU-AND-FEATURES: "target-cpu"="corei7"
> "target-features"={{.*}}+avx
> > // X86-64-CPU: "target-cpu"="x86-64"
> >
> >
> > _______________________________________________
> > cfe-commits mailing list
> > cfe-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
>
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