r241130 - Fix sse4 for target attribute feature additions.

[Eric Christopher]

Author: echristo
Date: Tue Jun 30 19:08:32 2015
New Revision: 241130

URL: http://llvm.org/viewvc/llvm-project?rev=241130&view=rev
Log:
Fix sse4 for target attribute feature additions.
This reinstates part of the hack removed in r233223, by special
casing sse4 as part of the feature additions. The notable change
here is that we consider it only as part of setting the SSE level
and not as part of the actual target features set which handles
setting the rest of the masks.

Modified:
    cfe/trunk/lib/Basic/Targets.cpp
    cfe/trunk/test/CodeGen/attr-target.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=241130&r1=241129&r2=241130&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Tue Jun 30 19:08:32 2015
@@ -2728,7 +2728,11 @@ void X86TargetInfo::setXOPLevel(llvm::St
 
 void X86TargetInfo::setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
                                           StringRef Name, bool Enabled) {
-  Features[Name] = Enabled;
+  // This is a bit of a hack to deal with the sse4 target feature when used
+  // as part of the target attribute. We handle sse4 correctly everywhere
+  // else. See below for more information on how we handle the sse4 options.
+  if (Name != "sse4")
+    Features[Name] = Enabled;
 
   if (Name == "mmx") {
     setMMXLevel(Features, MMX, Enabled);
@@ -2779,6 +2783,15 @@ void X86TargetInfo::setFeatureEnabledImp
   } else if (Name == "sha") {
     if (Enabled)
       setSSELevel(Features, SSE2, Enabled);
+  } else if (Name == "sse4") {
+    // We can get here via the __target__ attribute since that's not controlled
+    // via the -msse4/-mno-sse4 command line alias. Handle this the same way
+    // here - turn on the sse4.2 if enabled, turn off the sse4.1 level if
+    // disabled.
+    if (Enabled)
+      setSSELevel(Features, SSE42, Enabled);
+    else
+      setSSELevel(Features, SSE41, Enabled);
   }
 }
 

Modified: cfe/trunk/test/CodeGen/attr-target.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target.c?rev=241130&r1=241129&r2=241130&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/attr-target.c (original)
+++ cfe/trunk/test/CodeGen/attr-target.c Tue Jun 30 19:08:32 2015
@@ -9,6 +9,8 @@ int __attribute__((target("fpmath=387"))
 
 int __attribute__((target("mno-sse2"))) echidna(int a) { return 4; }
 
+int __attribute__((target("sse4"))) panda(int a) { return 4; }
+
 int bar(int a) { return baz(a) + foo(a); }
 
 // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar.
@@ -23,3 +25,4 @@ int bar(int a) { return baz(a) + foo(a);
 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2"
 // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+sse4.2,+ssse3,+sse3,+sse,+sse2,+sse4.1,+avx"
 // CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="-sse4a,-sse3,-avx2,-avx512bw,-avx512er,-avx512dq,-avx512pf,-fma4,-avx512vl,+sse,-pclmul,-avx512cd,-avx,-f16c,-ssse3,-avx512f,-fma,-xop,-aes,-sha,-sse2,-sse4.1,-sse4.2"
+// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+sse,+sse2,+sse4.1,+sse4.2"